Merge remote-tracking branch 'spi/topic/quad' into spi-next
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commit
278ac33bbd
2 changed files with 47 additions and 40 deletions
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@ -55,6 +55,16 @@ contain the following properties.
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chip select active high
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- spi-3wire - (optional) Empty property indicating device requires
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3-wire mode.
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- spi-tx-bus-width - (optional) The bus width(number of data wires) that
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used for MOSI. Defaults to 1 if not present.
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- spi-rx-bus-width - (optional) The bus width(number of data wires) that
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used for MISO. Defaults to 1 if not present.
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Some SPI controllers and devices support Dual and Quad SPI transfer mode.
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It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
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Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
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only 1(SINGLE), 2(DUAL) and 4(QUAD).
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Dual/Quad mode is not allowed when 3-wire mode is used.
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If a gpio chipselect is used for the SPI slave the gpio number will be passed
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via the cs_gpio
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@ -886,48 +886,44 @@ static void of_register_spi_devices(struct spi_master *master)
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spi->mode |= SPI_3WIRE;
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/* Device DUAL/QUAD mode */
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prop = of_get_property(nc, "spi-tx-nbits", &len);
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if (!prop || len < sizeof(*prop)) {
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dev_err(&master->dev, "%s has no 'spi-tx-nbits' property\n",
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nc->full_name);
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spi_dev_put(spi);
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continue;
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}
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switch (be32_to_cpup(prop)) {
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case SPI_NBITS_SINGLE:
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break;
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case SPI_NBITS_DUAL:
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spi->mode |= SPI_TX_DUAL;
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break;
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case SPI_NBITS_QUAD:
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spi->mode |= SPI_TX_QUAD;
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break;
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default:
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dev_err(&master->dev, "spi-tx-nbits value is not supported\n");
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spi_dev_put(spi);
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continue;
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prop = of_get_property(nc, "spi-tx-bus-width", &len);
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if (prop && len == sizeof(*prop)) {
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switch (be32_to_cpup(prop)) {
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case SPI_NBITS_SINGLE:
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break;
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case SPI_NBITS_DUAL:
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spi->mode |= SPI_TX_DUAL;
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break;
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case SPI_NBITS_QUAD:
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spi->mode |= SPI_TX_QUAD;
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break;
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default:
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dev_err(&master->dev,
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"spi-tx-bus-width %d not supported\n",
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be32_to_cpup(prop));
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spi_dev_put(spi);
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continue;
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}
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}
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prop = of_get_property(nc, "spi-rx-nbits", &len);
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if (!prop || len < sizeof(*prop)) {
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dev_err(&master->dev, "%s has no 'spi-rx-nbits' property\n",
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nc->full_name);
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spi_dev_put(spi);
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continue;
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}
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switch (be32_to_cpup(prop)) {
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case SPI_NBITS_SINGLE:
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break;
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case SPI_NBITS_DUAL:
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spi->mode |= SPI_RX_DUAL;
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break;
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case SPI_NBITS_QUAD:
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spi->mode |= SPI_RX_QUAD;
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break;
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default:
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dev_err(&master->dev, "spi-rx-nbits value is not supported\n");
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spi_dev_put(spi);
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continue;
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prop = of_get_property(nc, "spi-rx-bus-width", &len);
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if (prop && len == sizeof(*prop)) {
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switch (be32_to_cpup(prop)) {
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case SPI_NBITS_SINGLE:
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break;
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case SPI_NBITS_DUAL:
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spi->mode |= SPI_RX_DUAL;
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break;
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case SPI_NBITS_QUAD:
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spi->mode |= SPI_RX_QUAD;
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break;
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default:
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dev_err(&master->dev,
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"spi-rx-bus-width %d not supported\n",
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be32_to_cpup(prop));
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spi_dev_put(spi);
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continue;
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}
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}
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/* Device speed */
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@ -1480,6 +1476,7 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
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return -EINVAL;
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if (xfer->speed_hz && master->max_speed_hz &&
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xfer->speed_hz > master->max_speed_hz)
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return -EINVAL;
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if (xfer->tx_buf && !xfer->tx_nbits)
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xfer->tx_nbits = SPI_NBITS_SINGLE;
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