Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

ARM: pgtable: remove L2 cache flushes for SMP page table bring-up

Browse source 
The MMU is always configured to read page tables from the L2 cache
so there's little point flushing them out of the L2 cache back to
RAM.  Remove these flushes.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2010-11-21 11:30:36 +00:00
parent d30e45eeab
commit 26bbf0b57a
1 changed files with 0 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/kernel/smp.c
View file

@ -85,7 +85,6 @@ static inline void identity_mapping_add(pgd_t *pgd, unsigned long start,
pmd[1] = __pmd(addr | prot);
addr += SECTION_SIZE;
flush_pmd_entry(pmd);
outer_clean_range(__pa(pmd), __pa(pmd + 1));
}
}
@ -100,7 +99,6 @@ static inline void identity_mapping_del(pgd_t *pgd, unsigned long start,
pmd[0] = __pmd(0);
pmd[1] = __pmd(0);
clean_pmd_entry(pmd);
outer_clean_range(__pa(pmd), __pa(pmd + 1));
}
}