hpt366: simplify UltraDMA filtering (take 4)
Simplify UltraDMA mode filtering in the driver: - make use of the newly introduced 'udma_mask' field of 'ide_pci_device_t' to set the correct hwif->ultra_mask, modifying init_setup_hpt366() to select the correct mask based on the chip revision; - replace 'max_mode' field of the 'struct hpt_info' with 'max_ultra' specifying the maximum UltraDMA mode allowed; - rewrite hpt3xx_udma_filter() to differ the filters based on the 'chip_type' field, and only use it for HPT366 and HPT370[A] where it's really necessary. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Sergei Shtylyov
Bartlomiej Zolnierkiewicz
parent
ef29888ea8
commit
2648e5d9a8
1 changed files with 82 additions and 72 deletions
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@ -1,5 +1,5 @@
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/*
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* linux/drivers/ide/pci/hpt366.c Version 1.06 Jun 27, 2007
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* linux/drivers/ide/pci/hpt366.c Version 1.10 Jun 29, 2007
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*
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* Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
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* Portions Copyright (C) 2001 Sun Microsystems, Inc.
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@ -77,7 +77,7 @@
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* since they may tamper with its fields
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* - prefix the driver startup messages with the real chip name
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* - claim the extra 240 bytes of I/O space for all chips
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* - optimize the rate masking/filtering and the drive list lookup code
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* - optimize the UltraDMA filtering and the drive list lookup code
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* - use pci_get_slot() to get to the function 1 of HPT36x/374
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* - cache offset of the channel's misc. control registers (MCRs) being used
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* throughout the driver
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@ -99,9 +99,9 @@
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* stop duplicating it for each channel by storing the pointer in the pci_dev
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* structure: first, at the init_setup stage, point it to a static "template"
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* with only the chip type and its specific base DPLL frequency, the highest
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* supported DMA mode, and the chip settings table pointer filled, then, at
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* the init_chipset stage, allocate per-chip instance and fill it with the
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* rest of the necessary information
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* UltraDMA mode, and the chip settings table pointer filled, then, at the
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* init_chipset stage, allocate per-chip instance and fill it with the rest
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* of the necessary information
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* - get rid of the constant thresholds in the HPT37x PCI clock detection code,
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* switch to calculating PCI clock frequency based on the chip's base DPLL
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* frequency
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@ -112,6 +112,7 @@
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* also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips;
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* unify HPT36x/37x timing setup code and the speedproc handlers by joining
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* the register setting lists into the table indexed by the clock selected
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* - set the correct hwif->ultra_mask for each individual chip
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* Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
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*/
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@ -391,7 +392,7 @@ enum ata_clock {
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struct hpt_info {
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u8 chip_type; /* Chip type */
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u8 max_mode; /* Speeds allowed */
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u8 max_ultra; /* Max. UltraDMA mode allowed */
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u8 dpll_clk; /* DPLL clock in MHz */
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u8 pci_clk; /* PCI clock in MHz */
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u32 **settings; /* Chipset settings table */
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@ -430,77 +431,77 @@ static u32 *hpt37x_settings[NUM_ATA_CLOCKS] = {
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static struct hpt_info hpt36x __devinitdata = {
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.chip_type = HPT36x,
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.max_mode = (HPT366_ALLOW_ATA66_4 || HPT366_ALLOW_ATA66_3) ? 2 : 1,
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.max_ultra = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 4 : 3) : 2,
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.dpll_clk = 0, /* no DPLL */
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.settings = hpt36x_settings
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};
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static struct hpt_info hpt370 __devinitdata = {
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.chip_type = HPT370,
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.max_mode = HPT370_ALLOW_ATA100_5 ? 3 : 2,
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.max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4,
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.dpll_clk = 48,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt370a __devinitdata = {
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.chip_type = HPT370A,
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.max_mode = HPT370_ALLOW_ATA100_5 ? 3 : 2,
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.max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4,
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.dpll_clk = 48,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt374 __devinitdata = {
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.chip_type = HPT374,
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.max_mode = 3,
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.max_ultra = 5,
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.dpll_clk = 48,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt372 __devinitdata = {
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.chip_type = HPT372,
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.max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3,
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.max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
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.dpll_clk = 55,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt372a __devinitdata = {
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.chip_type = HPT372A,
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.max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3,
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.max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
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.dpll_clk = 66,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt302 __devinitdata = {
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.chip_type = HPT302,
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.max_mode = HPT302_ALLOW_ATA133_6 ? 4 : 3,
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.max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
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.dpll_clk = 66,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt371 __devinitdata = {
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.chip_type = HPT371,
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.max_mode = HPT371_ALLOW_ATA133_6 ? 4 : 3,
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.max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5,
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.dpll_clk = 66,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt372n __devinitdata = {
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.chip_type = HPT372N,
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.max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3,
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.max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
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.dpll_clk = 77,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt302n __devinitdata = {
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.chip_type = HPT302N,
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.max_mode = HPT302_ALLOW_ATA133_6 ? 4 : 3,
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.max_ultra = HPT302_ALLOW_ATA133_6 ? 6 : 5,
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.dpll_clk = 77,
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.settings = hpt37x_settings
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};
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static struct hpt_info hpt371n __devinitdata = {
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.chip_type = HPT371N,
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.max_mode = HPT371_ALLOW_ATA133_6 ? 4 : 3,
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.max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5,
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.dpll_clk = 77,
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.settings = hpt37x_settings
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};
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@ -523,53 +524,38 @@ static int check_in_drive_list(ide_drive_t *drive, const char **list)
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static u8 hpt3xx_udma_filter(ide_drive_t *drive)
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{
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struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev);
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u8 chip_type = info->chip_type;
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u8 mode = info->max_mode;
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u8 mask;
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switch (mode) {
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case 0x04:
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mask = 0x7f;
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break;
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case 0x03:
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switch (info->chip_type) {
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case HPT370A:
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if (!HPT370_ALLOW_ATA100_5 ||
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check_in_drive_list(drive, bad_ata100_5))
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return 0x1f;
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else
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return 0x3f;
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case HPT370:
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if (!HPT370_ALLOW_ATA100_5 ||
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check_in_drive_list(drive, bad_ata100_5))
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mask = 0x1f;
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else
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mask = 0x3f;
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if (chip_type >= HPT374)
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break;
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if (!check_in_drive_list(drive, bad_ata100_5))
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goto check_bad_ata33;
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/* fall thru */
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case 0x02:
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break;
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case HPT36x:
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if (!HPT366_ALLOW_ATA66_4 ||
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check_in_drive_list(drive, bad_ata66_4))
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mask = 0x0f;
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else
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mask = 0x1f;
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/*
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* CHECK ME, Does this need to be changed to HPT374 ??
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*/
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if (chip_type >= HPT370)
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goto check_bad_ata33;
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if (HPT366_ALLOW_ATA66_4 &&
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!check_in_drive_list(drive, bad_ata66_4))
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goto check_bad_ata33;
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mask = 0x0f;
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if (HPT366_ALLOW_ATA66_3 &&
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!check_in_drive_list(drive, bad_ata66_3))
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goto check_bad_ata33;
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/* fall thru */
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case 0x01:
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if (!HPT366_ALLOW_ATA66_3 ||
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check_in_drive_list(drive, bad_ata66_3))
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mask = 0x07;
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check_bad_ata33:
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if (chip_type >= HPT370A)
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break;
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if (!check_in_drive_list(drive, bad_ata33))
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break;
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/* fall thru */
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case 0x00:
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default:
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mask = 0x00;
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break;
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break;
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default:
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return 0x7f;
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}
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return mask;
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return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask;
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}
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static u32 get_speed_setting(u8 speed, struct hpt_info *info)
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@ -1150,7 +1136,7 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha
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* Select 66 MHz DPLL clock only if UltraATA/133 mode is
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* supported/enabled, use 50 MHz DPLL clock otherwise...
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*/
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if (info->max_mode == 0x04) {
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if (info->max_ultra == 6) {
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dpll_clk = 66;
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clock = ATA_CLOCK_66MHZ;
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} else if (dpll_clk) { /* HPT36x chips don't have DPLL */
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@ -1243,7 +1229,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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struct pci_dev *dev = hwif->pci_dev;
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struct hpt_info *info = pci_get_drvdata(dev);
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int serialize = HPT_SERIALIZE_IO;
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u8 scr1 = 0, ata66 = (hwif->channel) ? 0x01 : 0x02;
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u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02;
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u8 chip_type = info->chip_type;
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u8 new_mcr, old_mcr = 0;
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@ -1256,7 +1242,9 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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hwif->intrproc = &hpt3xx_intrproc;
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hwif->maskproc = &hpt3xx_maskproc;
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hwif->busproc = &hpt3xx_busproc;
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hwif->udma_filter = &hpt3xx_udma_filter;
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if (chip_type <= HPT370A)
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hwif->udma_filter = &hpt3xx_udma_filter;
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/*
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* HPT3xxN chips have some complications:
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@ -1305,7 +1293,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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return;
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}
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hwif->ultra_mask = 0x7f;
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hwif->ultra_mask = hwif->cds->udma_mask;
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hwif->mwdma_mask = 0x07;
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/*
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@ -1503,9 +1491,35 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
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pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
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if (rev > 6)
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switch (rev) {
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case 0:
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case 1:
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case 2:
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/*
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* HPT36x chips have one channel per function and have
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* both channel enable bits located differently and visible
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* to both functions -- really stupid design decision... :-(
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* Bit 4 is for the primary channel, bit 5 for the secondary.
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*/
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d->channels = 1;
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d->enablebits[0].mask = d->enablebits[0].val = 0x10;
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d->udma_mask = HPT366_ALLOW_ATA66_3 ?
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(HPT366_ALLOW_ATA66_4 ? 0x1f : 0x0f) : 0x07;
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break;
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case 3:
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case 4:
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d->udma_mask = HPT370_ALLOW_ATA100_5 ? 0x3f : 0x1f;
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break;
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default:
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rev = 6;
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/* fall thru */
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case 5:
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case 6:
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d->udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f;
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break;
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}
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d->name = chipset_names[rev];
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pci_set_drvdata(dev, info[rev]);
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@ -1513,15 +1527,6 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
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if (rev > 2)
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goto init_single;
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/*
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* HPT36x chips have one channel per function and have
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* both channel enable bits located differently and visible
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* to both functions -- really stupid design decision... :-(
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* Bit 4 is for the primary channel, bit 5 for the secondary.
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*/
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d->channels = 1;
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d->enablebits[0].mask = d->enablebits[0].val = 0x10;
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if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) {
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u8 mcr1 = 0, pin1 = 0, pin2 = 0;
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int ret;
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@ -1573,6 +1578,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
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.channels = 2,
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.autodma = AUTODMA,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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.udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f,
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.bootable = OFF_BOARD,
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.extra = 240
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},{ /* 2 */
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@ -1584,6 +1590,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
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.channels = 2,
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.autodma = AUTODMA,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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.udma_mask = HPT302_ALLOW_ATA133_6 ? 0x7f : 0x3f,
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.bootable = OFF_BOARD,
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.extra = 240
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},{ /* 3 */
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@ -1595,6 +1602,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
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.channels = 2,
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.autodma = AUTODMA,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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.udma_mask = HPT371_ALLOW_ATA133_6 ? 0x7f : 0x3f,
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.bootable = OFF_BOARD,
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.extra = 240
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},{ /* 4 */
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@ -1606,6 +1614,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
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.channels = 2, /* 4 */
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.autodma = AUTODMA,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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.udma_mask = 0x3f,
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.bootable = OFF_BOARD,
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.extra = 240
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},{ /* 5 */
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@ -1617,6 +1626,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
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.channels = 2, /* 4 */
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.autodma = AUTODMA,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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.udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f,
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.bootable = OFF_BOARD,
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.extra = 240
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}
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