Merge git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:
 - New watchdog driver for Allwinner A10/A13
 - some devm_ioremap_resource simplifications
 - a s3c2410_wdt change that removes the global variables

* git://www.linux-watchdog.org/linux-watchdog:
  watchdog: s3c2410_wdt: simplify use of devm_ioremap_resource
  watchdog: simplify platform_get_resource_byname/devm_ioremap_resource
  watchdog: ts72xx_wdt: simplify use of devm_ioremap_resource
  watchdog: nuc900_wdt.c: simplify use of devm_ioremap_resource
  watchdog: sunxi: New watchdog driver for Allwinner A10/A13
  watchdog: s3c2410_wdt: remove the global variables
This commit is contained in:
Linus Torvalds 2013-09-12 08:45:53 -07:00
commit 24ba40588f
7 changed files with 377 additions and 119 deletions

View file

@ -290,6 +290,16 @@ config ORION_WATCHDOG
To compile this driver as a module, choose M here: the To compile this driver as a module, choose M here: the
module will be called orion_wdt. module will be called orion_wdt.
config SUNXI_WATCHDOG
tristate "Allwinner SoCs watchdog support"
depends on ARCH_SUNXI
select WATCHDOG_CORE
help
Say Y here to include support for the watchdog timer
in Allwinner SoCs.
To compile this driver as a module, choose M here: the
module will be called sunxi_wdt.
config COH901327_WATCHDOG config COH901327_WATCHDOG
bool "ST-Ericsson COH 901 327 watchdog" bool "ST-Ericsson COH 901 327 watchdog"
depends on ARCH_U300 depends on ARCH_U300

View file

@ -46,6 +46,7 @@ obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
obj-$(CONFIG_SUNXI_WATCHDOG) += sunxi_wdt.o
obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
obj-$(CONFIG_STMP3XXX_RTC_WATCHDOG) += stmp3xxx_rtc_wdt.o obj-$(CONFIG_STMP3XXX_RTC_WATCHDOG) += stmp3xxx_rtc_wdt.o
obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o

View file

@ -280,11 +280,6 @@ static int ar7_wdt_probe(struct platform_device *pdev)
ar7_regs_wdt = ar7_regs_wdt =
platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
if (!ar7_regs_wdt) {
pr_err("could not get registers resource\n");
return -ENODEV;
}
ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt); ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
if (IS_ERR(ar7_wdt)) if (IS_ERR(ar7_wdt))
return PTR_ERR(ar7_wdt); return PTR_ERR(ar7_wdt);

View file

@ -256,11 +256,6 @@ static int nuc900wdt_probe(struct platform_device *pdev)
spin_lock_init(&nuc900_wdt->wdt_lock); spin_lock_init(&nuc900_wdt->wdt_lock);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
dev_err(&pdev->dev, "no memory resource specified\n");
return -ENOENT;
}
nuc900_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res); nuc900_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(nuc900_wdt->wdt_base)) if (IS_ERR(nuc900_wdt->wdt_base))
return PTR_ERR(nuc900_wdt->wdt_base); return PTR_ERR(nuc900_wdt->wdt_base);

View file

@ -84,13 +84,17 @@ MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, "
"0 to reboot (default 0)"); "0 to reboot (default 0)");
MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)"); MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)");
static struct device *wdt_dev; /* platform device attached to */ struct s3c2410_wdt {
static struct resource *wdt_mem; struct device *dev;
static struct resource *wdt_irq; struct clk *clock;
static struct clk *wdt_clock; void __iomem *reg_base;
static void __iomem *wdt_base; unsigned int count;
static unsigned int wdt_count; spinlock_t lock;
static DEFINE_SPINLOCK(wdt_lock); unsigned long wtcon_save;
unsigned long wtdat_save;
struct watchdog_device wdt_device;
struct notifier_block freq_transition;
};
/* watchdog control routines */ /* watchdog control routines */
@ -102,29 +106,38 @@ do { \
/* functions */ /* functions */
static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb)
{
return container_of(nb, struct s3c2410_wdt, freq_transition);
}
static int s3c2410wdt_keepalive(struct watchdog_device *wdd) static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
{ {
spin_lock(&wdt_lock); struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
writel(wdt_count, wdt_base + S3C2410_WTCNT);
spin_unlock(&wdt_lock); spin_lock(&wdt->lock);
writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
spin_unlock(&wdt->lock);
return 0; return 0;
} }
static void __s3c2410wdt_stop(void) static void __s3c2410wdt_stop(struct s3c2410_wdt *wdt)
{ {
unsigned long wtcon; unsigned long wtcon;
wtcon = readl(wdt_base + S3C2410_WTCON); wtcon = readl(wdt->reg_base + S3C2410_WTCON);
wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN); wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
writel(wtcon, wdt_base + S3C2410_WTCON); writel(wtcon, wdt->reg_base + S3C2410_WTCON);
} }
static int s3c2410wdt_stop(struct watchdog_device *wdd) static int s3c2410wdt_stop(struct watchdog_device *wdd)
{ {
spin_lock(&wdt_lock); struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
__s3c2410wdt_stop();
spin_unlock(&wdt_lock); spin_lock(&wdt->lock);
__s3c2410wdt_stop(wdt);
spin_unlock(&wdt->lock);
return 0; return 0;
} }
@ -132,12 +145,13 @@ static int s3c2410wdt_stop(struct watchdog_device *wdd)
static int s3c2410wdt_start(struct watchdog_device *wdd) static int s3c2410wdt_start(struct watchdog_device *wdd)
{ {
unsigned long wtcon; unsigned long wtcon;
struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
spin_lock(&wdt_lock); spin_lock(&wdt->lock);
__s3c2410wdt_stop(); __s3c2410wdt_stop(wdt);
wtcon = readl(wdt_base + S3C2410_WTCON); wtcon = readl(wdt->reg_base + S3C2410_WTCON);
wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128; wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
if (soft_noboot) { if (soft_noboot) {
@ -148,25 +162,26 @@ static int s3c2410wdt_start(struct watchdog_device *wdd)
wtcon |= S3C2410_WTCON_RSTEN; wtcon |= S3C2410_WTCON_RSTEN;
} }
DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n", DBG("%s: count=0x%08x, wtcon=%08lx\n",
__func__, wdt_count, wtcon); __func__, wdt->count, wtcon);
writel(wdt_count, wdt_base + S3C2410_WTDAT); writel(wdt->count, wdt->reg_base + S3C2410_WTDAT);
writel(wdt_count, wdt_base + S3C2410_WTCNT); writel(wdt->count, wdt->reg_base + S3C2410_WTCNT);
writel(wtcon, wdt_base + S3C2410_WTCON); writel(wtcon, wdt->reg_base + S3C2410_WTCON);
spin_unlock(&wdt_lock); spin_unlock(&wdt->lock);
return 0; return 0;
} }
static inline int s3c2410wdt_is_running(void) static inline int s3c2410wdt_is_running(struct s3c2410_wdt *wdt)
{ {
return readl(wdt_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE; return readl(wdt->reg_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE;
} }
static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeout) static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeout)
{ {
unsigned long freq = clk_get_rate(wdt_clock); struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
unsigned long freq = clk_get_rate(wdt->clock);
unsigned int count; unsigned int count;
unsigned int divisor = 1; unsigned int divisor = 1;
unsigned long wtcon; unsigned long wtcon;
@ -192,7 +207,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeou
} }
if ((count / divisor) >= 0x10000) { if ((count / divisor) >= 0x10000) {
dev_err(wdt_dev, "timeout %d too big\n", timeout); dev_err(wdt->dev, "timeout %d too big\n", timeout);
return -EINVAL; return -EINVAL;
} }
} }
@ -201,15 +216,15 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_device *wdd, unsigned timeou
__func__, timeout, divisor, count, count/divisor); __func__, timeout, divisor, count, count/divisor);
count /= divisor; count /= divisor;
wdt_count = count; wdt->count = count;
/* update the pre-scaler */ /* update the pre-scaler */
wtcon = readl(wdt_base + S3C2410_WTCON); wtcon = readl(wdt->reg_base + S3C2410_WTCON);
wtcon &= ~S3C2410_WTCON_PRESCALE_MASK; wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
wtcon |= S3C2410_WTCON_PRESCALE(divisor-1); wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
writel(count, wdt_base + S3C2410_WTDAT); writel(count, wdt->reg_base + S3C2410_WTDAT);
writel(wtcon, wdt_base + S3C2410_WTCON); writel(wtcon, wdt->reg_base + S3C2410_WTCON);
wdd->timeout = (count * divisor) / freq; wdd->timeout = (count * divisor) / freq;
@ -242,21 +257,23 @@ static struct watchdog_device s3c2410_wdd = {
static irqreturn_t s3c2410wdt_irq(int irqno, void *param) static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
{ {
dev_info(wdt_dev, "watchdog timer expired (irq)\n"); struct s3c2410_wdt *wdt = platform_get_drvdata(param);
s3c2410wdt_keepalive(&s3c2410_wdd); dev_info(wdt->dev, "watchdog timer expired (irq)\n");
s3c2410wdt_keepalive(&wdt->wdt_device);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
#ifdef CONFIG_CPU_FREQ #ifdef CONFIG_CPU_FREQ
static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb, static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
unsigned long val, void *data) unsigned long val, void *data)
{ {
int ret; int ret;
struct s3c2410_wdt *wdt = freq_to_wdt(nb);
if (!s3c2410wdt_is_running()) if (!s3c2410wdt_is_running(wdt))
goto done; goto done;
if (val == CPUFREQ_PRECHANGE) { if (val == CPUFREQ_PRECHANGE) {
@ -265,14 +282,15 @@ static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
* the watchdog is running. * the watchdog is running.
*/ */
s3c2410wdt_keepalive(&s3c2410_wdd); s3c2410wdt_keepalive(&wdt->wdt_device);
} else if (val == CPUFREQ_POSTCHANGE) { } else if (val == CPUFREQ_POSTCHANGE) {
s3c2410wdt_stop(&s3c2410_wdd); s3c2410wdt_stop(&wdt->wdt_device);
ret = s3c2410wdt_set_heartbeat(&s3c2410_wdd, s3c2410_wdd.timeout); ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
wdt->wdt_device.timeout);
if (ret >= 0) if (ret >= 0)
s3c2410wdt_start(&s3c2410_wdd); s3c2410wdt_start(&wdt->wdt_device);
else else
goto err; goto err;
} }
@ -281,34 +299,35 @@ static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
return 0; return 0;
err: err:
dev_err(wdt_dev, "cannot set new value for timeout %d\n", dev_err(wdt->dev, "cannot set new value for timeout %d\n",
s3c2410_wdd.timeout); wdt->wdt_device.timeout);
return ret; return ret;
} }
static struct notifier_block s3c2410wdt_cpufreq_transition_nb = { static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt)
.notifier_call = s3c2410wdt_cpufreq_transition,
};
static inline int s3c2410wdt_cpufreq_register(void)
{ {
return cpufreq_register_notifier(&s3c2410wdt_cpufreq_transition_nb, wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition;
return cpufreq_register_notifier(&wdt->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER); CPUFREQ_TRANSITION_NOTIFIER);
} }
static inline void s3c2410wdt_cpufreq_deregister(void) static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
{ {
cpufreq_unregister_notifier(&s3c2410wdt_cpufreq_transition_nb, wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition;
cpufreq_unregister_notifier(&wdt->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER); CPUFREQ_TRANSITION_NOTIFIER);
} }
#else #else
static inline int s3c2410wdt_cpufreq_register(void)
static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt)
{ {
return 0; return 0;
} }
static inline void s3c2410wdt_cpufreq_deregister(void) static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
{ {
} }
#endif #endif
@ -316,6 +335,9 @@ static inline void s3c2410wdt_cpufreq_deregister(void)
static int s3c2410wdt_probe(struct platform_device *pdev) static int s3c2410wdt_probe(struct platform_device *pdev)
{ {
struct device *dev; struct device *dev;
struct s3c2410_wdt *wdt;
struct resource *wdt_mem;
struct resource *wdt_irq;
unsigned int wtcon; unsigned int wtcon;
int started = 0; int started = 0;
int ret; int ret;
@ -323,13 +345,14 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
DBG("%s: probe=%p\n", __func__, pdev); DBG("%s: probe=%p\n", __func__, pdev);
dev = &pdev->dev; dev = &pdev->dev;
wdt_dev = &pdev->dev;
wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
if (wdt_mem == NULL) { if (!wdt)
dev_err(dev, "no memory resource specified\n"); return -ENOMEM;
return -ENOENT;
} wdt->dev = &pdev->dev;
spin_lock_init(&wdt->lock);
wdt->wdt_device = s3c2410_wdd;
wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (wdt_irq == NULL) { if (wdt_irq == NULL) {
@ -339,35 +362,40 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
} }
/* get the memory region for the watchdog timer */ /* get the memory region for the watchdog timer */
wdt_base = devm_ioremap_resource(dev, wdt_mem); wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (IS_ERR(wdt_base)) { wdt->reg_base = devm_ioremap_resource(dev, wdt_mem);
ret = PTR_ERR(wdt_base); if (IS_ERR(wdt->reg_base)) {
ret = PTR_ERR(wdt->reg_base);
goto err; goto err;
} }
DBG("probe: mapped wdt_base=%p\n", wdt_base); DBG("probe: mapped reg_base=%p\n", wdt->reg_base);
wdt_clock = devm_clk_get(dev, "watchdog"); wdt->clock = devm_clk_get(dev, "watchdog");
if (IS_ERR(wdt_clock)) { if (IS_ERR(wdt->clock)) {
dev_err(dev, "failed to find watchdog clock source\n"); dev_err(dev, "failed to find watchdog clock source\n");
ret = PTR_ERR(wdt_clock); ret = PTR_ERR(wdt->clock);
goto err; goto err;
} }
clk_prepare_enable(wdt_clock); clk_prepare_enable(wdt->clock);
ret = s3c2410wdt_cpufreq_register(); ret = s3c2410wdt_cpufreq_register(wdt);
if (ret < 0) { if (ret < 0) {
dev_err(dev, "failed to register cpufreq\n"); dev_err(dev, "failed to register cpufreq\n");
goto err_clk; goto err_clk;
} }
watchdog_set_drvdata(&wdt->wdt_device, wdt);
/* see if we can actually set the requested timer margin, and if /* see if we can actually set the requested timer margin, and if
* not, try the default value */ * not, try the default value */
watchdog_init_timeout(&s3c2410_wdd, tmr_margin, &pdev->dev); watchdog_init_timeout(&wdt->wdt_device, tmr_margin, &pdev->dev);
if (s3c2410wdt_set_heartbeat(&s3c2410_wdd, s3c2410_wdd.timeout)) { ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
started = s3c2410wdt_set_heartbeat(&s3c2410_wdd, wdt->wdt_device.timeout);
if (ret) {
started = s3c2410wdt_set_heartbeat(&wdt->wdt_device,
CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME); CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
if (started == 0) if (started == 0)
@ -386,9 +414,9 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
goto err_cpufreq; goto err_cpufreq;
} }
watchdog_set_nowayout(&s3c2410_wdd, nowayout); watchdog_set_nowayout(&wdt->wdt_device, nowayout);
ret = watchdog_register_device(&s3c2410_wdd); ret = watchdog_register_device(&wdt->wdt_device);
if (ret) { if (ret) {
dev_err(dev, "cannot register watchdog (%d)\n", ret); dev_err(dev, "cannot register watchdog (%d)\n", ret);
goto err_cpufreq; goto err_cpufreq;
@ -396,18 +424,20 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
if (tmr_atboot && started == 0) { if (tmr_atboot && started == 0) {
dev_info(dev, "starting watchdog timer\n"); dev_info(dev, "starting watchdog timer\n");
s3c2410wdt_start(&s3c2410_wdd); s3c2410wdt_start(&wdt->wdt_device);
} else if (!tmr_atboot) { } else if (!tmr_atboot) {
/* if we're not enabling the watchdog, then ensure it is /* if we're not enabling the watchdog, then ensure it is
* disabled if it has been left running from the bootloader * disabled if it has been left running from the bootloader
* or other source */ * or other source */
s3c2410wdt_stop(&s3c2410_wdd); s3c2410wdt_stop(&wdt->wdt_device);
} }
platform_set_drvdata(pdev, wdt);
/* print out a statement of readiness */ /* print out a statement of readiness */
wtcon = readl(wdt_base + S3C2410_WTCON); wtcon = readl(wdt->reg_base + S3C2410_WTCON);
dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n", dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n",
(wtcon & S3C2410_WTCON_ENABLE) ? "" : "in", (wtcon & S3C2410_WTCON_ENABLE) ? "" : "in",
@ -417,64 +447,64 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
return 0; return 0;
err_cpufreq: err_cpufreq:
s3c2410wdt_cpufreq_deregister(); s3c2410wdt_cpufreq_deregister(wdt);
err_clk: err_clk:
clk_disable_unprepare(wdt_clock); clk_disable_unprepare(wdt->clock);
wdt_clock = NULL; wdt->clock = NULL;
err: err:
wdt_irq = NULL;
wdt_mem = NULL;
return ret; return ret;
} }
static int s3c2410wdt_remove(struct platform_device *dev) static int s3c2410wdt_remove(struct platform_device *dev)
{ {
watchdog_unregister_device(&s3c2410_wdd); struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
s3c2410wdt_cpufreq_deregister(); watchdog_unregister_device(&wdt->wdt_device);
clk_disable_unprepare(wdt_clock); s3c2410wdt_cpufreq_deregister(wdt);
wdt_clock = NULL;
clk_disable_unprepare(wdt->clock);
wdt->clock = NULL;
wdt_irq = NULL;
wdt_mem = NULL;
return 0; return 0;
} }
static void s3c2410wdt_shutdown(struct platform_device *dev) static void s3c2410wdt_shutdown(struct platform_device *dev)
{ {
s3c2410wdt_stop(&s3c2410_wdd); struct s3c2410_wdt *wdt = platform_get_drvdata(dev);
s3c2410wdt_stop(&wdt->wdt_device);
} }
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
static unsigned long wtcon_save;
static unsigned long wtdat_save;
static int s3c2410wdt_suspend(struct device *dev) static int s3c2410wdt_suspend(struct device *dev)
{ {
struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
/* Save watchdog state, and turn it off. */ /* Save watchdog state, and turn it off. */
wtcon_save = readl(wdt_base + S3C2410_WTCON); wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON);
wtdat_save = readl(wdt_base + S3C2410_WTDAT); wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT);
/* Note that WTCNT doesn't need to be saved. */ /* Note that WTCNT doesn't need to be saved. */
s3c2410wdt_stop(&s3c2410_wdd); s3c2410wdt_stop(&wdt->wdt_device);
return 0; return 0;
} }
static int s3c2410wdt_resume(struct device *dev) static int s3c2410wdt_resume(struct device *dev)
{ {
/* Restore watchdog state. */ struct s3c2410_wdt *wdt = dev_get_drvdata(dev);
writel(wtdat_save, wdt_base + S3C2410_WTDAT); /* Restore watchdog state. */
writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */ writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTDAT);
writel(wtcon_save, wdt_base + S3C2410_WTCON); writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */
writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON);
dev_info(dev, "watchdog %sabled\n", dev_info(dev, "watchdog %sabled\n",
(wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis"); (wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
return 0; return 0;
} }

View file

@ -0,0 +1,237 @@
/*
* sunxi Watchdog Driver
*
* Copyright (c) 2013 Carlo Caione
* 2012 Henrik Nordstrom
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Based on xen_wdt.c
* (c) Copyright 2010 Novell, Inc.
*/
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#define WDT_MAX_TIMEOUT 16
#define WDT_MIN_TIMEOUT 1
#define WDT_MODE_TIMEOUT(n) ((n) << 3)
#define WDT_TIMEOUT_MASK WDT_MODE_TIMEOUT(0x0F)
#define WDT_CTRL 0x00
#define WDT_CTRL_RELOAD ((1 << 0) | (0x0a57 << 1))
#define WDT_MODE 0x04
#define WDT_MODE_EN (1 << 0)
#define WDT_MODE_RST_EN (1 << 1)
#define DRV_NAME "sunxi-wdt"
#define DRV_VERSION "1.0"
static bool nowayout = WATCHDOG_NOWAYOUT;
static unsigned int timeout = WDT_MAX_TIMEOUT;
struct sunxi_wdt_dev {
struct watchdog_device wdt_dev;
void __iomem *wdt_base;
};
/*
* wdt_timeout_map maps the watchdog timer interval value in seconds to
* the value of the register WDT_MODE bit 3:6
*
* [timeout seconds] = register value
*
*/
static const int wdt_timeout_map[] = {
[1] = 0b0001, /* 1s */
[2] = 0b0010, /* 2s */
[3] = 0b0011, /* 3s */
[4] = 0b0100, /* 4s */
[5] = 0b0101, /* 5s */
[6] = 0b0110, /* 6s */
[8] = 0b0111, /* 8s */
[10] = 0b1000, /* 10s */
[12] = 0b1001, /* 12s */
[14] = 0b1010, /* 14s */
[16] = 0b1011, /* 16s */
};
static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
{
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
void __iomem *wdt_base = sunxi_wdt->wdt_base;
iowrite32(WDT_CTRL_RELOAD, wdt_base + WDT_CTRL);
return 0;
}
static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
unsigned int timeout)
{
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
void __iomem *wdt_base = sunxi_wdt->wdt_base;
u32 reg;
if (wdt_timeout_map[timeout] == 0)
timeout++;
sunxi_wdt->wdt_dev.timeout = timeout;
reg = ioread32(wdt_base + WDT_MODE);
reg &= ~WDT_TIMEOUT_MASK;
reg |= WDT_MODE_TIMEOUT(wdt_timeout_map[timeout]);
iowrite32(reg, wdt_base + WDT_MODE);
sunxi_wdt_ping(wdt_dev);
return 0;
}
static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
{
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
void __iomem *wdt_base = sunxi_wdt->wdt_base;
iowrite32(0, wdt_base + WDT_MODE);
return 0;
}
static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
{
u32 reg;
struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
void __iomem *wdt_base = sunxi_wdt->wdt_base;
int ret;
ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
sunxi_wdt->wdt_dev.timeout);
if (ret < 0)
return ret;
reg = ioread32(wdt_base + WDT_MODE);
reg |= (WDT_MODE_RST_EN | WDT_MODE_EN);
iowrite32(reg, wdt_base + WDT_MODE);
return 0;
}
static const struct watchdog_info sunxi_wdt_info = {
.identity = DRV_NAME,
.options = WDIOF_SETTIMEOUT |
WDIOF_KEEPALIVEPING |
WDIOF_MAGICCLOSE,
};
static const struct watchdog_ops sunxi_wdt_ops = {
.owner = THIS_MODULE,
.start = sunxi_wdt_start,
.stop = sunxi_wdt_stop,
.ping = sunxi_wdt_ping,
.set_timeout = sunxi_wdt_set_timeout,
};
static int __init sunxi_wdt_probe(struct platform_device *pdev)
{
struct sunxi_wdt_dev *sunxi_wdt;
struct resource *res;
int err;
sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
if (!sunxi_wdt)
return -EINVAL;
platform_set_drvdata(pdev, sunxi_wdt);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(sunxi_wdt->wdt_base))
return PTR_ERR(sunxi_wdt->wdt_base);
sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
sunxi_wdt->wdt_dev.parent = &pdev->dev;
watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
err = watchdog_register_device(&sunxi_wdt->wdt_dev);
if (unlikely(err))
return err;
dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
sunxi_wdt->wdt_dev.timeout, nowayout);
return 0;
}
static int __exit sunxi_wdt_remove(struct platform_device *pdev)
{
struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
watchdog_unregister_device(&sunxi_wdt->wdt_dev);
watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);
return 0;
}
static void sunxi_wdt_shutdown(struct platform_device *pdev)
{
struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
}
static const struct of_device_id sunxi_wdt_dt_ids[] = {
{ .compatible = "allwinner,sun4i-wdt" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
static struct platform_driver sunxi_wdt_driver = {
.probe = sunxi_wdt_probe,
.remove = sunxi_wdt_remove,
.shutdown = sunxi_wdt_shutdown,
.driver = {
.owner = THIS_MODULE,
.name = DRV_NAME,
.of_match_table = of_match_ptr(sunxi_wdt_dt_ids)
},
};
module_platform_driver(sunxi_wdt_driver);
module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
MODULE_VERSION(DRV_VERSION);

View file

@ -403,21 +403,11 @@ static int ts72xx_wdt_probe(struct platform_device *pdev)
} }
r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0); r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r1) {
dev_err(&pdev->dev, "failed to get memory resource\n");
return -ENODEV;
}
wdt->control_reg = devm_ioremap_resource(&pdev->dev, r1); wdt->control_reg = devm_ioremap_resource(&pdev->dev, r1);
if (IS_ERR(wdt->control_reg)) if (IS_ERR(wdt->control_reg))
return PTR_ERR(wdt->control_reg); return PTR_ERR(wdt->control_reg);
r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1); r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (!r2) {
dev_err(&pdev->dev, "failed to get memory resource\n");
return -ENODEV;
}
wdt->feed_reg = devm_ioremap_resource(&pdev->dev, r2); wdt->feed_reg = devm_ioremap_resource(&pdev->dev, r2);
if (IS_ERR(wdt->feed_reg)) if (IS_ERR(wdt->feed_reg))
return PTR_ERR(wdt->feed_reg); return PTR_ERR(wdt->feed_reg);