Merge commit 'v2.6.29-rc4' into core/percpu
Conflicts: arch/x86/mach-voyager/voyager_smp.c arch/x86/mm/fault.c
This commit is contained in:
Ingo Molnar
commit
249d51b53a
586 changed files with 9676 additions and 5825 deletions
4
.mailmap
4
.mailmap
|
|
@ -92,6 +92,7 @@ Rudolf Marek <R.Marek@sh.cvut.cz>
|
||||||
Rui Saraiva <rmps@joel.ist.utl.pt>
|
Rui Saraiva <rmps@joel.ist.utl.pt>
|
||||||
Sachin P Sant <ssant@in.ibm.com>
|
Sachin P Sant <ssant@in.ibm.com>
|
||||||
Sam Ravnborg <sam@mars.ravnborg.org>
|
Sam Ravnborg <sam@mars.ravnborg.org>
|
||||||
|
Sascha Hauer <s.hauer@pengutronix.de>
|
||||||
S.Çağlar Onur <caglar@pardus.org.tr>
|
S.Çağlar Onur <caglar@pardus.org.tr>
|
||||||
Simon Kelley <simon@thekelleys.org.uk>
|
Simon Kelley <simon@thekelleys.org.uk>
|
||||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||||
|
|
@ -100,6 +101,7 @@ Tejun Heo <htejun@gmail.com>
|
||||||
Thomas Graf <tgraf@suug.ch>
|
Thomas Graf <tgraf@suug.ch>
|
||||||
Tony Luck <tony.luck@intel.com>
|
Tony Luck <tony.luck@intel.com>
|
||||||
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
||||||
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
|
|
||||||
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
|
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
|
||||||
|
Uwe Kleine-König <ukl@pengutronix.de>
|
||||||
|
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
|
||||||
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
||||||
|
|
|
||||||
63
Documentation/block/queue-sysfs.txt
Normal file
63
Documentation/block/queue-sysfs.txt
Normal file
|
|
@ -0,0 +1,63 @@
|
||||||
|
Queue sysfs files
|
||||||
|
=================
|
||||||
|
|
||||||
|
This text file will detail the queue files that are located in the sysfs tree
|
||||||
|
for each block device. Note that stacked devices typically do not export
|
||||||
|
any settings, since their queue merely functions are a remapping target.
|
||||||
|
These files are the ones found in the /sys/block/xxx/queue/ directory.
|
||||||
|
|
||||||
|
Files denoted with a RO postfix are readonly and the RW postfix means
|
||||||
|
read-write.
|
||||||
|
|
||||||
|
hw_sector_size (RO)
|
||||||
|
-------------------
|
||||||
|
This is the hardware sector size of the device, in bytes.
|
||||||
|
|
||||||
|
max_hw_sectors_kb (RO)
|
||||||
|
----------------------
|
||||||
|
This is the maximum number of kilobytes supported in a single data transfer.
|
||||||
|
|
||||||
|
max_sectors_kb (RW)
|
||||||
|
-------------------
|
||||||
|
This is the maximum number of kilobytes that the block layer will allow
|
||||||
|
for a filesystem request. Must be smaller than or equal to the maximum
|
||||||
|
size allowed by the hardware.
|
||||||
|
|
||||||
|
nomerges (RW)
|
||||||
|
-------------
|
||||||
|
This enables the user to disable the lookup logic involved with IO merging
|
||||||
|
requests in the block layer. Merging may still occur through a direct
|
||||||
|
1-hit cache, since that comes for (almost) free. The IO scheduler will not
|
||||||
|
waste cycles doing tree/hash lookups for merges if nomerges is 1. Defaults
|
||||||
|
to 0, enabling all merges.
|
||||||
|
|
||||||
|
nr_requests (RW)
|
||||||
|
----------------
|
||||||
|
This controls how many requests may be allocated in the block layer for
|
||||||
|
read or write requests. Note that the total allocated number may be twice
|
||||||
|
this amount, since it applies only to reads or writes (not the accumulated
|
||||||
|
sum).
|
||||||
|
|
||||||
|
read_ahead_kb (RW)
|
||||||
|
------------------
|
||||||
|
Maximum number of kilobytes to read-ahead for filesystems on this block
|
||||||
|
device.
|
||||||
|
|
||||||
|
rq_affinity (RW)
|
||||||
|
----------------
|
||||||
|
If this option is enabled, the block layer will migrate request completions
|
||||||
|
to the CPU that originally submitted the request. For some workloads
|
||||||
|
this provides a significant reduction in CPU cycles due to caching effects.
|
||||||
|
|
||||||
|
scheduler (RW)
|
||||||
|
--------------
|
||||||
|
When read, this file will display the current and available IO schedulers
|
||||||
|
for this block device. The currently active IO scheduler will be enclosed
|
||||||
|
in [] brackets. Writing an IO scheduler name to this file will switch
|
||||||
|
control of this block device to that new IO scheduler. Note that writing
|
||||||
|
an IO scheduler name to this file will attempt to load that IO scheduler
|
||||||
|
module, if it isn't already present in the system.
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
Jens Axboe <jens.axboe@oracle.com>, February 2009
|
||||||
|
|
@ -195,19 +195,3 @@ scaling_setspeed. By "echoing" a new frequency into this
|
||||||
you can change the speed of the CPU,
|
you can change the speed of the CPU,
|
||||||
but only within the limits of
|
but only within the limits of
|
||||||
scaling_min_freq and scaling_max_freq.
|
scaling_min_freq and scaling_max_freq.
|
||||||
|
|
||||||
|
|
||||||
3.2 Deprecated Interfaces
|
|
||||||
-------------------------
|
|
||||||
|
|
||||||
Depending on your kernel configuration, you might find the following
|
|
||||||
cpufreq-related files:
|
|
||||||
/proc/cpufreq
|
|
||||||
/proc/sys/cpu/*/speed
|
|
||||||
/proc/sys/cpu/*/speed-min
|
|
||||||
/proc/sys/cpu/*/speed-max
|
|
||||||
|
|
||||||
These are files for deprecated interfaces to cpufreq, which offer far
|
|
||||||
less functionality. Because of this, these interfaces aren't described
|
|
||||||
here.
|
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -9,6 +9,7 @@ that support it. For example, a given bus might look like this:
|
||||||
| |-- class
|
| |-- class
|
||||||
| |-- config
|
| |-- config
|
||||||
| |-- device
|
| |-- device
|
||||||
|
| |-- enable
|
||||||
| |-- irq
|
| |-- irq
|
||||||
| |-- local_cpus
|
| |-- local_cpus
|
||||||
| |-- resource
|
| |-- resource
|
||||||
|
|
@ -32,6 +33,7 @@ files, each with their own function.
|
||||||
class PCI class (ascii, ro)
|
class PCI class (ascii, ro)
|
||||||
config PCI config space (binary, rw)
|
config PCI config space (binary, rw)
|
||||||
device PCI device (ascii, ro)
|
device PCI device (ascii, ro)
|
||||||
|
enable Whether the device is enabled (ascii, rw)
|
||||||
irq IRQ number (ascii, ro)
|
irq IRQ number (ascii, ro)
|
||||||
local_cpus nearby CPU mask (cpumask, ro)
|
local_cpus nearby CPU mask (cpumask, ro)
|
||||||
resource PCI resource host addresses (ascii, ro)
|
resource PCI resource host addresses (ascii, ro)
|
||||||
|
|
@ -57,10 +59,19 @@ used to do actual device programming from userspace. Note that some platforms
|
||||||
don't support mmapping of certain resources, so be sure to check the return
|
don't support mmapping of certain resources, so be sure to check the return
|
||||||
value from any attempted mmap.
|
value from any attempted mmap.
|
||||||
|
|
||||||
|
The 'enable' file provides a counter that indicates how many times the device
|
||||||
|
has been enabled. If the 'enable' file currently returns '4', and a '1' is
|
||||||
|
echoed into it, it will then return '5'. Echoing a '0' into it will decrease
|
||||||
|
the count. Even when it returns to 0, though, some of the initialisation
|
||||||
|
may not be reversed.
|
||||||
|
|
||||||
The 'rom' file is special in that it provides read-only access to the device's
|
The 'rom' file is special in that it provides read-only access to the device's
|
||||||
ROM file, if available. It's disabled by default, however, so applications
|
ROM file, if available. It's disabled by default, however, so applications
|
||||||
should write the string "1" to the file to enable it before attempting a read
|
should write the string "1" to the file to enable it before attempting a read
|
||||||
call, and disable it following the access by writing "0" to the file.
|
call, and disable it following the access by writing "0" to the file. Note
|
||||||
|
that the device must be enabled for a rom read to return data succesfully.
|
||||||
|
In the event a driver is not bound to the device, it can be enabled using the
|
||||||
|
'enable' file, documented above.
|
||||||
|
|
||||||
Accessing legacy resources through sysfs
|
Accessing legacy resources through sysfs
|
||||||
----------------------------------------
|
----------------------------------------
|
||||||
|
|
|
||||||
|
|
@ -79,13 +79,6 @@ Mount options
|
||||||
|
|
||||||
(*) == default.
|
(*) == default.
|
||||||
|
|
||||||
norm_unmount (*) commit on unmount; the journal is committed
|
|
||||||
when the file-system is unmounted so that the
|
|
||||||
next mount does not have to replay the journal
|
|
||||||
and it becomes very fast;
|
|
||||||
fast_unmount do not commit on unmount; this option makes
|
|
||||||
unmount faster, but the next mount slower
|
|
||||||
because of the need to replay the journal.
|
|
||||||
bulk_read read more in one go to take advantage of flash
|
bulk_read read more in one go to take advantage of flash
|
||||||
media that read faster sequentially
|
media that read faster sequentially
|
||||||
no_bulk_read (*) do not bulk-read
|
no_bulk_read (*) do not bulk-read
|
||||||
|
|
|
||||||
180
Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
Normal file
180
Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
Normal file
|
|
@ -0,0 +1,180 @@
|
||||||
|
MPC5200 Device Tree Bindings
|
||||||
|
----------------------------
|
||||||
|
|
||||||
|
(c) 2006-2009 Secret Lab Technologies Ltd
|
||||||
|
Grant Likely <grant.likely@secretlab.ca>
|
||||||
|
|
||||||
|
Naming conventions
|
||||||
|
------------------
|
||||||
|
For mpc5200 on-chip devices, the format for each compatible value is
|
||||||
|
<chip>-<device>[-<mode>]. The OS should be able to match a device driver
|
||||||
|
to the device based solely on the compatible value. If two drivers
|
||||||
|
match on the compatible list; the 'most compatible' driver should be
|
||||||
|
selected.
|
||||||
|
|
||||||
|
The split between the MPC5200 and the MPC5200B leaves a bit of a
|
||||||
|
conundrum. How should the compatible property be set up to provide
|
||||||
|
maximum compatibility information; but still accurately describe the
|
||||||
|
chip? For the MPC5200; the answer is easy. Most of the SoC devices
|
||||||
|
originally appeared on the MPC5200. Since they didn't exist anywhere
|
||||||
|
else; the 5200 compatible properties will contain only one item;
|
||||||
|
"fsl,mpc5200-<device>".
|
||||||
|
|
||||||
|
The 5200B is almost the same as the 5200, but not quite. It fixes
|
||||||
|
silicon bugs and it adds a small number of enhancements. Most of the
|
||||||
|
devices either provide exactly the same interface as on the 5200. A few
|
||||||
|
devices have extra functions but still have a backwards compatible mode.
|
||||||
|
To express this information as completely as possible, 5200B device trees
|
||||||
|
should have two items in the compatible list:
|
||||||
|
compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
|
||||||
|
|
||||||
|
It is *strongly* recommended that 5200B device trees follow this convention
|
||||||
|
(instead of only listing the base mpc5200 item).
|
||||||
|
|
||||||
|
ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
|
||||||
|
ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
|
||||||
|
|
||||||
|
Modal devices, like PSCs, also append the configured function to the
|
||||||
|
end of the compatible field. ie. A PSC in i2s mode would specify
|
||||||
|
"fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
|
||||||
|
avoid naming conflicts with non-psc devices providing the same
|
||||||
|
function. For example, "fsl,mpc5200-spi" and "fsl,mpc5200-psc-spi" describe
|
||||||
|
the mpc5200 simple spi device and a PSC spi mode respectively.
|
||||||
|
|
||||||
|
At the time of writing, exact chip may be either 'fsl,mpc5200' or
|
||||||
|
'fsl,mpc5200b'.
|
||||||
|
|
||||||
|
The soc node
|
||||||
|
------------
|
||||||
|
This node describes the on chip SOC peripherals. Every mpc5200 based
|
||||||
|
board will have this node, and as such there is a common naming
|
||||||
|
convention for SOC devices.
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
name description
|
||||||
|
---- -----------
|
||||||
|
ranges Memory range of the internal memory mapped registers.
|
||||||
|
Should be <0 [baseaddr] 0xc000>
|
||||||
|
reg Should be <[baseaddr] 0x100>
|
||||||
|
compatible mpc5200: "fsl,mpc5200-immr"
|
||||||
|
mpc5200b: "fsl,mpc5200b-immr"
|
||||||
|
system-frequency 'fsystem' frequency in Hz; XLB, IPB, USB and PCI
|
||||||
|
clocks are derived from the fsystem clock.
|
||||||
|
bus-frequency IPB bus frequency in Hz. Clock rate
|
||||||
|
used by most of the soc devices.
|
||||||
|
|
||||||
|
soc child nodes
|
||||||
|
---------------
|
||||||
|
Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
|
||||||
|
|
||||||
|
Note: The tables below show the value for the mpc5200. A mpc5200b device
|
||||||
|
tree should use the "fsl,mpc5200b-<device>","fsl,mpc5200-<device>" form.
|
||||||
|
|
||||||
|
Required soc5200 child nodes:
|
||||||
|
name compatible Description
|
||||||
|
---- ---------- -----------
|
||||||
|
cdm@<addr> fsl,mpc5200-cdm Clock Distribution
|
||||||
|
interrupt-controller@<addr> fsl,mpc5200-pic need an interrupt
|
||||||
|
controller to boot
|
||||||
|
bestcomm@<addr> fsl,mpc5200-bestcomm Bestcomm DMA controller
|
||||||
|
|
||||||
|
Recommended soc5200 child nodes; populate as needed for your board
|
||||||
|
name compatible Description
|
||||||
|
---- ---------- -----------
|
||||||
|
timer@<addr> fsl,mpc5200-gpt General purpose timers
|
||||||
|
gpio@<addr> fsl,mpc5200-gpio MPC5200 simple gpio controller
|
||||||
|
gpio@<addr> fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio controller
|
||||||
|
rtc@<addr> fsl,mpc5200-rtc Real time clock
|
||||||
|
mscan@<addr> fsl,mpc5200-mscan CAN bus controller
|
||||||
|
pci@<addr> fsl,mpc5200-pci PCI bridge
|
||||||
|
serial@<addr> fsl,mpc5200-psc-uart PSC in serial mode
|
||||||
|
i2s@<addr> fsl,mpc5200-psc-i2s PSC in i2s mode
|
||||||
|
ac97@<addr> fsl,mpc5200-psc-ac97 PSC in ac97 mode
|
||||||
|
spi@<addr> fsl,mpc5200-psc-spi PSC in spi mode
|
||||||
|
irda@<addr> fsl,mpc5200-psc-irda PSC in IrDA mode
|
||||||
|
spi@<addr> fsl,mpc5200-spi MPC5200 spi device
|
||||||
|
ethernet@<addr> fsl,mpc5200-fec MPC5200 ethernet device
|
||||||
|
ata@<addr> fsl,mpc5200-ata IDE ATA interface
|
||||||
|
i2c@<addr> fsl,mpc5200-i2c I2C controller
|
||||||
|
usb@<addr> fsl,mpc5200-ohci,ohci-be USB controller
|
||||||
|
xlb@<addr> fsl,mpc5200-xlb XLB arbitrator
|
||||||
|
|
||||||
|
fsl,mpc5200-gpt nodes
|
||||||
|
---------------------
|
||||||
|
On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
|
||||||
|
design supports the internal wdt, then the device node for GPT0 should
|
||||||
|
include the empty property 'fsl,has-wdt'.
|
||||||
|
|
||||||
|
An mpc5200-gpt can be used as a single line GPIO controller. To do so,
|
||||||
|
add the following properties to the gpt node:
|
||||||
|
gpio-controller;
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
When referencing the GPIO line from another node, the first cell must always
|
||||||
|
be zero and the second cell represents the gpio flags and described in the
|
||||||
|
gpio device tree binding.
|
||||||
|
|
||||||
|
An mpc5200-gpt can be used as a single line edge sensitive interrupt
|
||||||
|
controller. To do so, add the following properties to the gpt node:
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
When referencing the IRQ line from another node, the cell represents the
|
||||||
|
sense mode; 1 for edge rising, 2 for edge falling.
|
||||||
|
|
||||||
|
fsl,mpc5200-psc nodes
|
||||||
|
---------------------
|
||||||
|
The PSCs should include a cell-index which is the index of the PSC in
|
||||||
|
hardware. cell-index is used to determine which shared SoC registers to
|
||||||
|
use when setting up PSC clocking. cell-index number starts at '0'. ie:
|
||||||
|
PSC1 has 'cell-index = <0>'
|
||||||
|
PSC4 has 'cell-index = <3>'
|
||||||
|
|
||||||
|
PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
|
||||||
|
i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
|
||||||
|
compatible field.
|
||||||
|
|
||||||
|
|
||||||
|
fsl,mpc5200-gpio and fsl,mpc5200-gpio-wkup nodes
|
||||||
|
------------------------------------------------
|
||||||
|
Each GPIO controller node should have the empty property gpio-controller and
|
||||||
|
#gpio-cells set to 2. First cell is the GPIO number which is interpreted
|
||||||
|
according to the bit numbers in the GPIO control registers. The second cell
|
||||||
|
is for flags which is currently unused.
|
||||||
|
|
||||||
|
fsl,mpc5200-fec nodes
|
||||||
|
---------------------
|
||||||
|
The FEC node can specify one of the following properties to configure
|
||||||
|
the MII link:
|
||||||
|
- fsl,7-wire-mode - An empty property that specifies the link uses 7-wire
|
||||||
|
mode instead of MII
|
||||||
|
- current-speed - Specifies that the MII should be configured for a fixed
|
||||||
|
speed. This property should contain two cells. The
|
||||||
|
first cell specifies the speed in Mbps and the second
|
||||||
|
should be '0' for half duplex and '1' for full duplex
|
||||||
|
- phy-handle - Contains a phandle to an Ethernet PHY.
|
||||||
|
|
||||||
|
Interrupt controller (fsl,mpc5200-pic) node
|
||||||
|
-------------------------------------------
|
||||||
|
The mpc5200 pic binding splits hardware IRQ numbers into two levels. The
|
||||||
|
split reflects the layout of the PIC hardware itself, which groups
|
||||||
|
interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
|
||||||
|
Bestcomm dma engine has it's own set of interrupt sources which are
|
||||||
|
cascaded off of peripheral interrupt 0, which the driver interprets as a
|
||||||
|
fourth group, SDMA.
|
||||||
|
|
||||||
|
The interrupts property for device nodes using the mpc5200 pic consists
|
||||||
|
of three cells; <L1 L2 level>
|
||||||
|
|
||||||
|
L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
|
||||||
|
L2 := interrupt number; directly mapped from the value in the
|
||||||
|
"ICTL PerStat, MainStat, CritStat Encoded Register"
|
||||||
|
level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
|
||||||
|
|
||||||
|
For external IRQs, use the following interrupt property values (how to
|
||||||
|
specify external interrupts is a frequently asked question):
|
||||||
|
External interrupts:
|
||||||
|
external irq0: interrupts = <0 0 n>;
|
||||||
|
external irq1: interrupts = <1 1 n>;
|
||||||
|
external irq2: interrupts = <1 2 n>;
|
||||||
|
external irq3: interrupts = <1 3 n>;
|
||||||
|
'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low)
|
||||||
|
|
||||||
|
|
@ -1,277 +0,0 @@
|
||||||
MPC5200 Device Tree Bindings
|
|
||||||
----------------------------
|
|
||||||
|
|
||||||
(c) 2006-2007 Secret Lab Technologies Ltd
|
|
||||||
Grant Likely <grant.likely at secretlab.ca>
|
|
||||||
|
|
||||||
********** DRAFT ***********
|
|
||||||
* WARNING: Do not depend on the stability of these bindings just yet.
|
|
||||||
* The MPC5200 device tree conventions are still in flux
|
|
||||||
* Keep an eye on the linuxppc-dev mailing list for more details
|
|
||||||
********** DRAFT ***********
|
|
||||||
|
|
||||||
I - Introduction
|
|
||||||
================
|
|
||||||
Boards supported by the arch/powerpc architecture require device tree be
|
|
||||||
passed by the boot loader to the kernel at boot time. The device tree
|
|
||||||
describes what devices are present on the board and how they are
|
|
||||||
connected. The device tree can either be passed as a binary blob (as
|
|
||||||
described in Documentation/powerpc/booting-without-of.txt), or passed
|
|
||||||
by Open Firmware (IEEE 1275) compatible firmware using an OF compatible
|
|
||||||
client interface API.
|
|
||||||
|
|
||||||
This document specifies the requirements on the device-tree for mpc5200
|
|
||||||
based boards. These requirements are above and beyond the details
|
|
||||||
specified in either the Open Firmware spec or booting-without-of.txt
|
|
||||||
|
|
||||||
All new mpc5200-based boards are expected to match this document. In
|
|
||||||
cases where this document is not sufficient to support a new board port,
|
|
||||||
this document should be updated as part of adding the new board support.
|
|
||||||
|
|
||||||
II - Philosophy
|
|
||||||
===============
|
|
||||||
The core of this document is naming convention. The whole point of
|
|
||||||
defining this convention is to reduce or eliminate the number of
|
|
||||||
special cases required to support a 5200 board. If all 5200 boards
|
|
||||||
follow the same convention, then generic 5200 support code will work
|
|
||||||
rather than coding special cases for each new board.
|
|
||||||
|
|
||||||
This section tries to capture the thought process behind why the naming
|
|
||||||
convention is what it is.
|
|
||||||
|
|
||||||
1. names
|
|
||||||
---------
|
|
||||||
There is strong convention/requirements already established for children
|
|
||||||
of the root node. 'cpus' describes the processor cores, 'memory'
|
|
||||||
describes memory, and 'chosen' provides boot configuration. Other nodes
|
|
||||||
are added to describe devices attached to the processor local bus.
|
|
||||||
|
|
||||||
Following convention already established with other system-on-chip
|
|
||||||
processors, 5200 device trees should use the name 'soc5200' for the
|
|
||||||
parent node of on chip devices, and the root node should be its parent.
|
|
||||||
|
|
||||||
Child nodes are typically named after the configured function. ie.
|
|
||||||
the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'.
|
|
||||||
|
|
||||||
2. device_type property
|
|
||||||
-----------------------
|
|
||||||
similar to the node name convention above; the device_type reflects the
|
|
||||||
configured function of a device. ie. 'serial' for a uart and 'spi' for
|
|
||||||
an spi controller. However, while node names *should* reflect the
|
|
||||||
configured function, device_type *must* match the configured function
|
|
||||||
exactly.
|
|
||||||
|
|
||||||
3. compatible property
|
|
||||||
----------------------
|
|
||||||
Since device_type isn't enough to match devices to drivers, there also
|
|
||||||
needs to be a naming convention for the compatible property. Compatible
|
|
||||||
is an list of device descriptions sorted from specific to generic. For
|
|
||||||
the mpc5200, the required format for each compatible value is
|
|
||||||
<chip>-<device>[-<mode>]. The OS should be able to match a device driver
|
|
||||||
to the device based solely on the compatible value. If two drivers
|
|
||||||
match on the compatible list; the 'most compatible' driver should be
|
|
||||||
selected.
|
|
||||||
|
|
||||||
The split between the MPC5200 and the MPC5200B leaves a bit of a
|
|
||||||
conundrum. How should the compatible property be set up to provide
|
|
||||||
maximum compatibility information; but still accurately describe the
|
|
||||||
chip? For the MPC5200; the answer is easy. Most of the SoC devices
|
|
||||||
originally appeared on the MPC5200. Since they didn't exist anywhere
|
|
||||||
else; the 5200 compatible properties will contain only one item;
|
|
||||||
"mpc5200-<device>".
|
|
||||||
|
|
||||||
The 5200B is almost the same as the 5200, but not quite. It fixes
|
|
||||||
silicon bugs and it adds a small number of enhancements. Most of the
|
|
||||||
devices either provide exactly the same interface as on the 5200. A few
|
|
||||||
devices have extra functions but still have a backwards compatible mode.
|
|
||||||
To express this information as completely as possible, 5200B device trees
|
|
||||||
should have two items in the compatible list;
|
|
||||||
"mpc5200b-<device>\0mpc5200-<device>". It is *strongly* recommended
|
|
||||||
that 5200B device trees follow this convention (instead of only listing
|
|
||||||
the base mpc5200 item).
|
|
||||||
|
|
||||||
If another chip appear on the market with one of the mpc5200 SoC
|
|
||||||
devices, then the compatible list should include mpc5200-<device>.
|
|
||||||
|
|
||||||
ie. ethernet on mpc5200: compatible = "mpc5200-ethernet"
|
|
||||||
ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet"
|
|
||||||
|
|
||||||
Modal devices, like PSCs, also append the configured function to the
|
|
||||||
end of the compatible field. ie. A PSC in i2s mode would specify
|
|
||||||
"mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to
|
|
||||||
avoid naming conflicts with non-psc devices providing the same
|
|
||||||
function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe
|
|
||||||
the mpc5200 simple spi device and a PSC spi mode respectively.
|
|
||||||
|
|
||||||
If the soc device is more generic and present on other SOCs, the
|
|
||||||
compatible property can specify the more generic device type also.
|
|
||||||
|
|
||||||
ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan";
|
|
||||||
|
|
||||||
At the time of writing, exact chip may be either 'mpc5200' or
|
|
||||||
'mpc5200b'.
|
|
||||||
|
|
||||||
Device drivers should always try to match as generically as possible.
|
|
||||||
|
|
||||||
III - Structure
|
|
||||||
===============
|
|
||||||
The device tree for an mpc5200 board follows the structure defined in
|
|
||||||
booting-without-of.txt with the following additional notes:
|
|
||||||
|
|
||||||
0) the root node
|
|
||||||
----------------
|
|
||||||
Typical root description node; see booting-without-of
|
|
||||||
|
|
||||||
1) The cpus node
|
|
||||||
----------------
|
|
||||||
The cpus node follows the basic layout described in booting-without-of.
|
|
||||||
The bus-frequency property holds the XLB bus frequency
|
|
||||||
The clock-frequency property holds the core frequency
|
|
||||||
|
|
||||||
2) The memory node
|
|
||||||
------------------
|
|
||||||
Typical memory description node; see booting-without-of.
|
|
||||||
|
|
||||||
3) The soc5200 node
|
|
||||||
-------------------
|
|
||||||
This node describes the on chip SOC peripherals. Every mpc5200 based
|
|
||||||
board will have this node, and as such there is a common naming
|
|
||||||
convention for SOC devices.
|
|
||||||
|
|
||||||
Required properties:
|
|
||||||
name type description
|
|
||||||
---- ---- -----------
|
|
||||||
device_type string must be "soc"
|
|
||||||
ranges int should be <0 baseaddr baseaddr+10000>
|
|
||||||
reg int must be <baseaddr 10000>
|
|
||||||
compatible string mpc5200: "mpc5200-soc"
|
|
||||||
mpc5200b: "mpc5200b-soc\0mpc5200-soc"
|
|
||||||
system-frequency int Fsystem frequency; source of all
|
|
||||||
other clocks.
|
|
||||||
bus-frequency int IPB bus frequency in HZ. Clock rate
|
|
||||||
used by most of the soc devices.
|
|
||||||
#interrupt-cells int must be <3>.
|
|
||||||
|
|
||||||
Recommended properties:
|
|
||||||
name type description
|
|
||||||
---- ---- -----------
|
|
||||||
model string Exact model of the chip;
|
|
||||||
ie: model="fsl,mpc5200"
|
|
||||||
revision string Silicon revision of chip
|
|
||||||
ie: revision="M08A"
|
|
||||||
|
|
||||||
The 'model' and 'revision' properties are *strongly* recommended. Having
|
|
||||||
them presence acts as a bit of a safety net for working around as yet
|
|
||||||
undiscovered bugs on one version of silicon. For example, device drivers
|
|
||||||
can use the model and revision properties to decide if a bug fix should
|
|
||||||
be turned on.
|
|
||||||
|
|
||||||
4) soc5200 child nodes
|
|
||||||
----------------------
|
|
||||||
Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
|
|
||||||
|
|
||||||
Note: The tables below show the value for the mpc5200. A mpc5200b device
|
|
||||||
tree should use the "mpc5200b-<device>\0mpc5200-<device> form.
|
|
||||||
|
|
||||||
Required soc5200 child nodes:
|
|
||||||
name device_type compatible Description
|
|
||||||
---- ----------- ---------- -----------
|
|
||||||
cdm@<addr> cdm mpc5200-cmd Clock Distribution
|
|
||||||
pic@<addr> interrupt-controller mpc5200-pic need an interrupt
|
|
||||||
controller to boot
|
|
||||||
bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires
|
|
||||||
the bestcomm device
|
|
||||||
|
|
||||||
Recommended soc5200 child nodes; populate as needed for your board
|
|
||||||
name device_type compatible Description
|
|
||||||
---- ----------- ---------- -----------
|
|
||||||
gpt@<addr> gpt fsl,mpc5200-gpt General purpose timers
|
|
||||||
gpt@<addr> gpt fsl,mpc5200-gpt-gpio General purpose
|
|
||||||
timers in GPIO mode
|
|
||||||
gpio@<addr> fsl,mpc5200-gpio MPC5200 simple gpio
|
|
||||||
controller
|
|
||||||
gpio@<addr> fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio
|
|
||||||
controller
|
|
||||||
rtc@<addr> rtc mpc5200-rtc Real time clock
|
|
||||||
mscan@<addr> mscan mpc5200-mscan CAN bus controller
|
|
||||||
pci@<addr> pci mpc5200-pci PCI bridge
|
|
||||||
serial@<addr> serial mpc5200-psc-uart PSC in serial mode
|
|
||||||
i2s@<addr> sound mpc5200-psc-i2s PSC in i2s mode
|
|
||||||
ac97@<addr> sound mpc5200-psc-ac97 PSC in ac97 mode
|
|
||||||
spi@<addr> spi mpc5200-psc-spi PSC in spi mode
|
|
||||||
irda@<addr> irda mpc5200-psc-irda PSC in IrDA mode
|
|
||||||
spi@<addr> spi mpc5200-spi MPC5200 spi device
|
|
||||||
ethernet@<addr> network mpc5200-fec MPC5200 ethernet device
|
|
||||||
ata@<addr> ata mpc5200-ata IDE ATA interface
|
|
||||||
i2c@<addr> i2c mpc5200-i2c I2C controller
|
|
||||||
usb@<addr> usb-ohci-be mpc5200-ohci,ohci-be USB controller
|
|
||||||
xlb@<addr> xlb mpc5200-xlb XLB arbitrator
|
|
||||||
|
|
||||||
Important child node properties
|
|
||||||
name type description
|
|
||||||
---- ---- -----------
|
|
||||||
cell-index int When multiple devices are present, is the
|
|
||||||
index of the device in the hardware (ie. There
|
|
||||||
are 6 PSC on the 5200 numbered PSC1 to PSC6)
|
|
||||||
PSC1 has 'cell-index = <0>'
|
|
||||||
PSC4 has 'cell-index = <3>'
|
|
||||||
|
|
||||||
5) General Purpose Timer nodes (child of soc5200 node)
|
|
||||||
On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
|
|
||||||
design supports the internal wdt, then the device node for GPT0 should
|
|
||||||
include the empty property 'fsl,has-wdt'.
|
|
||||||
|
|
||||||
6) PSC nodes (child of soc5200 node)
|
|
||||||
PSC nodes can define the optional 'port-number' property to force assignment
|
|
||||||
order of serial ports. For example, PSC5 might be physically connected to
|
|
||||||
the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would
|
|
||||||
have a "port-number = <0>" property, and PSC1 would have "port-number = <1>".
|
|
||||||
|
|
||||||
PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
|
|
||||||
i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
|
|
||||||
compatible field.
|
|
||||||
|
|
||||||
7) GPIO controller nodes
|
|
||||||
Each GPIO controller node should have the empty property gpio-controller and
|
|
||||||
#gpio-cells set to 2. First cell is the GPIO number which is interpreted
|
|
||||||
according to the bit numbers in the GPIO control registers. The second cell
|
|
||||||
is for flags which is currently unsused.
|
|
||||||
|
|
||||||
8) FEC nodes
|
|
||||||
The FEC node can specify one of the following properties to configure
|
|
||||||
the MII link:
|
|
||||||
"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire
|
|
||||||
mode instead of MII
|
|
||||||
"current-speed" - Specifies that the MII should be configured for a fixed
|
|
||||||
speed. This property should contain two cells. The
|
|
||||||
first cell specifies the speed in Mbps and the second
|
|
||||||
should be '0' for half duplex and '1' for full duplex
|
|
||||||
"phy-handle" - Contains a phandle to an Ethernet PHY.
|
|
||||||
|
|
||||||
IV - Extra Notes
|
|
||||||
================
|
|
||||||
|
|
||||||
1. Interrupt mapping
|
|
||||||
--------------------
|
|
||||||
The mpc5200 pic driver splits hardware IRQ numbers into two levels. The
|
|
||||||
split reflects the layout of the PIC hardware itself, which groups
|
|
||||||
interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
|
|
||||||
Bestcomm dma engine has it's own set of interrupt sources which are
|
|
||||||
cascaded off of peripheral interrupt 0, which the driver interprets as a
|
|
||||||
fourth group, SDMA.
|
|
||||||
|
|
||||||
The interrupts property for device nodes using the mpc5200 pic consists
|
|
||||||
of three cells; <L1 L2 level>
|
|
||||||
|
|
||||||
L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
|
|
||||||
L2 := interrupt number; directly mapped from the value in the
|
|
||||||
"ICTL PerStat, MainStat, CritStat Encoded Register"
|
|
||||||
level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
|
|
||||||
|
|
||||||
2. Shared registers
|
|
||||||
-------------------
|
|
||||||
Some SoC devices share registers between them. ie. the i2c devices use
|
|
||||||
a single clock control register, and almost all device are affected by
|
|
||||||
the port_config register. Devices which need to manipulate shared regs
|
|
||||||
should look to the parent SoC node. The soc node is responsible
|
|
||||||
for arbitrating all shared register access.
|
|
||||||
|
|
@ -4,12 +4,21 @@
|
||||||
*
|
*
|
||||||
* Compile with:
|
* Compile with:
|
||||||
* gcc -s -Wall -Wstrict-prototypes v4lgrab.c -o v4lgrab
|
* gcc -s -Wall -Wstrict-prototypes v4lgrab.c -o v4lgrab
|
||||||
* Use as:
|
* Use as:
|
||||||
* v4lgrab >image.ppm
|
* v4lgrab >image.ppm
|
||||||
*
|
*
|
||||||
* Copyright (C) 1998-05-03, Phil Blundell <philb@gnu.org>
|
* Copyright (C) 1998-05-03, Phil Blundell <philb@gnu.org>
|
||||||
* Copied from http://www.tazenda.demon.co.uk/phil/vgrabber.c
|
* Copied from http://www.tazenda.demon.co.uk/phil/vgrabber.c
|
||||||
* with minor modifications (Dave Forrest, drf5n@virginia.edu).
|
* with minor modifications (Dave Forrest, drf5n@virginia.edu).
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* For some cameras you may need to pre-load libv4l to perform
|
||||||
|
* the necessary decompression, e.g.:
|
||||||
|
*
|
||||||
|
* export LD_PRELOAD=/usr/lib/libv4l/v4l1compat.so
|
||||||
|
* ./v4lgrab >image.ppm
|
||||||
|
*
|
||||||
|
* see http://hansdegoede.livejournal.com/3636.html for details.
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
@ -24,7 +33,7 @@
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/videodev.h>
|
#include <linux/videodev.h>
|
||||||
|
|
||||||
#define FILE "/dev/video0"
|
#define VIDEO_DEV "/dev/video0"
|
||||||
|
|
||||||
/* Stole this from tvset.c */
|
/* Stole this from tvset.c */
|
||||||
|
|
||||||
|
|
@ -90,7 +99,7 @@ int get_brightness_adj(unsigned char *image, long size, int *brightness) {
|
||||||
|
|
||||||
int main(int argc, char ** argv)
|
int main(int argc, char ** argv)
|
||||||
{
|
{
|
||||||
int fd = open(FILE, O_RDONLY), f;
|
int fd = open(VIDEO_DEV, O_RDONLY), f;
|
||||||
struct video_capability cap;
|
struct video_capability cap;
|
||||||
struct video_window win;
|
struct video_window win;
|
||||||
struct video_picture vpic;
|
struct video_picture vpic;
|
||||||
|
|
@ -100,13 +109,13 @@ int main(int argc, char ** argv)
|
||||||
unsigned int i, src_depth;
|
unsigned int i, src_depth;
|
||||||
|
|
||||||
if (fd < 0) {
|
if (fd < 0) {
|
||||||
perror(FILE);
|
perror(VIDEO_DEV);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ioctl(fd, VIDIOCGCAP, &cap) < 0) {
|
if (ioctl(fd, VIDIOCGCAP, &cap) < 0) {
|
||||||
perror("VIDIOGCAP");
|
perror("VIDIOGCAP");
|
||||||
fprintf(stderr, "(" FILE " not a video4linux device?)\n");
|
fprintf(stderr, "(" VIDEO_DEV " not a video4linux device?)\n");
|
||||||
close(fd);
|
close(fd);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
13
MAINTAINERS
13
MAINTAINERS
|
|
@ -911,7 +911,7 @@ S: Maintained
|
||||||
BLACKFIN ARCHITECTURE
|
BLACKFIN ARCHITECTURE
|
||||||
P: Bryan Wu
|
P: Bryan Wu
|
||||||
M: cooloney@kernel.org
|
M: cooloney@kernel.org
|
||||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||||
W: http://blackfin.uclinux.org
|
W: http://blackfin.uclinux.org
|
||||||
S: Supported
|
S: Supported
|
||||||
|
|
||||||
|
|
@ -1021,6 +1021,14 @@ M: mb@bu3sch.de
|
||||||
W: http://bu3sch.de/btgpio.php
|
W: http://bu3sch.de/btgpio.php
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
||||||
|
BTRFS FILE SYSTEM
|
||||||
|
P: Chris Mason
|
||||||
|
M: chris.mason@oracle.com
|
||||||
|
L: linux-btrfs@vger.kernel.org
|
||||||
|
W: http://btrfs.wiki.kernel.org/
|
||||||
|
T: git kernel.org:/pub/scm/linux/kernel/git/mason/btrfs-unstable.git
|
||||||
|
S: Maintained
|
||||||
|
|
||||||
BTTV VIDEO4LINUX DRIVER
|
BTTV VIDEO4LINUX DRIVER
|
||||||
P: Mauro Carvalho Chehab
|
P: Mauro Carvalho Chehab
|
||||||
M: mchehab@infradead.org
|
M: mchehab@infradead.org
|
||||||
|
|
@ -2212,7 +2220,7 @@ P: Sean Hefty
|
||||||
M: sean.hefty@intel.com
|
M: sean.hefty@intel.com
|
||||||
P: Hal Rosenstock
|
P: Hal Rosenstock
|
||||||
M: hal.rosenstock@gmail.com
|
M: hal.rosenstock@gmail.com
|
||||||
L: general@lists.openfabrics.org
|
L: general@lists.openfabrics.org (moderated for non-subscribers)
|
||||||
W: http://www.openib.org/
|
W: http://www.openib.org/
|
||||||
T: git kernel.org:/pub/scm/linux/kernel/git/roland/infiniband.git
|
T: git kernel.org:/pub/scm/linux/kernel/git/roland/infiniband.git
|
||||||
S: Supported
|
S: Supported
|
||||||
|
|
@ -4841,6 +4849,7 @@ P: Ingo Molnar
|
||||||
M: mingo@redhat.com
|
M: mingo@redhat.com
|
||||||
P: H. Peter Anvin
|
P: H. Peter Anvin
|
||||||
M: hpa@zytor.com
|
M: hpa@zytor.com
|
||||||
|
M: x86@kernel.org
|
||||||
L: linux-kernel@vger.kernel.org
|
L: linux-kernel@vger.kernel.org
|
||||||
T: git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git
|
T: git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
|
||||||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
||||||
VERSION = 2
|
VERSION = 2
|
||||||
PATCHLEVEL = 6
|
PATCHLEVEL = 6
|
||||||
SUBLEVEL = 29
|
SUBLEVEL = 29
|
||||||
EXTRAVERSION = -rc3
|
EXTRAVERSION = -rc4
|
||||||
NAME = Erotic Pickled Herring
|
NAME = Erotic Pickled Herring
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
||||||
|
|
@ -8,12 +8,12 @@
|
||||||
|
|
||||||
/* ??? Would be nice to use .gprel32 here, but we can't be sure that the
|
/* ??? Would be nice to use .gprel32 here, but we can't be sure that the
|
||||||
function loaded the GP, so this could fail in modules. */
|
function loaded the GP, so this could fail in modules. */
|
||||||
#define BUG() { \
|
#define BUG() do { \
|
||||||
__asm__ __volatile__( \
|
__asm__ __volatile__( \
|
||||||
"call_pal %0 # bugchk\n\t" \
|
"call_pal %0 # bugchk\n\t" \
|
||||||
".long %1\n\t.8byte %2" \
|
".long %1\n\t.8byte %2" \
|
||||||
: : "i"(PAL_bugchk), "i"(__LINE__), "i"(__FILE__)); \
|
: : "i"(PAL_bugchk), "i"(__LINE__), "i"(__FILE__)); \
|
||||||
for ( ; ; ); }
|
for ( ; ; ); } while (0)
|
||||||
|
|
||||||
#define HAVE_ARCH_BUG
|
#define HAVE_ARCH_BUG
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -650,6 +650,7 @@ ENTRY(fp_enter)
|
||||||
no_fp: mov pc, lr
|
no_fp: mov pc, lr
|
||||||
|
|
||||||
__und_usr_unknown:
|
__und_usr_unknown:
|
||||||
|
enable_irq
|
||||||
mov r0, sp
|
mov r0, sp
|
||||||
adr lr, ret_from_exception
|
adr lr, ret_from_exception
|
||||||
b do_undefinstr
|
b do_undefinstr
|
||||||
|
|
|
||||||
|
|
@ -136,7 +136,7 @@ ENTRY(mcount)
|
||||||
ldmia sp!, {r0-r3, pc}
|
ldmia sp!, {r0-r3, pc}
|
||||||
|
|
||||||
trace:
|
trace:
|
||||||
ldr r1, [fp, #-4]
|
ldr r1, [fp, #-4] @ lr of instrumented routine
|
||||||
mov r0, lr
|
mov r0, lr
|
||||||
sub r0, r0, #MCOUNT_INSN_SIZE
|
sub r0, r0, #MCOUNT_INSN_SIZE
|
||||||
mov lr, pc
|
mov lr, pc
|
||||||
|
|
|
||||||
|
|
@ -101,7 +101,7 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||||
/* Handle bad interrupts */
|
/* Handle bad interrupts */
|
||||||
static struct irq_desc bad_irq_desc = {
|
static struct irq_desc bad_irq_desc = {
|
||||||
.handle_irq = handle_bad_irq,
|
.handle_irq = handle_bad_irq,
|
||||||
.lock = SPIN_LOCK_UNLOCKED
|
.lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
|
||||||
};
|
};
|
||||||
|
|
||||||
#ifdef CONFIG_CPUMASK_OFFSTACK
|
#ifdef CONFIG_CPUMASK_OFFSTACK
|
||||||
|
|
|
||||||
|
|
@ -27,6 +27,7 @@
|
||||||
#include <asm/mach/map.h>
|
#include <asm/mach/map.h>
|
||||||
#include <asm/mach/flash.h>
|
#include <asm/mach/flash.h>
|
||||||
|
|
||||||
|
#include <mach/irqs.h>
|
||||||
#include <mach/board.h>
|
#include <mach/board.h>
|
||||||
#include <mach/msm_iomap.h>
|
#include <mach/msm_iomap.h>
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -181,7 +181,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||||
}
|
}
|
||||||
size = OMAP1_MMC_SIZE;
|
size = OMAP1_MMC_SIZE;
|
||||||
|
|
||||||
omap_mmc_add(i, base, size, irq, mmc_data[i]);
|
omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -28,81 +28,8 @@
|
||||||
#define DPS_RSTCT2_PER_EN (1 << 0)
|
#define DPS_RSTCT2_PER_EN (1 << 0)
|
||||||
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
|
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
|
||||||
|
|
||||||
struct mcbsp_internal_clk {
|
|
||||||
struct clk clk;
|
|
||||||
struct clk **childs;
|
|
||||||
int n_childs;
|
|
||||||
};
|
|
||||||
|
|
||||||
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
|
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
|
||||||
static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
|
const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
|
||||||
{
|
|
||||||
const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
|
|
||||||
int i;
|
|
||||||
|
|
||||||
mclk->n_childs = ARRAY_SIZE(clk_names);
|
|
||||||
mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
|
|
||||||
GFP_KERNEL);
|
|
||||||
|
|
||||||
for (i = 0; i < mclk->n_childs; i++) {
|
|
||||||
/* We fake a platform device to get correct device id */
|
|
||||||
struct platform_device pdev;
|
|
||||||
|
|
||||||
pdev.dev.bus = &platform_bus_type;
|
|
||||||
pdev.id = mclk->clk.id;
|
|
||||||
mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
|
|
||||||
if (IS_ERR(mclk->childs[i]))
|
|
||||||
printk(KERN_ERR "Could not get clock %s (%d).\n",
|
|
||||||
clk_names[i], mclk->clk.id);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static int omap_mcbsp_clk_enable(struct clk *clk)
|
|
||||||
{
|
|
||||||
struct mcbsp_internal_clk *mclk = container_of(clk,
|
|
||||||
struct mcbsp_internal_clk, clk);
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < mclk->n_childs; i++)
|
|
||||||
clk_enable(mclk->childs[i]);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void omap_mcbsp_clk_disable(struct clk *clk)
|
|
||||||
{
|
|
||||||
struct mcbsp_internal_clk *mclk = container_of(clk,
|
|
||||||
struct mcbsp_internal_clk, clk);
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < mclk->n_childs; i++)
|
|
||||||
clk_disable(mclk->childs[i]);
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
|
|
||||||
{
|
|
||||||
.clk = {
|
|
||||||
.name = "mcbsp_clk",
|
|
||||||
.id = 1,
|
|
||||||
.enable = omap_mcbsp_clk_enable,
|
|
||||||
.disable = omap_mcbsp_clk_disable,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.clk = {
|
|
||||||
.name = "mcbsp_clk",
|
|
||||||
.id = 3,
|
|
||||||
.enable = omap_mcbsp_clk_enable,
|
|
||||||
.disable = omap_mcbsp_clk_disable,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
|
|
||||||
#else
|
|
||||||
#define omap_mcbsp_clks_size 0
|
|
||||||
static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
|
|
||||||
static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
|
|
||||||
{ }
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static void omap1_mcbsp_request(unsigned int id)
|
static void omap1_mcbsp_request(unsigned int id)
|
||||||
|
|
@ -167,8 +94,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_McBSP1RX,
|
.rx_irq = INT_McBSP1RX,
|
||||||
.tx_irq = INT_McBSP1TX,
|
.tx_irq = INT_McBSP1TX,
|
||||||
.ops = &omap1_mcbsp_ops,
|
.ops = &omap1_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
},
|
.num_clks = 3,
|
||||||
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP1510_MCBSP2_BASE,
|
.phys_base = OMAP1510_MCBSP2_BASE,
|
||||||
.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
|
.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
|
||||||
|
|
@ -184,7 +112,8 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_McBSP3RX,
|
.rx_irq = INT_McBSP3RX,
|
||||||
.tx_irq = INT_McBSP3TX,
|
.tx_irq = INT_McBSP3TX,
|
||||||
.ops = &omap1_mcbsp_ops,
|
.ops = &omap1_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 3,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
|
#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
|
||||||
|
|
@ -202,7 +131,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_McBSP1RX,
|
.rx_irq = INT_McBSP1RX,
|
||||||
.tx_irq = INT_McBSP1TX,
|
.tx_irq = INT_McBSP1TX,
|
||||||
.ops = &omap1_mcbsp_ops,
|
.ops = &omap1_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 3,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP1610_MCBSP2_BASE,
|
.phys_base = OMAP1610_MCBSP2_BASE,
|
||||||
|
|
@ -219,7 +149,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_McBSP3RX,
|
.rx_irq = INT_McBSP3RX,
|
||||||
.tx_irq = INT_McBSP3TX,
|
.tx_irq = INT_McBSP3TX,
|
||||||
.ops = &omap1_mcbsp_ops,
|
.ops = &omap1_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 3,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
|
#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
|
||||||
|
|
@ -230,15 +161,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
|
||||||
|
|
||||||
int __init omap1_mcbsp_init(void)
|
int __init omap1_mcbsp_init(void)
|
||||||
{
|
{
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < omap_mcbsp_clks_size; i++) {
|
|
||||||
if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
|
|
||||||
omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
|
|
||||||
clk_register(&omap_mcbsp_clks[i].clk);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (cpu_is_omap730())
|
if (cpu_is_omap730())
|
||||||
omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
|
omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
|
||||||
if (cpu_is_omap15xx())
|
if (cpu_is_omap15xx())
|
||||||
|
|
|
||||||
|
|
@ -421,6 +421,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||||
int nr_controllers)
|
int nr_controllers)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
char *name;
|
||||||
|
|
||||||
for (i = 0; i < nr_controllers; i++) {
|
for (i = 0; i < nr_controllers; i++) {
|
||||||
unsigned long base, size;
|
unsigned long base, size;
|
||||||
|
|
@ -450,12 +451,14 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cpu_is_omap2420())
|
if (cpu_is_omap2420()) {
|
||||||
size = OMAP2420_MMC_SIZE;
|
size = OMAP2420_MMC_SIZE;
|
||||||
else
|
name = "mmci-omap";
|
||||||
|
} else {
|
||||||
size = HSMMC_SIZE;
|
size = HSMMC_SIZE;
|
||||||
|
name = "mmci-omap-hs";
|
||||||
omap_mmc_add(i, base, size, irq, mmc_data[i]);
|
}
|
||||||
|
omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -172,9 +172,13 @@ void __init omap34xx_check_revision(void)
|
||||||
omap_revision = OMAP3430_REV_ES3_0;
|
omap_revision = OMAP3430_REV_ES3_0;
|
||||||
rev_name = "ES3.0";
|
rev_name = "ES3.0";
|
||||||
break;
|
break;
|
||||||
|
case 4:
|
||||||
|
omap_revision = OMAP3430_REV_ES3_1;
|
||||||
|
rev_name = "ES3.1";
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
/* Use the latest known revision as default */
|
/* Use the latest known revision as default */
|
||||||
omap_revision = OMAP3430_REV_ES3_0;
|
omap_revision = OMAP3430_REV_ES3_1;
|
||||||
rev_name = "Unknown revision\n";
|
rev_name = "Unknown revision\n";
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -134,6 +134,7 @@ static struct irq_chip omap_irq_chip = {
|
||||||
.ack = omap_mask_ack_irq,
|
.ack = omap_mask_ack_irq,
|
||||||
.mask = omap_mask_irq,
|
.mask = omap_mask_irq,
|
||||||
.unmask = omap_unmask_irq,
|
.unmask = omap_unmask_irq,
|
||||||
|
.disable = omap_mask_irq,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
|
static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
|
||||||
|
|
|
||||||
|
|
@ -24,106 +24,7 @@
|
||||||
#include <mach/cpu.h>
|
#include <mach/cpu.h>
|
||||||
#include <mach/mcbsp.h>
|
#include <mach/mcbsp.h>
|
||||||
|
|
||||||
struct mcbsp_internal_clk {
|
const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
|
||||||
struct clk clk;
|
|
||||||
struct clk **childs;
|
|
||||||
int n_childs;
|
|
||||||
};
|
|
||||||
|
|
||||||
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
|
|
||||||
static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
|
|
||||||
{
|
|
||||||
const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
|
|
||||||
int i;
|
|
||||||
|
|
||||||
mclk->n_childs = ARRAY_SIZE(clk_names);
|
|
||||||
mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
|
|
||||||
GFP_KERNEL);
|
|
||||||
|
|
||||||
for (i = 0; i < mclk->n_childs; i++) {
|
|
||||||
/* We fake a platform device to get correct device id */
|
|
||||||
struct platform_device pdev;
|
|
||||||
|
|
||||||
pdev.dev.bus = &platform_bus_type;
|
|
||||||
pdev.id = mclk->clk.id;
|
|
||||||
mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
|
|
||||||
if (IS_ERR(mclk->childs[i]))
|
|
||||||
printk(KERN_ERR "Could not get clock %s (%d).\n",
|
|
||||||
clk_names[i], mclk->clk.id);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static int omap_mcbsp_clk_enable(struct clk *clk)
|
|
||||||
{
|
|
||||||
struct mcbsp_internal_clk *mclk = container_of(clk,
|
|
||||||
struct mcbsp_internal_clk, clk);
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < mclk->n_childs; i++)
|
|
||||||
clk_enable(mclk->childs[i]);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void omap_mcbsp_clk_disable(struct clk *clk)
|
|
||||||
{
|
|
||||||
struct mcbsp_internal_clk *mclk = container_of(clk,
|
|
||||||
struct mcbsp_internal_clk, clk);
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < mclk->n_childs; i++)
|
|
||||||
clk_disable(mclk->childs[i]);
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
|
|
||||||
{
|
|
||||||
.clk = {
|
|
||||||
.name = "mcbsp_clk",
|
|
||||||
.id = 1,
|
|
||||||
.enable = omap_mcbsp_clk_enable,
|
|
||||||
.disable = omap_mcbsp_clk_disable,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.clk = {
|
|
||||||
.name = "mcbsp_clk",
|
|
||||||
.id = 2,
|
|
||||||
.enable = omap_mcbsp_clk_enable,
|
|
||||||
.disable = omap_mcbsp_clk_disable,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.clk = {
|
|
||||||
.name = "mcbsp_clk",
|
|
||||||
.id = 3,
|
|
||||||
.enable = omap_mcbsp_clk_enable,
|
|
||||||
.disable = omap_mcbsp_clk_disable,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.clk = {
|
|
||||||
.name = "mcbsp_clk",
|
|
||||||
.id = 4,
|
|
||||||
.enable = omap_mcbsp_clk_enable,
|
|
||||||
.disable = omap_mcbsp_clk_disable,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.clk = {
|
|
||||||
.name = "mcbsp_clk",
|
|
||||||
.id = 5,
|
|
||||||
.enable = omap_mcbsp_clk_enable,
|
|
||||||
.disable = omap_mcbsp_clk_disable,
|
|
||||||
},
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
|
|
||||||
#else
|
|
||||||
#define omap_mcbsp_clks_size 0
|
|
||||||
static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
|
|
||||||
static inline void omap_mcbsp_clk_init(struct clk *clk)
|
|
||||||
{ }
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static void omap2_mcbsp2_mux_setup(void)
|
static void omap2_mcbsp2_mux_setup(void)
|
||||||
{
|
{
|
||||||
|
|
@ -156,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP24XX_MCBSP2_BASE,
|
.phys_base = OMAP24XX_MCBSP2_BASE,
|
||||||
|
|
@ -165,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
|
#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
|
||||||
|
|
@ -183,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP24XX_MCBSP2_BASE,
|
.phys_base = OMAP24XX_MCBSP2_BASE,
|
||||||
|
|
@ -192,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP2430_MCBSP3_BASE,
|
.phys_base = OMAP2430_MCBSP3_BASE,
|
||||||
|
|
@ -201,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP2430_MCBSP4_BASE,
|
.phys_base = OMAP2430_MCBSP4_BASE,
|
||||||
|
|
@ -210,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP2430_MCBSP5_BASE,
|
.phys_base = OMAP2430_MCBSP5_BASE,
|
||||||
|
|
@ -219,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
|
#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
|
||||||
|
|
@ -237,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP34XX_MCBSP2_BASE,
|
.phys_base = OMAP34XX_MCBSP2_BASE,
|
||||||
|
|
@ -246,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP34XX_MCBSP3_BASE,
|
.phys_base = OMAP34XX_MCBSP3_BASE,
|
||||||
|
|
@ -255,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP34XX_MCBSP4_BASE,
|
.phys_base = OMAP34XX_MCBSP4_BASE,
|
||||||
|
|
@ -264,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
.phys_base = OMAP34XX_MCBSP5_BASE,
|
.phys_base = OMAP34XX_MCBSP5_BASE,
|
||||||
|
|
@ -273,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
||||||
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
|
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
|
||||||
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
|
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
|
||||||
.ops = &omap2_mcbsp_ops,
|
.ops = &omap2_mcbsp_ops,
|
||||||
.clk_name = "mcbsp_clk",
|
.clk_names = clk_names,
|
||||||
|
.num_clks = 2,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
|
#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
|
||||||
|
|
@ -284,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
|
||||||
|
|
||||||
static int __init omap2_mcbsp_init(void)
|
static int __init omap2_mcbsp_init(void)
|
||||||
{
|
{
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < omap_mcbsp_clks_size; i++) {
|
|
||||||
/* Once we call clk_get inside init, we do not register it */
|
|
||||||
omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
|
|
||||||
clk_register(&omap_mcbsp_clks[i].clk);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (cpu_is_omap2420())
|
if (cpu_is_omap2420())
|
||||||
omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
|
omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
|
||||||
if (cpu_is_omap2430())
|
if (cpu_is_omap2430())
|
||||||
|
|
|
||||||
|
|
@ -93,9 +93,8 @@ ENTRY(omap24xx_cpu_suspend)
|
||||||
orr r4, r4, #0x40 @ enable self refresh on idle req
|
orr r4, r4, #0x40 @ enable self refresh on idle req
|
||||||
mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
|
mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
|
||||||
str r4, [r2] @ make it so
|
str r4, [r2] @ make it so
|
||||||
mov r2, #0
|
|
||||||
nop
|
nop
|
||||||
mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
|
mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt
|
||||||
nop
|
nop
|
||||||
loop:
|
loop:
|
||||||
subs r5, r5, #0x1 @ awake, wait just a bit
|
subs r5, r5, #0x1 @ awake, wait just a bit
|
||||||
|
|
|
||||||
|
|
@ -118,7 +118,8 @@ static void __init omap2_gp_clockevent_init(void)
|
||||||
clockevent_gpt.max_delta_ns =
|
clockevent_gpt.max_delta_ns =
|
||||||
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
|
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
|
||||||
clockevent_gpt.min_delta_ns =
|
clockevent_gpt.min_delta_ns =
|
||||||
clockevent_delta2ns(1, &clockevent_gpt);
|
clockevent_delta2ns(3, &clockevent_gpt);
|
||||||
|
/* Timer internal resynch latency. */
|
||||||
|
|
||||||
clockevent_gpt.cpumask = cpumask_of(0);
|
clockevent_gpt.cpumask = cpumask_of(0);
|
||||||
clockevents_register_device(&clockevent_gpt);
|
clockevents_register_device(&clockevent_gpt);
|
||||||
|
|
|
||||||
|
|
@ -289,7 +289,7 @@ static struct platform_device sa11x0pcmcia_device = {
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct platform_device sa11x0mtd_device = {
|
static struct platform_device sa11x0mtd_device = {
|
||||||
.name = "flash",
|
.name = "sa1100-mtd",
|
||||||
.id = -1,
|
.id = -1,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -66,7 +66,10 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
|
||||||
* fault (ie, is old), we can safely ignore any issues.
|
* fault (ie, is old), we can safely ignore any issues.
|
||||||
*/
|
*/
|
||||||
if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
|
if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
|
||||||
flush_cache_page(vma, address, pte_pfn(entry));
|
unsigned long pfn = pte_pfn(entry);
|
||||||
|
flush_cache_page(vma, address, pfn);
|
||||||
|
outer_flush_range((pfn << PAGE_SHIFT),
|
||||||
|
(pfn << PAGE_SHIFT) + PAGE_SIZE);
|
||||||
pte_val(entry) &= ~L_PTE_MT_MASK;
|
pte_val(entry) &= ~L_PTE_MT_MASK;
|
||||||
pte_val(entry) |= shared_pte_mask;
|
pte_val(entry) |= shared_pte_mask;
|
||||||
set_pte_at(vma->vm_mm, address, pte, entry);
|
set_pte_at(vma->vm_mm, address, pte, entry);
|
||||||
|
|
|
||||||
36
arch/arm/plat-mxc/include/mach/mmc.h
Normal file
36
arch/arm/plat-mxc/include/mach/mmc.h
Normal file
|
|
@ -0,0 +1,36 @@
|
||||||
|
#ifndef ASMARM_ARCH_MMC_H
|
||||||
|
#define ASMARM_ARCH_MMC_H
|
||||||
|
|
||||||
|
#include <linux/mmc/host.h>
|
||||||
|
|
||||||
|
struct device;
|
||||||
|
|
||||||
|
/* board specific SDHC data, optional.
|
||||||
|
* If not present, a writable card with 3,3V is assumed.
|
||||||
|
*/
|
||||||
|
struct imxmmc_platform_data {
|
||||||
|
/* Return values for the get_ro callback should be:
|
||||||
|
* 0 for a read/write card
|
||||||
|
* 1 for a read-only card
|
||||||
|
* -ENOSYS when not supported (equal to NULL callback)
|
||||||
|
* or a negative errno value when something bad happened
|
||||||
|
*/
|
||||||
|
int (*get_ro)(struct device *);
|
||||||
|
|
||||||
|
/* board specific hook to (de)initialize the SD slot.
|
||||||
|
* The board code can call 'handler' on a card detection
|
||||||
|
* change giving data as argument.
|
||||||
|
*/
|
||||||
|
int (*init)(struct device *dev, irq_handler_t handler, void *data);
|
||||||
|
void (*exit)(struct device *dev, void *data);
|
||||||
|
|
||||||
|
/* available voltages. If not given, assume
|
||||||
|
* MMC_VDD_32_33 | MMC_VDD_33_34
|
||||||
|
*/
|
||||||
|
unsigned int ocr_avail;
|
||||||
|
|
||||||
|
/* adjust slot voltage */
|
||||||
|
void (*setpower)(struct device *, unsigned int vdd);
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -200,14 +200,15 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
|
||||||
/*
|
/*
|
||||||
* Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
|
* Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
|
||||||
*/
|
*/
|
||||||
int __init omap_mmc_add(int id, unsigned long base, unsigned long size,
|
int __init omap_mmc_add(const char *name, int id, unsigned long base,
|
||||||
unsigned int irq, struct omap_mmc_platform_data *data)
|
unsigned long size, unsigned int irq,
|
||||||
|
struct omap_mmc_platform_data *data)
|
||||||
{
|
{
|
||||||
struct platform_device *pdev;
|
struct platform_device *pdev;
|
||||||
struct resource res[OMAP_MMC_NR_RES];
|
struct resource res[OMAP_MMC_NR_RES];
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
pdev = platform_device_alloc("mmci-omap", id);
|
pdev = platform_device_alloc(name, id);
|
||||||
if (!pdev)
|
if (!pdev)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -709,6 +709,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
|
||||||
chan->dev_name = dev_name;
|
chan->dev_name = dev_name;
|
||||||
chan->callback = callback;
|
chan->callback = callback;
|
||||||
chan->data = data;
|
chan->data = data;
|
||||||
|
chan->flags = 0;
|
||||||
|
|
||||||
#ifndef CONFIG_ARCH_OMAP1
|
#ifndef CONFIG_ARCH_OMAP1
|
||||||
if (cpu_class_is_omap2()) {
|
if (cpu_class_is_omap2()) {
|
||||||
|
|
@ -1888,11 +1889,11 @@ static int omap2_dma_handle_ch(int ch)
|
||||||
status = dma_read(CSR(ch));
|
status = dma_read(CSR(ch));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
dma_write(status, CSR(ch));
|
||||||
|
|
||||||
if (likely(dma_chan[ch].callback != NULL))
|
if (likely(dma_chan[ch].callback != NULL))
|
||||||
dma_chan[ch].callback(ch, status, dma_chan[ch].data);
|
dma_chan[ch].callback(ch, status, dma_chan[ch].data);
|
||||||
|
|
||||||
dma_write(status, CSR(ch));
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -339,6 +339,7 @@ IS_OMAP_TYPE(3430, 0x3430)
|
||||||
#define OMAP3430_REV_ES2_0 0x34301034
|
#define OMAP3430_REV_ES2_0 0x34301034
|
||||||
#define OMAP3430_REV_ES2_1 0x34302034
|
#define OMAP3430_REV_ES2_1 0x34302034
|
||||||
#define OMAP3430_REV_ES3_0 0x34303034
|
#define OMAP3430_REV_ES3_0 0x34303034
|
||||||
|
#define OMAP3430_REV_ES3_1 0x34304034
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* omap_chip bits
|
* omap_chip bits
|
||||||
|
|
|
||||||
|
|
@ -344,7 +344,8 @@ struct omap_mcbsp_platform_data {
|
||||||
u8 dma_rx_sync, dma_tx_sync;
|
u8 dma_rx_sync, dma_tx_sync;
|
||||||
u16 rx_irq, tx_irq;
|
u16 rx_irq, tx_irq;
|
||||||
struct omap_mcbsp_ops *ops;
|
struct omap_mcbsp_ops *ops;
|
||||||
char const *clk_name;
|
char const **clk_names;
|
||||||
|
int num_clks;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct omap_mcbsp {
|
struct omap_mcbsp {
|
||||||
|
|
@ -376,7 +377,8 @@ struct omap_mcbsp {
|
||||||
/* Protect the field .free, while checking if the mcbsp is in use */
|
/* Protect the field .free, while checking if the mcbsp is in use */
|
||||||
spinlock_t lock;
|
spinlock_t lock;
|
||||||
struct omap_mcbsp_platform_data *pdata;
|
struct omap_mcbsp_platform_data *pdata;
|
||||||
struct clk *clk;
|
struct clk **clks;
|
||||||
|
int num_clks;
|
||||||
};
|
};
|
||||||
extern struct omap_mcbsp **mcbsp_ptr;
|
extern struct omap_mcbsp **mcbsp_ptr;
|
||||||
extern int omap_mcbsp_count;
|
extern int omap_mcbsp_count;
|
||||||
|
|
|
||||||
|
|
@ -115,8 +115,9 @@ void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||||
int nr_controllers);
|
int nr_controllers);
|
||||||
void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||||
int nr_controllers);
|
int nr_controllers);
|
||||||
int omap_mmc_add(int id, unsigned long base, unsigned long size,
|
int omap_mmc_add(const char *name, int id, unsigned long base,
|
||||||
unsigned int irq, struct omap_mmc_platform_data *data);
|
unsigned long size, unsigned int irq,
|
||||||
|
struct omap_mmc_platform_data *data);
|
||||||
#else
|
#else
|
||||||
static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||||
int nr_controllers)
|
int nr_controllers)
|
||||||
|
|
@ -126,8 +127,9 @@ static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||||
int nr_controllers)
|
int nr_controllers)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
static inline int omap_mmc_add(int id, unsigned long base, unsigned long size,
|
static inline int omap_mmc_add(const char *name, int id, unsigned long base,
|
||||||
unsigned int irq, struct omap_mmc_platform_data *data)
|
unsigned long size, unsigned int irq,
|
||||||
|
struct omap_mmc_platform_data *data)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -214,6 +214,7 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type);
|
||||||
int omap_mcbsp_request(unsigned int id)
|
int omap_mcbsp_request(unsigned int id)
|
||||||
{
|
{
|
||||||
struct omap_mcbsp *mcbsp;
|
struct omap_mcbsp *mcbsp;
|
||||||
|
int i;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
if (!omap_mcbsp_check_valid_id(id)) {
|
if (!omap_mcbsp_check_valid_id(id)) {
|
||||||
|
|
@ -225,7 +226,8 @@ int omap_mcbsp_request(unsigned int id)
|
||||||
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
|
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
|
||||||
mcbsp->pdata->ops->request(id);
|
mcbsp->pdata->ops->request(id);
|
||||||
|
|
||||||
clk_enable(mcbsp->clk);
|
for (i = 0; i < mcbsp->num_clks; i++)
|
||||||
|
clk_enable(mcbsp->clks[i]);
|
||||||
|
|
||||||
spin_lock(&mcbsp->lock);
|
spin_lock(&mcbsp->lock);
|
||||||
if (!mcbsp->free) {
|
if (!mcbsp->free) {
|
||||||
|
|
@ -276,6 +278,7 @@ EXPORT_SYMBOL(omap_mcbsp_request);
|
||||||
void omap_mcbsp_free(unsigned int id)
|
void omap_mcbsp_free(unsigned int id)
|
||||||
{
|
{
|
||||||
struct omap_mcbsp *mcbsp;
|
struct omap_mcbsp *mcbsp;
|
||||||
|
int i;
|
||||||
|
|
||||||
if (!omap_mcbsp_check_valid_id(id)) {
|
if (!omap_mcbsp_check_valid_id(id)) {
|
||||||
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||||
|
|
@ -286,7 +289,8 @@ void omap_mcbsp_free(unsigned int id)
|
||||||
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
|
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
|
||||||
mcbsp->pdata->ops->free(id);
|
mcbsp->pdata->ops->free(id);
|
||||||
|
|
||||||
clk_disable(mcbsp->clk);
|
for (i = mcbsp->num_clks - 1; i >= 0; i--)
|
||||||
|
clk_disable(mcbsp->clks[i]);
|
||||||
|
|
||||||
spin_lock(&mcbsp->lock);
|
spin_lock(&mcbsp->lock);
|
||||||
if (mcbsp->free) {
|
if (mcbsp->free) {
|
||||||
|
|
@ -872,6 +876,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
||||||
struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
|
struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
|
||||||
struct omap_mcbsp *mcbsp;
|
struct omap_mcbsp *mcbsp;
|
||||||
int id = pdev->id - 1;
|
int id = pdev->id - 1;
|
||||||
|
int i;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
if (!pdata) {
|
if (!pdata) {
|
||||||
|
|
@ -916,14 +921,25 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
||||||
mcbsp->dma_rx_sync = pdata->dma_rx_sync;
|
mcbsp->dma_rx_sync = pdata->dma_rx_sync;
|
||||||
mcbsp->dma_tx_sync = pdata->dma_tx_sync;
|
mcbsp->dma_tx_sync = pdata->dma_tx_sync;
|
||||||
|
|
||||||
if (pdata->clk_name)
|
if (pdata->num_clks) {
|
||||||
mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
|
mcbsp->num_clks = pdata->num_clks;
|
||||||
if (IS_ERR(mcbsp->clk)) {
|
mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *),
|
||||||
dev_err(&pdev->dev,
|
GFP_KERNEL);
|
||||||
"Invalid clock configuration for McBSP%d.\n",
|
if (!mcbsp->clks) {
|
||||||
mcbsp->id);
|
ret = -ENOMEM;
|
||||||
ret = PTR_ERR(mcbsp->clk);
|
goto exit;
|
||||||
goto err_clk;
|
}
|
||||||
|
for (i = 0; i < mcbsp->num_clks; i++) {
|
||||||
|
mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]);
|
||||||
|
if (IS_ERR(mcbsp->clks[i])) {
|
||||||
|
dev_err(&pdev->dev,
|
||||||
|
"Invalid %s configuration for McBSP%d.\n",
|
||||||
|
pdata->clk_names[i], mcbsp->id);
|
||||||
|
ret = PTR_ERR(mcbsp->clks[i]);
|
||||||
|
goto err_clk;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
mcbsp->pdata = pdata;
|
mcbsp->pdata = pdata;
|
||||||
|
|
@ -932,6 +948,9 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
err_clk:
|
err_clk:
|
||||||
|
while (i--)
|
||||||
|
clk_put(mcbsp->clks[i]);
|
||||||
|
kfree(mcbsp->clks);
|
||||||
iounmap(mcbsp->io_base);
|
iounmap(mcbsp->io_base);
|
||||||
err_ioremap:
|
err_ioremap:
|
||||||
mcbsp->free = 0;
|
mcbsp->free = 0;
|
||||||
|
|
@ -942,6 +961,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
||||||
static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
|
static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
|
struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
|
||||||
|
int i;
|
||||||
|
|
||||||
platform_set_drvdata(pdev, NULL);
|
platform_set_drvdata(pdev, NULL);
|
||||||
if (mcbsp) {
|
if (mcbsp) {
|
||||||
|
|
@ -950,12 +970,18 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
|
||||||
mcbsp->pdata->ops->free)
|
mcbsp->pdata->ops->free)
|
||||||
mcbsp->pdata->ops->free(mcbsp->id);
|
mcbsp->pdata->ops->free(mcbsp->id);
|
||||||
|
|
||||||
clk_disable(mcbsp->clk);
|
for (i = mcbsp->num_clks - 1; i >= 0; i--) {
|
||||||
clk_put(mcbsp->clk);
|
clk_disable(mcbsp->clks[i]);
|
||||||
|
clk_put(mcbsp->clks[i]);
|
||||||
|
}
|
||||||
|
|
||||||
iounmap(mcbsp->io_base);
|
iounmap(mcbsp->io_base);
|
||||||
|
|
||||||
mcbsp->clk = NULL;
|
if (mcbsp->num_clks) {
|
||||||
|
kfree(mcbsp->clks);
|
||||||
|
mcbsp->clks = NULL;
|
||||||
|
mcbsp->num_clks = 0;
|
||||||
|
}
|
||||||
mcbsp->free = 0;
|
mcbsp->free = 0;
|
||||||
mcbsp->dev = NULL;
|
mcbsp->dev = NULL;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -169,26 +169,51 @@ config BF542
|
||||||
help
|
help
|
||||||
BF542 Processor Support.
|
BF542 Processor Support.
|
||||||
|
|
||||||
|
config BF542M
|
||||||
|
bool "BF542m"
|
||||||
|
help
|
||||||
|
BF542 Processor Support.
|
||||||
|
|
||||||
config BF544
|
config BF544
|
||||||
bool "BF544"
|
bool "BF544"
|
||||||
help
|
help
|
||||||
BF544 Processor Support.
|
BF544 Processor Support.
|
||||||
|
|
||||||
|
config BF544M
|
||||||
|
bool "BF544m"
|
||||||
|
help
|
||||||
|
BF544 Processor Support.
|
||||||
|
|
||||||
config BF547
|
config BF547
|
||||||
bool "BF547"
|
bool "BF547"
|
||||||
help
|
help
|
||||||
BF547 Processor Support.
|
BF547 Processor Support.
|
||||||
|
|
||||||
|
config BF547M
|
||||||
|
bool "BF547m"
|
||||||
|
help
|
||||||
|
BF547 Processor Support.
|
||||||
|
|
||||||
config BF548
|
config BF548
|
||||||
bool "BF548"
|
bool "BF548"
|
||||||
help
|
help
|
||||||
BF548 Processor Support.
|
BF548 Processor Support.
|
||||||
|
|
||||||
|
config BF548M
|
||||||
|
bool "BF548m"
|
||||||
|
help
|
||||||
|
BF548 Processor Support.
|
||||||
|
|
||||||
config BF549
|
config BF549
|
||||||
bool "BF549"
|
bool "BF549"
|
||||||
help
|
help
|
||||||
BF549 Processor Support.
|
BF549 Processor Support.
|
||||||
|
|
||||||
|
config BF549M
|
||||||
|
bool "BF549m"
|
||||||
|
help
|
||||||
|
BF549 Processor Support.
|
||||||
|
|
||||||
config BF561
|
config BF561
|
||||||
bool "BF561"
|
bool "BF561"
|
||||||
help
|
help
|
||||||
|
|
@ -224,39 +249,39 @@ config TICK_SOURCE_SYSTMR0
|
||||||
|
|
||||||
config BF_REV_MIN
|
config BF_REV_MIN
|
||||||
int
|
int
|
||||||
default 0 if (BF51x || BF52x || BF54x)
|
default 0 if (BF51x || BF52x || (BF54x && !BF54xM))
|
||||||
default 2 if (BF537 || BF536 || BF534)
|
default 2 if (BF537 || BF536 || BF534)
|
||||||
default 3 if (BF561 ||BF533 || BF532 || BF531)
|
default 3 if (BF561 || BF533 || BF532 || BF531 || BF54xM)
|
||||||
default 4 if (BF538 || BF539)
|
default 4 if (BF538 || BF539)
|
||||||
|
|
||||||
config BF_REV_MAX
|
config BF_REV_MAX
|
||||||
int
|
int
|
||||||
default 2 if (BF51x || BF52x || BF54x)
|
default 2 if (BF51x || BF52x || (BF54x && !BF54xM))
|
||||||
default 3 if (BF537 || BF536 || BF534)
|
default 3 if (BF537 || BF536 || BF534 || BF54xM)
|
||||||
default 5 if (BF561 || BF538 || BF539)
|
default 5 if (BF561 || BF538 || BF539)
|
||||||
default 6 if (BF533 || BF532 || BF531)
|
default 6 if (BF533 || BF532 || BF531)
|
||||||
|
|
||||||
choice
|
choice
|
||||||
prompt "Silicon Rev"
|
prompt "Silicon Rev"
|
||||||
default BF_REV_0_1 if (BF51x || BF52x || BF54x)
|
default BF_REV_0_1 if (BF51x || BF52x || (BF54x && !BF54xM))
|
||||||
default BF_REV_0_2 if (BF534 || BF536 || BF537)
|
default BF_REV_0_2 if (BF534 || BF536 || BF537)
|
||||||
default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561)
|
default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561)
|
||||||
|
|
||||||
config BF_REV_0_0
|
config BF_REV_0_0
|
||||||
bool "0.0"
|
bool "0.0"
|
||||||
depends on (BF51x || BF52x || BF54x)
|
depends on (BF51x || BF52x || (BF54x && !BF54xM))
|
||||||
|
|
||||||
config BF_REV_0_1
|
config BF_REV_0_1
|
||||||
bool "0.1"
|
bool "0.1"
|
||||||
depends on (BF52x || BF54x)
|
depends on (BF52x || (BF54x && !BF54xM))
|
||||||
|
|
||||||
config BF_REV_0_2
|
config BF_REV_0_2
|
||||||
bool "0.2"
|
bool "0.2"
|
||||||
depends on (BF52x || BF537 || BF536 || BF534 || BF54x)
|
depends on (BF52x || BF537 || BF536 || BF534 || (BF54x && !BF54xM))
|
||||||
|
|
||||||
config BF_REV_0_3
|
config BF_REV_0_3
|
||||||
bool "0.3"
|
bool "0.3"
|
||||||
depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
|
depends on (BF54xM || BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
|
||||||
|
|
||||||
config BF_REV_0_4
|
config BF_REV_0_4
|
||||||
bool "0.4"
|
bool "0.4"
|
||||||
|
|
@ -293,9 +318,14 @@ config BF53x
|
||||||
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
|
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
|
||||||
default y
|
default y
|
||||||
|
|
||||||
|
config BF54xM
|
||||||
|
bool
|
||||||
|
depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
|
||||||
|
default y
|
||||||
|
|
||||||
config BF54x
|
config BF54x
|
||||||
bool
|
bool
|
||||||
depends on (BF542 || BF544 || BF547 || BF548 || BF549)
|
depends on (BF542 || BF544 || BF547 || BF548 || BF549 || BF54xM)
|
||||||
default y
|
default y
|
||||||
|
|
||||||
config MEM_GENERIC_BOARD
|
config MEM_GENERIC_BOARD
|
||||||
|
|
|
||||||
|
|
@ -21,57 +21,67 @@ KALLSYMS += --symbol-prefix=_
|
||||||
KBUILD_DEFCONFIG := BF537-STAMP_defconfig
|
KBUILD_DEFCONFIG := BF537-STAMP_defconfig
|
||||||
|
|
||||||
# setup the machine name and the machine dependent settings
|
# setup the machine name and the machine dependent settings
|
||||||
machine-$(CONFIG_BF512) := bf518
|
machine-$(CONFIG_BF512) := bf518
|
||||||
machine-$(CONFIG_BF514) := bf518
|
machine-$(CONFIG_BF514) := bf518
|
||||||
machine-$(CONFIG_BF516) := bf518
|
machine-$(CONFIG_BF516) := bf518
|
||||||
machine-$(CONFIG_BF518) := bf518
|
machine-$(CONFIG_BF518) := bf518
|
||||||
machine-$(CONFIG_BF522) := bf527
|
machine-$(CONFIG_BF522) := bf527
|
||||||
machine-$(CONFIG_BF523) := bf527
|
machine-$(CONFIG_BF523) := bf527
|
||||||
machine-$(CONFIG_BF524) := bf527
|
machine-$(CONFIG_BF524) := bf527
|
||||||
machine-$(CONFIG_BF525) := bf527
|
machine-$(CONFIG_BF525) := bf527
|
||||||
machine-$(CONFIG_BF526) := bf527
|
machine-$(CONFIG_BF526) := bf527
|
||||||
machine-$(CONFIG_BF527) := bf527
|
machine-$(CONFIG_BF527) := bf527
|
||||||
machine-$(CONFIG_BF531) := bf533
|
machine-$(CONFIG_BF531) := bf533
|
||||||
machine-$(CONFIG_BF532) := bf533
|
machine-$(CONFIG_BF532) := bf533
|
||||||
machine-$(CONFIG_BF533) := bf533
|
machine-$(CONFIG_BF533) := bf533
|
||||||
machine-$(CONFIG_BF534) := bf537
|
machine-$(CONFIG_BF534) := bf537
|
||||||
machine-$(CONFIG_BF536) := bf537
|
machine-$(CONFIG_BF536) := bf537
|
||||||
machine-$(CONFIG_BF537) := bf537
|
machine-$(CONFIG_BF537) := bf537
|
||||||
machine-$(CONFIG_BF538) := bf538
|
machine-$(CONFIG_BF538) := bf538
|
||||||
machine-$(CONFIG_BF539) := bf538
|
machine-$(CONFIG_BF539) := bf538
|
||||||
machine-$(CONFIG_BF542) := bf548
|
machine-$(CONFIG_BF542) := bf548
|
||||||
machine-$(CONFIG_BF544) := bf548
|
machine-$(CONFIG_BF542M) := bf548
|
||||||
machine-$(CONFIG_BF547) := bf548
|
machine-$(CONFIG_BF544) := bf548
|
||||||
machine-$(CONFIG_BF548) := bf548
|
machine-$(CONFIG_BF544M) := bf548
|
||||||
machine-$(CONFIG_BF549) := bf548
|
machine-$(CONFIG_BF547) := bf548
|
||||||
machine-$(CONFIG_BF561) := bf561
|
machine-$(CONFIG_BF547M) := bf548
|
||||||
|
machine-$(CONFIG_BF548) := bf548
|
||||||
|
machine-$(CONFIG_BF548M) := bf548
|
||||||
|
machine-$(CONFIG_BF549) := bf548
|
||||||
|
machine-$(CONFIG_BF549M) := bf548
|
||||||
|
machine-$(CONFIG_BF561) := bf561
|
||||||
MACHINE := $(machine-y)
|
MACHINE := $(machine-y)
|
||||||
export MACHINE
|
export MACHINE
|
||||||
|
|
||||||
cpu-$(CONFIG_BF512) := bf512
|
cpu-$(CONFIG_BF512) := bf512
|
||||||
cpu-$(CONFIG_BF514) := bf514
|
cpu-$(CONFIG_BF514) := bf514
|
||||||
cpu-$(CONFIG_BF516) := bf516
|
cpu-$(CONFIG_BF516) := bf516
|
||||||
cpu-$(CONFIG_BF518) := bf518
|
cpu-$(CONFIG_BF518) := bf518
|
||||||
cpu-$(CONFIG_BF522) := bf522
|
cpu-$(CONFIG_BF522) := bf522
|
||||||
cpu-$(CONFIG_BF523) := bf523
|
cpu-$(CONFIG_BF523) := bf523
|
||||||
cpu-$(CONFIG_BF524) := bf524
|
cpu-$(CONFIG_BF524) := bf524
|
||||||
cpu-$(CONFIG_BF525) := bf525
|
cpu-$(CONFIG_BF525) := bf525
|
||||||
cpu-$(CONFIG_BF526) := bf526
|
cpu-$(CONFIG_BF526) := bf526
|
||||||
cpu-$(CONFIG_BF527) := bf527
|
cpu-$(CONFIG_BF527) := bf527
|
||||||
cpu-$(CONFIG_BF531) := bf531
|
cpu-$(CONFIG_BF531) := bf531
|
||||||
cpu-$(CONFIG_BF532) := bf532
|
cpu-$(CONFIG_BF532) := bf532
|
||||||
cpu-$(CONFIG_BF533) := bf533
|
cpu-$(CONFIG_BF533) := bf533
|
||||||
cpu-$(CONFIG_BF534) := bf534
|
cpu-$(CONFIG_BF534) := bf534
|
||||||
cpu-$(CONFIG_BF536) := bf536
|
cpu-$(CONFIG_BF536) := bf536
|
||||||
cpu-$(CONFIG_BF537) := bf537
|
cpu-$(CONFIG_BF537) := bf537
|
||||||
cpu-$(CONFIG_BF538) := bf538
|
cpu-$(CONFIG_BF538) := bf538
|
||||||
cpu-$(CONFIG_BF539) := bf539
|
cpu-$(CONFIG_BF539) := bf539
|
||||||
cpu-$(CONFIG_BF542) := bf542
|
cpu-$(CONFIG_BF542) := bf542
|
||||||
cpu-$(CONFIG_BF544) := bf544
|
cpu-$(CONFIG_BF542M) := bf542m
|
||||||
cpu-$(CONFIG_BF547) := bf547
|
cpu-$(CONFIG_BF544) := bf544
|
||||||
cpu-$(CONFIG_BF548) := bf548
|
cpu-$(CONFIG_BF544M) := bf544m
|
||||||
cpu-$(CONFIG_BF549) := bf549
|
cpu-$(CONFIG_BF547) := bf547
|
||||||
cpu-$(CONFIG_BF561) := bf561
|
cpu-$(CONFIG_BF547M) := bf547m
|
||||||
|
cpu-$(CONFIG_BF548) := bf548
|
||||||
|
cpu-$(CONFIG_BF548M) := bf548m
|
||||||
|
cpu-$(CONFIG_BF549) := bf549
|
||||||
|
cpu-$(CONFIG_BF549M) := bf549m
|
||||||
|
cpu-$(CONFIG_BF561) := bf561
|
||||||
|
|
||||||
rev-$(CONFIG_BF_REV_0_0) := 0.0
|
rev-$(CONFIG_BF_REV_0_0) := 0.0
|
||||||
rev-$(CONFIG_BF_REV_0_1) := 0.1
|
rev-$(CONFIG_BF_REV_0_1) := 0.1
|
||||||
|
|
|
||||||
|
|
@ -1,6 +1,7 @@
|
||||||
#
|
#
|
||||||
# Automatically generated make config: don't edit
|
# Automatically generated make config: don't edit
|
||||||
# Linux kernel version: 2.6.28-rc2
|
# Linux kernel version: 2.6.28-rc2
|
||||||
|
# Fri Jan 9 17:58:41 2009
|
||||||
#
|
#
|
||||||
# CONFIG_MMU is not set
|
# CONFIG_MMU is not set
|
||||||
# CONFIG_FPU is not set
|
# CONFIG_FPU is not set
|
||||||
|
|
@ -149,6 +150,7 @@ CONFIG_BF_REV_0_0=y
|
||||||
# CONFIG_BF_REV_ANY is not set
|
# CONFIG_BF_REV_ANY is not set
|
||||||
# CONFIG_BF_REV_NONE is not set
|
# CONFIG_BF_REV_NONE is not set
|
||||||
CONFIG_BF51x=y
|
CONFIG_BF51x=y
|
||||||
|
CONFIG_MEM_MT48LC32M8A2_75=y
|
||||||
CONFIG_BFIN518F_EZBRD=y
|
CONFIG_BFIN518F_EZBRD=y
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
@ -598,7 +600,10 @@ CONFIG_PHYLIB=y
|
||||||
# CONFIG_MDIO_BITBANG is not set
|
# CONFIG_MDIO_BITBANG is not set
|
||||||
CONFIG_NET_ETHERNET=y
|
CONFIG_NET_ETHERNET=y
|
||||||
CONFIG_MII=y
|
CONFIG_MII=y
|
||||||
# CONFIG_BFIN_MAC is not set
|
CONFIG_BFIN_MAC=y
|
||||||
|
CONFIG_BFIN_TX_DESC_NUM=10
|
||||||
|
CONFIG_BFIN_RX_DESC_NUM=20
|
||||||
|
# CONFIG_BFIN_MAC_RMII is not set
|
||||||
# CONFIG_SMC91X is not set
|
# CONFIG_SMC91X is not set
|
||||||
# CONFIG_SMSC911X is not set
|
# CONFIG_SMSC911X is not set
|
||||||
# CONFIG_DM9000 is not set
|
# CONFIG_DM9000 is not set
|
||||||
|
|
@ -679,7 +684,7 @@ CONFIG_VT_CONSOLE=y
|
||||||
CONFIG_HW_CONSOLE=y
|
CONFIG_HW_CONSOLE=y
|
||||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -723,7 +723,7 @@ CONFIG_VT_CONSOLE=y
|
||||||
CONFIG_HW_CONSOLE=y
|
CONFIG_HW_CONSOLE=y
|
||||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -767,7 +767,7 @@ CONFIG_VT_CONSOLE=y
|
||||||
CONFIG_HW_CONSOLE=y
|
CONFIG_HW_CONSOLE=y
|
||||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -672,7 +672,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
|
||||||
CONFIG_SIMPLE_GPIO=m
|
CONFIG_SIMPLE_GPIO=m
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -679,7 +679,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
|
||||||
CONFIG_SIMPLE_GPIO=m
|
CONFIG_SIMPLE_GPIO=m
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -722,7 +722,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
|
||||||
CONFIG_SIMPLE_GPIO=m
|
CONFIG_SIMPLE_GPIO=m
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -726,7 +726,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
|
||||||
CONFIG_SIMPLE_GPIO=m
|
CONFIG_SIMPLE_GPIO=m
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -856,7 +856,7 @@ CONFIG_VT_CONSOLE=y
|
||||||
CONFIG_HW_CONSOLE=y
|
CONFIG_HW_CONSOLE=y
|
||||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -709,7 +709,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
|
||||||
CONFIG_SIMPLE_GPIO=m
|
CONFIG_SIMPLE_GPIO=m
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
# CONFIG_BFIN_JTAG_COMM is not set
|
CONFIG_BFIN_JTAG_COMM=m
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
|
||||||
|
|
@ -1,7 +1,6 @@
|
||||||
#
|
#
|
||||||
# Automatically generated make config: don't edit
|
# Automatically generated make config: don't edit
|
||||||
# Linux kernel version: 2.6.24.7
|
# Linux kernel version: 2.6.28
|
||||||
# Fri Jul 18 18:00:41 2008
|
|
||||||
#
|
#
|
||||||
# CONFIG_MMU is not set
|
# CONFIG_MMU is not set
|
||||||
# CONFIG_FPU is not set
|
# CONFIG_FPU is not set
|
||||||
|
|
@ -9,7 +8,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||||
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
|
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
|
||||||
CONFIG_BLACKFIN=y
|
CONFIG_BLACKFIN=y
|
||||||
CONFIG_ZONE_DMA=y
|
CONFIG_ZONE_DMA=y
|
||||||
CONFIG_SEMAPHORE_SLEEPERS=y
|
|
||||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||||
CONFIG_GENERIC_HWEIGHT=y
|
CONFIG_GENERIC_HWEIGHT=y
|
||||||
CONFIG_GENERIC_HARDIRQS=y
|
CONFIG_GENERIC_HARDIRQS=y
|
||||||
|
|
@ -32,18 +30,16 @@ CONFIG_SYSVIPC_SYSCTL=y
|
||||||
# CONFIG_POSIX_MQUEUE is not set
|
# CONFIG_POSIX_MQUEUE is not set
|
||||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||||
# CONFIG_TASKSTATS is not set
|
# CONFIG_TASKSTATS is not set
|
||||||
# CONFIG_USER_NS is not set
|
|
||||||
# CONFIG_PID_NS is not set
|
|
||||||
# CONFIG_AUDIT is not set
|
# CONFIG_AUDIT is not set
|
||||||
CONFIG_IKCONFIG=y
|
CONFIG_IKCONFIG=y
|
||||||
CONFIG_IKCONFIG_PROC=y
|
CONFIG_IKCONFIG_PROC=y
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
CONFIG_LOG_BUF_SHIFT=14
|
||||||
# CONFIG_CGROUPS is not set
|
# CONFIG_CGROUPS is not set
|
||||||
CONFIG_FAIR_GROUP_SCHED=y
|
# CONFIG_GROUP_SCHED is not set
|
||||||
CONFIG_FAIR_USER_SCHED=y
|
CONFIG_SYSFS_DEPRECATED=y
|
||||||
# CONFIG_FAIR_CGROUP_SCHED is not set
|
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||||
# CONFIG_SYSFS_DEPRECATED is not set
|
|
||||||
# CONFIG_RELAY is not set
|
# CONFIG_RELAY is not set
|
||||||
|
# CONFIG_NAMESPACES is not set
|
||||||
CONFIG_BLK_DEV_INITRD=y
|
CONFIG_BLK_DEV_INITRD=y
|
||||||
CONFIG_INITRAMFS_SOURCE=""
|
CONFIG_INITRAMFS_SOURCE=""
|
||||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||||
|
|
@ -52,26 +48,35 @@ CONFIG_EMBEDDED=y
|
||||||
CONFIG_UID16=y
|
CONFIG_UID16=y
|
||||||
CONFIG_SYSCTL_SYSCALL=y
|
CONFIG_SYSCTL_SYSCALL=y
|
||||||
CONFIG_KALLSYMS=y
|
CONFIG_KALLSYMS=y
|
||||||
|
# CONFIG_KALLSYMS_ALL is not set
|
||||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||||
CONFIG_HOTPLUG=y
|
CONFIG_HOTPLUG=y
|
||||||
CONFIG_PRINTK=y
|
CONFIG_PRINTK=y
|
||||||
CONFIG_BUG=y
|
CONFIG_BUG=y
|
||||||
# CONFIG_ELF_CORE is not set
|
# CONFIG_ELF_CORE is not set
|
||||||
|
CONFIG_COMPAT_BRK=y
|
||||||
CONFIG_BASE_FULL=y
|
CONFIG_BASE_FULL=y
|
||||||
CONFIG_FUTEX=y
|
CONFIG_FUTEX=y
|
||||||
CONFIG_ANON_INODES=y
|
CONFIG_ANON_INODES=y
|
||||||
CONFIG_EPOLL=y
|
CONFIG_EPOLL=y
|
||||||
CONFIG_SIGNALFD=y
|
CONFIG_SIGNALFD=y
|
||||||
|
CONFIG_TIMERFD=y
|
||||||
CONFIG_EVENTFD=y
|
CONFIG_EVENTFD=y
|
||||||
|
CONFIG_AIO=y
|
||||||
CONFIG_VM_EVENT_COUNTERS=y
|
CONFIG_VM_EVENT_COUNTERS=y
|
||||||
CONFIG_SLAB=y
|
CONFIG_SLAB=y
|
||||||
# CONFIG_SLUB is not set
|
# CONFIG_SLUB is not set
|
||||||
# CONFIG_SLOB is not set
|
# CONFIG_SLOB is not set
|
||||||
|
# CONFIG_PROFILING is not set
|
||||||
|
# CONFIG_MARKERS is not set
|
||||||
|
CONFIG_HAVE_OPROFILE=y
|
||||||
|
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||||
CONFIG_SLABINFO=y
|
CONFIG_SLABINFO=y
|
||||||
CONFIG_RT_MUTEXES=y
|
CONFIG_RT_MUTEXES=y
|
||||||
CONFIG_TINY_SHMEM=y
|
CONFIG_TINY_SHMEM=y
|
||||||
CONFIG_BASE_SMALL=0
|
CONFIG_BASE_SMALL=0
|
||||||
CONFIG_MODULES=y
|
CONFIG_MODULES=y
|
||||||
|
# CONFIG_MODULE_FORCE_LOAD is not set
|
||||||
CONFIG_MODULE_UNLOAD=y
|
CONFIG_MODULE_UNLOAD=y
|
||||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||||
# CONFIG_MODVERSIONS is not set
|
# CONFIG_MODVERSIONS is not set
|
||||||
|
|
@ -82,6 +87,7 @@ CONFIG_BLOCK=y
|
||||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||||
# CONFIG_LSF is not set
|
# CONFIG_LSF is not set
|
||||||
# CONFIG_BLK_DEV_BSG is not set
|
# CONFIG_BLK_DEV_BSG is not set
|
||||||
|
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# IO Schedulers
|
# IO Schedulers
|
||||||
|
|
@ -95,9 +101,11 @@ CONFIG_IOSCHED_CFQ=y
|
||||||
CONFIG_DEFAULT_CFQ=y
|
CONFIG_DEFAULT_CFQ=y
|
||||||
# CONFIG_DEFAULT_NOOP is not set
|
# CONFIG_DEFAULT_NOOP is not set
|
||||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||||
|
CONFIG_CLASSIC_RCU=y
|
||||||
# CONFIG_PREEMPT_NONE is not set
|
# CONFIG_PREEMPT_NONE is not set
|
||||||
CONFIG_PREEMPT_VOLUNTARY=y
|
CONFIG_PREEMPT_VOLUNTARY=y
|
||||||
# CONFIG_PREEMPT is not set
|
# CONFIG_PREEMPT is not set
|
||||||
|
# CONFIG_FREEZER is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Blackfin Processor Options
|
# Blackfin Processor Options
|
||||||
|
|
@ -106,6 +114,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
|
||||||
#
|
#
|
||||||
# Processor and Board Settings
|
# Processor and Board Settings
|
||||||
#
|
#
|
||||||
|
# CONFIG_BF512 is not set
|
||||||
|
# CONFIG_BF514 is not set
|
||||||
|
# CONFIG_BF516 is not set
|
||||||
|
# CONFIG_BF518 is not set
|
||||||
# CONFIG_BF522 is not set
|
# CONFIG_BF522 is not set
|
||||||
# CONFIG_BF523 is not set
|
# CONFIG_BF523 is not set
|
||||||
# CONFIG_BF524 is not set
|
# CONFIG_BF524 is not set
|
||||||
|
|
@ -118,48 +130,32 @@ CONFIG_BF527=y
|
||||||
# CONFIG_BF534 is not set
|
# CONFIG_BF534 is not set
|
||||||
# CONFIG_BF536 is not set
|
# CONFIG_BF536 is not set
|
||||||
# CONFIG_BF537 is not set
|
# CONFIG_BF537 is not set
|
||||||
|
# CONFIG_BF538 is not set
|
||||||
|
# CONFIG_BF539 is not set
|
||||||
# CONFIG_BF542 is not set
|
# CONFIG_BF542 is not set
|
||||||
|
# CONFIG_BF542M is not set
|
||||||
# CONFIG_BF544 is not set
|
# CONFIG_BF544 is not set
|
||||||
|
# CONFIG_BF544M is not set
|
||||||
# CONFIG_BF547 is not set
|
# CONFIG_BF547 is not set
|
||||||
|
# CONFIG_BF547M is not set
|
||||||
# CONFIG_BF548 is not set
|
# CONFIG_BF548 is not set
|
||||||
|
# CONFIG_BF548M is not set
|
||||||
# CONFIG_BF549 is not set
|
# CONFIG_BF549 is not set
|
||||||
|
# CONFIG_BF549M is not set
|
||||||
# CONFIG_BF561 is not set
|
# CONFIG_BF561 is not set
|
||||||
|
CONFIG_BF_REV_MIN=0
|
||||||
|
CONFIG_BF_REV_MAX=2
|
||||||
# CONFIG_BF_REV_0_0 is not set
|
# CONFIG_BF_REV_0_0 is not set
|
||||||
CONFIG_BF_REV_0_1=y
|
CONFIG_BF_REV_0_1=y
|
||||||
# CONFIG_BF_REV_0_2 is not set
|
# CONFIG_BF_REV_0_2 is not set
|
||||||
# CONFIG_BF_REV_0_3 is not set
|
# CONFIG_BF_REV_0_3 is not set
|
||||||
# CONFIG_BF_REV_0_4 is not set
|
# CONFIG_BF_REV_0_4 is not set
|
||||||
# CONFIG_BF_REV_0_5 is not set
|
# CONFIG_BF_REV_0_5 is not set
|
||||||
|
# CONFIG_BF_REV_0_6 is not set
|
||||||
# CONFIG_BF_REV_ANY is not set
|
# CONFIG_BF_REV_ANY is not set
|
||||||
# CONFIG_BF_REV_NONE is not set
|
# CONFIG_BF_REV_NONE is not set
|
||||||
CONFIG_BF52x=y
|
CONFIG_BF52x=y
|
||||||
CONFIG_MEM_MT48LC16M16A2TG_75=y
|
CONFIG_MEM_MT48LC16M16A2TG_75=y
|
||||||
# CONFIG_BFIN527_EZKIT is not set
|
|
||||||
CONFIG_BFIN527_BLUETECHNIX_CM=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# BF527 Specific Configuration
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Alternative Multiplexing Scheme
|
|
||||||
#
|
|
||||||
# CONFIG_BF527_SPORT0_PORTF is not set
|
|
||||||
CONFIG_BF527_SPORT0_PORTG=y
|
|
||||||
CONFIG_BF527_SPORT0_TSCLK_PG10=y
|
|
||||||
# CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
|
|
||||||
CONFIG_BF527_UART1_PORTF=y
|
|
||||||
# CONFIG_BF527_UART1_PORTG is not set
|
|
||||||
# CONFIG_BF527_NAND_D_PORTF is not set
|
|
||||||
CONFIG_BF527_NAND_D_PORTH=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Interrupt Priority Assignment
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Priority
|
|
||||||
#
|
|
||||||
CONFIG_IRQ_PLL_WAKEUP=7
|
CONFIG_IRQ_PLL_WAKEUP=7
|
||||||
CONFIG_IRQ_DMA0_ERROR=7
|
CONFIG_IRQ_DMA0_ERROR=7
|
||||||
CONFIG_IRQ_DMAR0_BLK=7
|
CONFIG_IRQ_DMAR0_BLK=7
|
||||||
|
|
@ -179,7 +175,6 @@ CONFIG_IRQ_SPORT0_TX=9
|
||||||
CONFIG_IRQ_SPORT1_RX=9
|
CONFIG_IRQ_SPORT1_RX=9
|
||||||
CONFIG_IRQ_SPORT1_TX=9
|
CONFIG_IRQ_SPORT1_TX=9
|
||||||
CONFIG_IRQ_TWI=10
|
CONFIG_IRQ_TWI=10
|
||||||
CONFIG_IRQ_SPI=10
|
|
||||||
CONFIG_IRQ_UART0_RX=10
|
CONFIG_IRQ_UART0_RX=10
|
||||||
CONFIG_IRQ_UART0_TX=10
|
CONFIG_IRQ_UART0_TX=10
|
||||||
CONFIG_IRQ_UART1_RX=10
|
CONFIG_IRQ_UART1_RX=10
|
||||||
|
|
@ -205,6 +200,34 @@ CONFIG_IRQ_MEM_DMA1=13
|
||||||
CONFIG_IRQ_WATCH=13
|
CONFIG_IRQ_WATCH=13
|
||||||
CONFIG_IRQ_PORTF_INTA=13
|
CONFIG_IRQ_PORTF_INTA=13
|
||||||
CONFIG_IRQ_PORTF_INTB=13
|
CONFIG_IRQ_PORTF_INTB=13
|
||||||
|
# CONFIG_BFIN527_EZKIT is not set
|
||||||
|
CONFIG_BFIN527_BLUETECHNIX_CM=y
|
||||||
|
# CONFIG_BFIN526_EZBRD is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# BF527 Specific Configuration
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Alternative Multiplexing Scheme
|
||||||
|
#
|
||||||
|
# CONFIG_BF527_SPORT0_PORTF is not set
|
||||||
|
CONFIG_BF527_SPORT0_PORTG=y
|
||||||
|
CONFIG_BF527_SPORT0_TSCLK_PG10=y
|
||||||
|
# CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
|
||||||
|
CONFIG_BF527_UART1_PORTF=y
|
||||||
|
# CONFIG_BF527_UART1_PORTG is not set
|
||||||
|
# CONFIG_BF527_NAND_D_PORTF is not set
|
||||||
|
CONFIG_BF527_NAND_D_PORTH=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Interrupt Priority Assignment
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Priority
|
||||||
|
#
|
||||||
|
CONFIG_IRQ_SPI=10
|
||||||
CONFIG_IRQ_SPI_ERROR=7
|
CONFIG_IRQ_SPI_ERROR=7
|
||||||
CONFIG_IRQ_NFC_ERROR=7
|
CONFIG_IRQ_NFC_ERROR=7
|
||||||
CONFIG_IRQ_HDMA_ERROR=7
|
CONFIG_IRQ_HDMA_ERROR=7
|
||||||
|
|
@ -226,7 +249,6 @@ CONFIG_BOOT_LOAD=0x1000
|
||||||
#
|
#
|
||||||
CONFIG_CLKIN_HZ=25000000
|
CONFIG_CLKIN_HZ=25000000
|
||||||
# CONFIG_BFIN_KERNEL_CLOCK is not set
|
# CONFIG_BFIN_KERNEL_CLOCK is not set
|
||||||
CONFIG_MAX_MEM_SIZE=512
|
|
||||||
CONFIG_MAX_VCO_HZ=600000000
|
CONFIG_MAX_VCO_HZ=600000000
|
||||||
CONFIG_MIN_VCO_HZ=50000000
|
CONFIG_MIN_VCO_HZ=50000000
|
||||||
CONFIG_MAX_SCLK_HZ=133333333
|
CONFIG_MAX_SCLK_HZ=133333333
|
||||||
|
|
@ -240,10 +262,10 @@ CONFIG_HZ_250=y
|
||||||
# CONFIG_HZ_300 is not set
|
# CONFIG_HZ_300 is not set
|
||||||
# CONFIG_HZ_1000 is not set
|
# CONFIG_HZ_1000 is not set
|
||||||
CONFIG_HZ=250
|
CONFIG_HZ=250
|
||||||
|
# CONFIG_SCHED_HRTICK is not set
|
||||||
CONFIG_GENERIC_TIME=y
|
CONFIG_GENERIC_TIME=y
|
||||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||||
# CONFIG_CYCLES_CLOCKSOURCE is not set
|
# CONFIG_CYCLES_CLOCKSOURCE is not set
|
||||||
# CONFIG_TICK_ONESHOT is not set
|
|
||||||
# CONFIG_NO_HZ is not set
|
# CONFIG_NO_HZ is not set
|
||||||
# CONFIG_HIGH_RES_TIMERS is not set
|
# CONFIG_HIGH_RES_TIMERS is not set
|
||||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||||
|
|
@ -277,6 +299,12 @@ CONFIG_ACCESS_OK_L1=y
|
||||||
CONFIG_CACHELINE_ALIGNED_L1=y
|
CONFIG_CACHELINE_ALIGNED_L1=y
|
||||||
# CONFIG_SYSCALL_TAB_L1 is not set
|
# CONFIG_SYSCALL_TAB_L1 is not set
|
||||||
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
|
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
|
||||||
|
CONFIG_APP_STACK_L1=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Speed Optimizations
|
||||||
|
#
|
||||||
|
CONFIG_BFIN_INS_LOWOVERHEAD=y
|
||||||
CONFIG_RAMKERNEL=y
|
CONFIG_RAMKERNEL=y
|
||||||
# CONFIG_ROMKERNEL is not set
|
# CONFIG_ROMKERNEL is not set
|
||||||
CONFIG_SELECT_MEMORY_MODEL=y
|
CONFIG_SELECT_MEMORY_MODEL=y
|
||||||
|
|
@ -285,10 +313,10 @@ CONFIG_FLATMEM_MANUAL=y
|
||||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||||
CONFIG_FLATMEM=y
|
CONFIG_FLATMEM=y
|
||||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||||
# CONFIG_SPARSEMEM_STATIC is not set
|
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||||
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
|
|
||||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||||
# CONFIG_RESOURCES_64BIT is not set
|
# CONFIG_RESOURCES_64BIT is not set
|
||||||
|
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||||
CONFIG_ZONE_DMA_FLAG=1
|
CONFIG_ZONE_DMA_FLAG=1
|
||||||
CONFIG_VIRT_TO_BUS=y
|
CONFIG_VIRT_TO_BUS=y
|
||||||
CONFIG_BFIN_GPTIMERS=y
|
CONFIG_BFIN_GPTIMERS=y
|
||||||
|
|
@ -334,7 +362,6 @@ CONFIG_BANK_3=0xFFC0
|
||||||
#
|
#
|
||||||
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
|
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
|
||||||
#
|
#
|
||||||
# CONFIG_PCI is not set
|
|
||||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||||
# CONFIG_PCCARD is not set
|
# CONFIG_PCCARD is not set
|
||||||
|
|
||||||
|
|
@ -345,25 +372,20 @@ CONFIG_BINFMT_ELF_FDPIC=y
|
||||||
CONFIG_BINFMT_FLAT=y
|
CONFIG_BINFMT_FLAT=y
|
||||||
CONFIG_BINFMT_ZFLAT=y
|
CONFIG_BINFMT_ZFLAT=y
|
||||||
# CONFIG_BINFMT_SHARED_FLAT is not set
|
# CONFIG_BINFMT_SHARED_FLAT is not set
|
||||||
|
# CONFIG_HAVE_AOUT is not set
|
||||||
# CONFIG_BINFMT_MISC is not set
|
# CONFIG_BINFMT_MISC is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Power management options
|
# Power management options
|
||||||
#
|
#
|
||||||
# CONFIG_PM is not set
|
# CONFIG_PM is not set
|
||||||
CONFIG_SUSPEND_UP_POSSIBLE=y
|
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||||
# CONFIG_PM_BFIN_SLEEP_DEEPER is not set
|
|
||||||
# CONFIG_PM_BFIN_SLEEP is not set
|
|
||||||
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
# CONFIG_PM_WAKEUP_BY_GPIO is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# CPU Frequency scaling
|
# CPU Frequency scaling
|
||||||
#
|
#
|
||||||
# CONFIG_CPU_FREQ is not set
|
# CONFIG_CPU_FREQ is not set
|
||||||
|
|
||||||
#
|
|
||||||
# Networking
|
|
||||||
#
|
|
||||||
CONFIG_NET=y
|
CONFIG_NET=y
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
@ -376,6 +398,7 @@ CONFIG_XFRM=y
|
||||||
# CONFIG_XFRM_USER is not set
|
# CONFIG_XFRM_USER is not set
|
||||||
# CONFIG_XFRM_SUB_POLICY is not set
|
# CONFIG_XFRM_SUB_POLICY is not set
|
||||||
# CONFIG_XFRM_MIGRATE is not set
|
# CONFIG_XFRM_MIGRATE is not set
|
||||||
|
# CONFIG_XFRM_STATISTICS is not set
|
||||||
# CONFIG_NET_KEY is not set
|
# CONFIG_NET_KEY is not set
|
||||||
CONFIG_INET=y
|
CONFIG_INET=y
|
||||||
# CONFIG_IP_MULTICAST is not set
|
# CONFIG_IP_MULTICAST is not set
|
||||||
|
|
@ -405,8 +428,6 @@ CONFIG_TCP_CONG_CUBIC=y
|
||||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||||
# CONFIG_TCP_MD5SIG is not set
|
# CONFIG_TCP_MD5SIG is not set
|
||||||
# CONFIG_IPV6 is not set
|
# CONFIG_IPV6 is not set
|
||||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
|
||||||
# CONFIG_INET6_TUNNEL is not set
|
|
||||||
# CONFIG_NETLABEL is not set
|
# CONFIG_NETLABEL is not set
|
||||||
# CONFIG_NETWORK_SECMARK is not set
|
# CONFIG_NETWORK_SECMARK is not set
|
||||||
# CONFIG_NETFILTER is not set
|
# CONFIG_NETFILTER is not set
|
||||||
|
|
@ -415,6 +436,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||||
# CONFIG_TIPC is not set
|
# CONFIG_TIPC is not set
|
||||||
# CONFIG_ATM is not set
|
# CONFIG_ATM is not set
|
||||||
# CONFIG_BRIDGE is not set
|
# CONFIG_BRIDGE is not set
|
||||||
|
# CONFIG_NET_DSA is not set
|
||||||
# CONFIG_VLAN_8021Q is not set
|
# CONFIG_VLAN_8021Q is not set
|
||||||
# CONFIG_DECNET is not set
|
# CONFIG_DECNET is not set
|
||||||
# CONFIG_LLC2 is not set
|
# CONFIG_LLC2 is not set
|
||||||
|
|
@ -431,14 +453,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||||
#
|
#
|
||||||
# CONFIG_NET_PKTGEN is not set
|
# CONFIG_NET_PKTGEN is not set
|
||||||
# CONFIG_HAMRADIO is not set
|
# CONFIG_HAMRADIO is not set
|
||||||
|
# CONFIG_CAN is not set
|
||||||
# CONFIG_IRDA is not set
|
# CONFIG_IRDA is not set
|
||||||
# CONFIG_BT is not set
|
# CONFIG_BT is not set
|
||||||
# CONFIG_AF_RXRPC is not set
|
# CONFIG_AF_RXRPC is not set
|
||||||
|
# CONFIG_PHONET is not set
|
||||||
#
|
CONFIG_WIRELESS=y
|
||||||
# Wireless
|
|
||||||
#
|
|
||||||
# CONFIG_CFG80211 is not set
|
# CONFIG_CFG80211 is not set
|
||||||
|
CONFIG_WIRELESS_OLD_REGULATORY=y
|
||||||
# CONFIG_WIRELESS_EXT is not set
|
# CONFIG_WIRELESS_EXT is not set
|
||||||
# CONFIG_MAC80211 is not set
|
# CONFIG_MAC80211 is not set
|
||||||
# CONFIG_IEEE80211 is not set
|
# CONFIG_IEEE80211 is not set
|
||||||
|
|
@ -456,6 +478,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
CONFIG_STANDALONE=y
|
CONFIG_STANDALONE=y
|
||||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||||
# CONFIG_FW_LOADER is not set
|
# CONFIG_FW_LOADER is not set
|
||||||
|
# CONFIG_DEBUG_DRIVER is not set
|
||||||
|
# CONFIG_DEBUG_DEVRES is not set
|
||||||
# CONFIG_SYS_HYPERVISOR is not set
|
# CONFIG_SYS_HYPERVISOR is not set
|
||||||
# CONFIG_CONNECTOR is not set
|
# CONFIG_CONNECTOR is not set
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
|
|
@ -464,6 +488,7 @@ CONFIG_MTD=y
|
||||||
CONFIG_MTD_PARTITIONS=y
|
CONFIG_MTD_PARTITIONS=y
|
||||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||||
|
# CONFIG_MTD_AR7_PARTS is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# User Modules And Translation Layers
|
# User Modules And Translation Layers
|
||||||
|
|
@ -507,6 +532,7 @@ CONFIG_MTD_ROM=m
|
||||||
#
|
#
|
||||||
CONFIG_MTD_COMPLEX_MAPPINGS=y
|
CONFIG_MTD_COMPLEX_MAPPINGS=y
|
||||||
# CONFIG_MTD_PHYSMAP is not set
|
# CONFIG_MTD_PHYSMAP is not set
|
||||||
|
# CONFIG_MTD_GPIO_ADDR is not set
|
||||||
# CONFIG_MTD_UCLINUX is not set
|
# CONFIG_MTD_UCLINUX is not set
|
||||||
# CONFIG_MTD_PLATRAM is not set
|
# CONFIG_MTD_PLATRAM is not set
|
||||||
|
|
||||||
|
|
@ -542,10 +568,12 @@ CONFIG_BLK_DEV=y
|
||||||
CONFIG_BLK_DEV_RAM=y
|
CONFIG_BLK_DEV_RAM=y
|
||||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
# CONFIG_BLK_DEV_XIP is not set
|
||||||
# CONFIG_CDROM_PKTCDVD is not set
|
# CONFIG_CDROM_PKTCDVD is not set
|
||||||
# CONFIG_ATA_OVER_ETH is not set
|
# CONFIG_ATA_OVER_ETH is not set
|
||||||
|
# CONFIG_BLK_DEV_HD is not set
|
||||||
# CONFIG_MISC_DEVICES is not set
|
# CONFIG_MISC_DEVICES is not set
|
||||||
|
CONFIG_HAVE_IDE=y
|
||||||
# CONFIG_IDE is not set
|
# CONFIG_IDE is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
@ -558,7 +586,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||||
# CONFIG_ATA is not set
|
# CONFIG_ATA is not set
|
||||||
# CONFIG_MD is not set
|
# CONFIG_MD is not set
|
||||||
CONFIG_NETDEVICES=y
|
CONFIG_NETDEVICES=y
|
||||||
# CONFIG_NETDEVICES_MULTIQUEUE is not set
|
|
||||||
# CONFIG_DUMMY is not set
|
# CONFIG_DUMMY is not set
|
||||||
# CONFIG_BONDING is not set
|
# CONFIG_BONDING is not set
|
||||||
# CONFIG_MACVLAN is not set
|
# CONFIG_MACVLAN is not set
|
||||||
|
|
@ -579,6 +606,7 @@ CONFIG_PHYLIB=y
|
||||||
# CONFIG_SMSC_PHY is not set
|
# CONFIG_SMSC_PHY is not set
|
||||||
# CONFIG_BROADCOM_PHY is not set
|
# CONFIG_BROADCOM_PHY is not set
|
||||||
# CONFIG_ICPLUS_PHY is not set
|
# CONFIG_ICPLUS_PHY is not set
|
||||||
|
# CONFIG_REALTEK_PHY is not set
|
||||||
# CONFIG_FIXED_PHY is not set
|
# CONFIG_FIXED_PHY is not set
|
||||||
# CONFIG_MDIO_BITBANG is not set
|
# CONFIG_MDIO_BITBANG is not set
|
||||||
CONFIG_NET_ETHERNET=y
|
CONFIG_NET_ETHERNET=y
|
||||||
|
|
@ -591,11 +619,14 @@ CONFIG_BFIN_MAC_RMII=y
|
||||||
# CONFIG_SMC91X is not set
|
# CONFIG_SMC91X is not set
|
||||||
# CONFIG_SMSC911X is not set
|
# CONFIG_SMSC911X is not set
|
||||||
# CONFIG_DM9000 is not set
|
# CONFIG_DM9000 is not set
|
||||||
|
# CONFIG_ENC28J60 is not set
|
||||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||||
# CONFIG_B44 is not set
|
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
|
||||||
|
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||||
|
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||||
# CONFIG_NETDEV_1000 is not set
|
# CONFIG_NETDEV_1000 is not set
|
||||||
# CONFIG_NETDEV_10000 is not set
|
# CONFIG_NETDEV_10000 is not set
|
||||||
|
|
||||||
|
|
@ -604,6 +635,7 @@ CONFIG_BFIN_MAC_RMII=y
|
||||||
#
|
#
|
||||||
# CONFIG_WLAN_PRE80211 is not set
|
# CONFIG_WLAN_PRE80211 is not set
|
||||||
# CONFIG_WLAN_80211 is not set
|
# CONFIG_WLAN_80211 is not set
|
||||||
|
# CONFIG_IWLWIFI_LEDS is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# USB Network Adapters
|
# USB Network Adapters
|
||||||
|
|
@ -616,7 +648,6 @@ CONFIG_BFIN_MAC_RMII=y
|
||||||
# CONFIG_WAN is not set
|
# CONFIG_WAN is not set
|
||||||
# CONFIG_PPP is not set
|
# CONFIG_PPP is not set
|
||||||
# CONFIG_SLIP is not set
|
# CONFIG_SLIP is not set
|
||||||
# CONFIG_SHAPER is not set
|
|
||||||
# CONFIG_NETCONSOLE is not set
|
# CONFIG_NETCONSOLE is not set
|
||||||
# CONFIG_NETPOLL is not set
|
# CONFIG_NETPOLL is not set
|
||||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||||
|
|
@ -642,14 +673,15 @@ CONFIG_BFIN_MAC_RMII=y
|
||||||
# CONFIG_BF5xx_PPIFCD is not set
|
# CONFIG_BF5xx_PPIFCD is not set
|
||||||
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
# CONFIG_BFIN_SIMPLE_TIMER is not set
|
||||||
# CONFIG_BF5xx_PPI is not set
|
# CONFIG_BF5xx_PPI is not set
|
||||||
CONFIG_BFIN_OTP=y
|
# CONFIG_BF5xx_EPPI is not set
|
||||||
# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
|
|
||||||
# CONFIG_BFIN_SPORT is not set
|
# CONFIG_BFIN_SPORT is not set
|
||||||
# CONFIG_BFIN_TIMER_LATENCY is not set
|
# CONFIG_BFIN_TIMER_LATENCY is not set
|
||||||
# CONFIG_TWI_LCD is not set
|
# CONFIG_TWI_LCD is not set
|
||||||
|
CONFIG_BFIN_DMA_INTERFACE=m
|
||||||
CONFIG_SIMPLE_GPIO=m
|
CONFIG_SIMPLE_GPIO=m
|
||||||
# CONFIG_VT is not set
|
# CONFIG_VT is not set
|
||||||
# CONFIG_DEVKMEM is not set
|
# CONFIG_DEVKMEM is not set
|
||||||
|
# CONFIG_BFIN_JTAG_COMM is not set
|
||||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
@ -673,6 +705,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y
|
||||||
# CONFIG_SERIAL_BFIN_SPORT is not set
|
# CONFIG_SERIAL_BFIN_SPORT is not set
|
||||||
CONFIG_UNIX98_PTYS=y
|
CONFIG_UNIX98_PTYS=y
|
||||||
# CONFIG_LEGACY_PTYS is not set
|
# CONFIG_LEGACY_PTYS is not set
|
||||||
|
CONFIG_BFIN_OTP=y
|
||||||
|
# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# CAN, the car bus and industrial fieldbus
|
# CAN, the car bus and industrial fieldbus
|
||||||
|
|
@ -680,44 +714,49 @@ CONFIG_UNIX98_PTYS=y
|
||||||
# CONFIG_CAN4LINUX is not set
|
# CONFIG_CAN4LINUX is not set
|
||||||
# CONFIG_IPMI_HANDLER is not set
|
# CONFIG_IPMI_HANDLER is not set
|
||||||
# CONFIG_HW_RANDOM is not set
|
# CONFIG_HW_RANDOM is not set
|
||||||
# CONFIG_GEN_RTC is not set
|
|
||||||
# CONFIG_R3964 is not set
|
# CONFIG_R3964 is not set
|
||||||
# CONFIG_RAW_DRIVER is not set
|
# CONFIG_RAW_DRIVER is not set
|
||||||
# CONFIG_TCG_TPM is not set
|
# CONFIG_TCG_TPM is not set
|
||||||
CONFIG_I2C=y
|
CONFIG_I2C=y
|
||||||
CONFIG_I2C_BOARDINFO=y
|
CONFIG_I2C_BOARDINFO=y
|
||||||
CONFIG_I2C_CHARDEV=m
|
CONFIG_I2C_CHARDEV=m
|
||||||
|
CONFIG_I2C_HELPER_AUTO=y
|
||||||
#
|
|
||||||
# I2C Algorithms
|
|
||||||
#
|
|
||||||
# CONFIG_I2C_ALGOBIT is not set
|
|
||||||
# CONFIG_I2C_ALGOPCF is not set
|
|
||||||
# CONFIG_I2C_ALGOPCA is not set
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# I2C Hardware Bus support
|
# I2C Hardware Bus support
|
||||||
#
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# I2C system bus drivers (mostly embedded / system-on-chip)
|
||||||
|
#
|
||||||
CONFIG_I2C_BLACKFIN_TWI=m
|
CONFIG_I2C_BLACKFIN_TWI=m
|
||||||
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
|
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
|
||||||
# CONFIG_I2C_GPIO is not set
|
# CONFIG_I2C_GPIO is not set
|
||||||
# CONFIG_I2C_OCORES is not set
|
# CONFIG_I2C_OCORES is not set
|
||||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
|
||||||
# CONFIG_I2C_SIMTEC is not set
|
# CONFIG_I2C_SIMTEC is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# External I2C/SMBus adapter drivers
|
||||||
|
#
|
||||||
|
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||||
# CONFIG_I2C_TAOS_EVM is not set
|
# CONFIG_I2C_TAOS_EVM is not set
|
||||||
# CONFIG_I2C_STUB is not set
|
|
||||||
# CONFIG_I2C_TINY_USB is not set
|
# CONFIG_I2C_TINY_USB is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Other I2C/SMBus bus drivers
|
||||||
|
#
|
||||||
|
# CONFIG_I2C_PCA_PLATFORM is not set
|
||||||
|
# CONFIG_I2C_STUB is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Miscellaneous I2C Chip support
|
# Miscellaneous I2C Chip support
|
||||||
#
|
#
|
||||||
# CONFIG_SENSORS_DS1337 is not set
|
|
||||||
# CONFIG_SENSORS_DS1374 is not set
|
|
||||||
# CONFIG_DS1682 is not set
|
# CONFIG_DS1682 is not set
|
||||||
|
# CONFIG_AT24 is not set
|
||||||
# CONFIG_SENSORS_AD5252 is not set
|
# CONFIG_SENSORS_AD5252 is not set
|
||||||
# CONFIG_EEPROM_LEGACY is not set
|
# CONFIG_SENSORS_EEPROM is not set
|
||||||
# CONFIG_SENSORS_PCF8574 is not set
|
# CONFIG_SENSORS_PCF8574 is not set
|
||||||
# CONFIG_SENSORS_PCF8575 is not set
|
# CONFIG_PCF8575 is not set
|
||||||
# CONFIG_SENSORS_PCA9539 is not set
|
# CONFIG_SENSORS_PCA9539 is not set
|
||||||
# CONFIG_SENSORS_PCF8591 is not set
|
# CONFIG_SENSORS_PCF8591 is not set
|
||||||
# CONFIG_SENSORS_MAX6875 is not set
|
# CONFIG_SENSORS_MAX6875 is not set
|
||||||
|
|
@ -726,37 +765,41 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
|
||||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||||
# CONFIG_I2C_DEBUG_BUS is not set
|
# CONFIG_I2C_DEBUG_BUS is not set
|
||||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||||
|
|
||||||
#
|
|
||||||
# SPI support
|
|
||||||
#
|
|
||||||
CONFIG_SPI=y
|
CONFIG_SPI=y
|
||||||
|
# CONFIG_SPI_DEBUG is not set
|
||||||
CONFIG_SPI_MASTER=y
|
CONFIG_SPI_MASTER=y
|
||||||
|
|
||||||
#
|
#
|
||||||
# SPI Master Controller Drivers
|
# SPI Master Controller Drivers
|
||||||
#
|
#
|
||||||
CONFIG_SPI_BFIN=y
|
CONFIG_SPI_BFIN=y
|
||||||
|
# CONFIG_SPI_BFIN_LOCK is not set
|
||||||
# CONFIG_SPI_BITBANG is not set
|
# CONFIG_SPI_BITBANG is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# SPI Protocol Masters
|
# SPI Protocol Masters
|
||||||
#
|
#
|
||||||
# CONFIG_EEPROM_AT25 is not set
|
# CONFIG_SPI_AT25 is not set
|
||||||
# CONFIG_SPI_SPIDEV is not set
|
# CONFIG_SPI_SPIDEV is not set
|
||||||
# CONFIG_SPI_TLE62X0 is not set
|
# CONFIG_SPI_TLE62X0 is not set
|
||||||
|
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
||||||
|
# CONFIG_GPIOLIB is not set
|
||||||
# CONFIG_W1 is not set
|
# CONFIG_W1 is not set
|
||||||
# CONFIG_POWER_SUPPLY is not set
|
# CONFIG_POWER_SUPPLY is not set
|
||||||
CONFIG_HWMON=y
|
CONFIG_HWMON=y
|
||||||
# CONFIG_HWMON_VID is not set
|
# CONFIG_HWMON_VID is not set
|
||||||
|
# CONFIG_SENSORS_AD7414 is not set
|
||||||
# CONFIG_SENSORS_AD7418 is not set
|
# CONFIG_SENSORS_AD7418 is not set
|
||||||
|
# CONFIG_SENSORS_ADCXX is not set
|
||||||
# CONFIG_SENSORS_ADM1021 is not set
|
# CONFIG_SENSORS_ADM1021 is not set
|
||||||
# CONFIG_SENSORS_ADM1025 is not set
|
# CONFIG_SENSORS_ADM1025 is not set
|
||||||
# CONFIG_SENSORS_ADM1026 is not set
|
# CONFIG_SENSORS_ADM1026 is not set
|
||||||
# CONFIG_SENSORS_ADM1029 is not set
|
# CONFIG_SENSORS_ADM1029 is not set
|
||||||
# CONFIG_SENSORS_ADM1031 is not set
|
# CONFIG_SENSORS_ADM1031 is not set
|
||||||
# CONFIG_SENSORS_ADM9240 is not set
|
# CONFIG_SENSORS_ADM9240 is not set
|
||||||
|
# CONFIG_SENSORS_ADT7462 is not set
|
||||||
# CONFIG_SENSORS_ADT7470 is not set
|
# CONFIG_SENSORS_ADT7470 is not set
|
||||||
|
# CONFIG_SENSORS_ADT7473 is not set
|
||||||
# CONFIG_SENSORS_ATXP1 is not set
|
# CONFIG_SENSORS_ATXP1 is not set
|
||||||
# CONFIG_SENSORS_DS1621 is not set
|
# CONFIG_SENSORS_DS1621 is not set
|
||||||
# CONFIG_SENSORS_F71805F is not set
|
# CONFIG_SENSORS_F71805F is not set
|
||||||
|
|
@ -777,6 +820,7 @@ CONFIG_HWMON=y
|
||||||
# CONFIG_SENSORS_LM90 is not set
|
# CONFIG_SENSORS_LM90 is not set
|
||||||
# CONFIG_SENSORS_LM92 is not set
|
# CONFIG_SENSORS_LM92 is not set
|
||||||
# CONFIG_SENSORS_LM93 is not set
|
# CONFIG_SENSORS_LM93 is not set
|
||||||
|
# CONFIG_SENSORS_MAX1111 is not set
|
||||||
# CONFIG_SENSORS_MAX1619 is not set
|
# CONFIG_SENSORS_MAX1619 is not set
|
||||||
# CONFIG_SENSORS_MAX6650 is not set
|
# CONFIG_SENSORS_MAX6650 is not set
|
||||||
# CONFIG_SENSORS_PC87360 is not set
|
# CONFIG_SENSORS_PC87360 is not set
|
||||||
|
|
@ -785,6 +829,7 @@ CONFIG_HWMON=y
|
||||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||||
# CONFIG_SENSORS_SMSC47M192 is not set
|
# CONFIG_SENSORS_SMSC47M192 is not set
|
||||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||||
|
# CONFIG_SENSORS_ADS7828 is not set
|
||||||
# CONFIG_SENSORS_THMC50 is not set
|
# CONFIG_SENSORS_THMC50 is not set
|
||||||
# CONFIG_SENSORS_VT1211 is not set
|
# CONFIG_SENSORS_VT1211 is not set
|
||||||
# CONFIG_SENSORS_W83781D is not set
|
# CONFIG_SENSORS_W83781D is not set
|
||||||
|
|
@ -792,9 +837,12 @@ CONFIG_HWMON=y
|
||||||
# CONFIG_SENSORS_W83792D is not set
|
# CONFIG_SENSORS_W83792D is not set
|
||||||
# CONFIG_SENSORS_W83793 is not set
|
# CONFIG_SENSORS_W83793 is not set
|
||||||
# CONFIG_SENSORS_W83L785TS is not set
|
# CONFIG_SENSORS_W83L785TS is not set
|
||||||
|
# CONFIG_SENSORS_W83L786NG is not set
|
||||||
# CONFIG_SENSORS_W83627HF is not set
|
# CONFIG_SENSORS_W83627HF is not set
|
||||||
# CONFIG_SENSORS_W83627EHF is not set
|
# CONFIG_SENSORS_W83627EHF is not set
|
||||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||||
|
# CONFIG_THERMAL is not set
|
||||||
|
# CONFIG_THERMAL_HWMON is not set
|
||||||
CONFIG_WATCHDOG=y
|
CONFIG_WATCHDOG=y
|
||||||
# CONFIG_WATCHDOG_NOWAYOUT is not set
|
# CONFIG_WATCHDOG_NOWAYOUT is not set
|
||||||
|
|
||||||
|
|
@ -809,22 +857,32 @@ CONFIG_BFIN_WDT=y
|
||||||
#
|
#
|
||||||
# CONFIG_USBPCWATCHDOG is not set
|
# CONFIG_USBPCWATCHDOG is not set
|
||||||
|
|
||||||
#
|
|
||||||
# Sonics Silicon Backplane
|
|
||||||
#
|
|
||||||
CONFIG_SSB_POSSIBLE=y
|
|
||||||
# CONFIG_SSB is not set
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# Multifunction device drivers
|
# Multifunction device drivers
|
||||||
#
|
#
|
||||||
|
# CONFIG_MFD_CORE is not set
|
||||||
# CONFIG_MFD_SM501 is not set
|
# CONFIG_MFD_SM501 is not set
|
||||||
|
# CONFIG_HTC_PASIC3 is not set
|
||||||
|
# CONFIG_MFD_TMIO is not set
|
||||||
|
# CONFIG_PMIC_DA903X is not set
|
||||||
|
# CONFIG_MFD_WM8400 is not set
|
||||||
|
# CONFIG_MFD_WM8350_I2C is not set
|
||||||
|
# CONFIG_REGULATOR is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Multimedia devices
|
# Multimedia devices
|
||||||
#
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Multimedia core support
|
||||||
|
#
|
||||||
# CONFIG_VIDEO_DEV is not set
|
# CONFIG_VIDEO_DEV is not set
|
||||||
# CONFIG_DVB_CORE is not set
|
# CONFIG_DVB_CORE is not set
|
||||||
|
# CONFIG_VIDEO_MEDIA is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Multimedia drivers
|
||||||
|
#
|
||||||
# CONFIG_DAB is not set
|
# CONFIG_DAB is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
@ -839,10 +897,6 @@ CONFIG_SSB_POSSIBLE=y
|
||||||
# Display device support
|
# Display device support
|
||||||
#
|
#
|
||||||
# CONFIG_DISPLAY_SUPPORT is not set
|
# CONFIG_DISPLAY_SUPPORT is not set
|
||||||
|
|
||||||
#
|
|
||||||
# Sound
|
|
||||||
#
|
|
||||||
# CONFIG_SOUND is not set
|
# CONFIG_SOUND is not set
|
||||||
CONFIG_USB_SUPPORT=y
|
CONFIG_USB_SUPPORT=y
|
||||||
CONFIG_USB_ARCH_HAS_HCD=y
|
CONFIG_USB_ARCH_HAS_HCD=y
|
||||||
|
|
@ -850,6 +904,7 @@ CONFIG_USB_ARCH_HAS_HCD=y
|
||||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
# CONFIG_USB_DEBUG is not set
|
# CONFIG_USB_DEBUG is not set
|
||||||
|
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Miscellaneous USB options
|
# Miscellaneous USB options
|
||||||
|
|
@ -860,40 +915,48 @@ CONFIG_USB_DEVICE_CLASS=y
|
||||||
# CONFIG_USB_OTG is not set
|
# CONFIG_USB_OTG is not set
|
||||||
# CONFIG_USB_OTG_WHITELIST is not set
|
# CONFIG_USB_OTG_WHITELIST is not set
|
||||||
CONFIG_USB_OTG_BLACKLIST_HUB=y
|
CONFIG_USB_OTG_BLACKLIST_HUB=y
|
||||||
|
CONFIG_USB_MON=y
|
||||||
|
# CONFIG_USB_WUSB is not set
|
||||||
|
# CONFIG_USB_WUSB_CBAF is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# USB Host Controller Drivers
|
# USB Host Controller Drivers
|
||||||
#
|
#
|
||||||
|
# CONFIG_USB_C67X00_HCD is not set
|
||||||
# CONFIG_USB_ISP116X_HCD is not set
|
# CONFIG_USB_ISP116X_HCD is not set
|
||||||
# CONFIG_USB_ISP1362_HCD is not set
|
|
||||||
# CONFIG_USB_ISP1760_HCD is not set
|
# CONFIG_USB_ISP1760_HCD is not set
|
||||||
|
# CONFIG_USB_ISP1362_HCD is not set
|
||||||
# CONFIG_USB_SL811_HCD is not set
|
# CONFIG_USB_SL811_HCD is not set
|
||||||
# CONFIG_USB_R8A66597_HCD is not set
|
# CONFIG_USB_R8A66597_HCD is not set
|
||||||
|
# CONFIG_USB_HWA_HCD is not set
|
||||||
CONFIG_USB_MUSB_HDRC=y
|
CONFIG_USB_MUSB_HDRC=y
|
||||||
CONFIG_USB_MUSB_SOC=y
|
CONFIG_USB_MUSB_SOC=y
|
||||||
|
|
||||||
#
|
#
|
||||||
# Blackfin high speed USB support
|
# Blackfin high speed USB Support
|
||||||
#
|
#
|
||||||
CONFIG_USB_MUSB_HOST=y
|
CONFIG_USB_MUSB_HOST=y
|
||||||
# CONFIG_USB_MUSB_PERIPHERAL is not set
|
# CONFIG_USB_MUSB_PERIPHERAL is not set
|
||||||
# CONFIG_USB_MUSB_OTG is not set
|
# CONFIG_USB_MUSB_OTG is not set
|
||||||
CONFIG_USB_MUSB_HDRC_HCD=y
|
CONFIG_USB_MUSB_HDRC_HCD=y
|
||||||
CONFIG_MUSB_PIO_ONLY=y
|
CONFIG_MUSB_PIO_ONLY=y
|
||||||
CONFIG_USB_MUSB_LOGLEVEL=0
|
CONFIG_MUSB_DMA_POLL=y
|
||||||
|
# CONFIG_USB_MUSB_DEBUG is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# USB Device Class drivers
|
# USB Device Class drivers
|
||||||
#
|
#
|
||||||
# CONFIG_USB_ACM is not set
|
# CONFIG_USB_ACM is not set
|
||||||
# CONFIG_USB_PRINTER is not set
|
# CONFIG_USB_PRINTER is not set
|
||||||
|
# CONFIG_USB_WDM is not set
|
||||||
|
# CONFIG_USB_TMC is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
|
||||||
#
|
#
|
||||||
|
|
||||||
#
|
#
|
||||||
# may also be needed; see USB_STORAGE Help for more information
|
# see USB_STORAGE Help for more information
|
||||||
#
|
#
|
||||||
# CONFIG_USB_LIBUSUAL is not set
|
# CONFIG_USB_LIBUSUAL is not set
|
||||||
|
|
||||||
|
|
@ -901,15 +964,10 @@ CONFIG_USB_MUSB_LOGLEVEL=0
|
||||||
# USB Imaging devices
|
# USB Imaging devices
|
||||||
#
|
#
|
||||||
# CONFIG_USB_MDC800 is not set
|
# CONFIG_USB_MDC800 is not set
|
||||||
CONFIG_USB_MON=y
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# USB port drivers
|
# USB port drivers
|
||||||
#
|
#
|
||||||
|
|
||||||
#
|
|
||||||
# USB Serial Converter support
|
|
||||||
#
|
|
||||||
# CONFIG_USB_SERIAL is not set
|
# CONFIG_USB_SERIAL is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
|
|
@ -918,7 +976,7 @@ CONFIG_USB_MON=y
|
||||||
# CONFIG_USB_EMI62 is not set
|
# CONFIG_USB_EMI62 is not set
|
||||||
# CONFIG_USB_EMI26 is not set
|
# CONFIG_USB_EMI26 is not set
|
||||||
# CONFIG_USB_ADUTUX is not set
|
# CONFIG_USB_ADUTUX is not set
|
||||||
# CONFIG_USB_AUERSWALD is not set
|
# CONFIG_USB_SEVSEG is not set
|
||||||
# CONFIG_USB_RIO500 is not set
|
# CONFIG_USB_RIO500 is not set
|
||||||
# CONFIG_USB_LEGOTOWER is not set
|
# CONFIG_USB_LEGOTOWER is not set
|
||||||
# CONFIG_USB_LCD is not set
|
# CONFIG_USB_LCD is not set
|
||||||
|
|
@ -934,17 +992,13 @@ CONFIG_USB_MON=y
|
||||||
# CONFIG_USB_LD is not set
|
# CONFIG_USB_LD is not set
|
||||||
# CONFIG_USB_TRANCEVIBRATOR is not set
|
# CONFIG_USB_TRANCEVIBRATOR is not set
|
||||||
# CONFIG_USB_IOWARRIOR is not set
|
# CONFIG_USB_IOWARRIOR is not set
|
||||||
|
# CONFIG_USB_ISIGHTFW is not set
|
||||||
#
|
# CONFIG_USB_VST is not set
|
||||||
# USB DSL modem support
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# USB Gadget Support
|
|
||||||
#
|
|
||||||
# CONFIG_USB_GADGET is not set
|
# CONFIG_USB_GADGET is not set
|
||||||
# CONFIG_MMC is not set
|
# CONFIG_MMC is not set
|
||||||
|
# CONFIG_MEMSTICK is not set
|
||||||
# CONFIG_NEW_LEDS is not set
|
# CONFIG_NEW_LEDS is not set
|
||||||
|
# CONFIG_ACCESSIBILITY is not set
|
||||||
CONFIG_RTC_LIB=y
|
CONFIG_RTC_LIB=y
|
||||||
CONFIG_RTC_CLASS=y
|
CONFIG_RTC_CLASS=y
|
||||||
CONFIG_RTC_HCTOSYS=y
|
CONFIG_RTC_HCTOSYS=y
|
||||||
|
|
@ -973,51 +1027,59 @@ CONFIG_RTC_INTF_DEV=y
|
||||||
# CONFIG_RTC_DRV_PCF8563 is not set
|
# CONFIG_RTC_DRV_PCF8563 is not set
|
||||||
# CONFIG_RTC_DRV_PCF8583 is not set
|
# CONFIG_RTC_DRV_PCF8583 is not set
|
||||||
# CONFIG_RTC_DRV_M41T80 is not set
|
# CONFIG_RTC_DRV_M41T80 is not set
|
||||||
|
# CONFIG_RTC_DRV_S35390A is not set
|
||||||
|
# CONFIG_RTC_DRV_FM3130 is not set
|
||||||
|
# CONFIG_RTC_DRV_RX8581 is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# SPI RTC drivers
|
# SPI RTC drivers
|
||||||
#
|
#
|
||||||
# CONFIG_RTC_DRV_RS5C348 is not set
|
# CONFIG_RTC_DRV_M41T94 is not set
|
||||||
|
# CONFIG_RTC_DRV_DS1305 is not set
|
||||||
|
# CONFIG_RTC_DRV_DS1390 is not set
|
||||||
# CONFIG_RTC_DRV_MAX6902 is not set
|
# CONFIG_RTC_DRV_MAX6902 is not set
|
||||||
|
# CONFIG_RTC_DRV_R9701 is not set
|
||||||
|
# CONFIG_RTC_DRV_RS5C348 is not set
|
||||||
|
# CONFIG_RTC_DRV_DS3234 is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# Platform RTC drivers
|
# Platform RTC drivers
|
||||||
#
|
#
|
||||||
|
# CONFIG_RTC_DRV_DS1286 is not set
|
||||||
|
# CONFIG_RTC_DRV_DS1511 is not set
|
||||||
# CONFIG_RTC_DRV_DS1553 is not set
|
# CONFIG_RTC_DRV_DS1553 is not set
|
||||||
# CONFIG_RTC_DRV_STK17TA8 is not set
|
|
||||||
# CONFIG_RTC_DRV_DS1742 is not set
|
# CONFIG_RTC_DRV_DS1742 is not set
|
||||||
|
# CONFIG_RTC_DRV_STK17TA8 is not set
|
||||||
# CONFIG_RTC_DRV_M48T86 is not set
|
# CONFIG_RTC_DRV_M48T86 is not set
|
||||||
|
# CONFIG_RTC_DRV_M48T35 is not set
|
||||||
# CONFIG_RTC_DRV_M48T59 is not set
|
# CONFIG_RTC_DRV_M48T59 is not set
|
||||||
|
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||||
# CONFIG_RTC_DRV_V3020 is not set
|
# CONFIG_RTC_DRV_V3020 is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# on-CPU RTC drivers
|
# on-CPU RTC drivers
|
||||||
#
|
#
|
||||||
CONFIG_RTC_DRV_BFIN=y
|
CONFIG_RTC_DRV_BFIN=y
|
||||||
|
# CONFIG_DMADEVICES is not set
|
||||||
#
|
|
||||||
# Userspace I/O
|
|
||||||
#
|
|
||||||
# CONFIG_UIO is not set
|
# CONFIG_UIO is not set
|
||||||
|
# CONFIG_STAGING is not set
|
||||||
|
|
||||||
#
|
#
|
||||||
# File systems
|
# File systems
|
||||||
#
|
#
|
||||||
# CONFIG_EXT2_FS is not set
|
# CONFIG_EXT2_FS is not set
|
||||||
# CONFIG_EXT3_FS is not set
|
# CONFIG_EXT3_FS is not set
|
||||||
# CONFIG_EXT4DEV_FS is not set
|
# CONFIG_EXT4_FS is not set
|
||||||
# CONFIG_REISERFS_FS is not set
|
# CONFIG_REISERFS_FS is not set
|
||||||
# CONFIG_JFS_FS is not set
|
# CONFIG_JFS_FS is not set
|
||||||
# CONFIG_FS_POSIX_ACL is not set
|
# CONFIG_FS_POSIX_ACL is not set
|
||||||
|
CONFIG_FILE_LOCKING=y
|
||||||
# CONFIG_XFS_FS is not set
|
# CONFIG_XFS_FS is not set
|
||||||
# CONFIG_GFS2_FS is not set
|
|
||||||
# CONFIG_OCFS2_FS is not set
|
# CONFIG_OCFS2_FS is not set
|
||||||
# CONFIG_MINIX_FS is not set
|
# CONFIG_DNOTIFY is not set
|
||||||
# CONFIG_ROMFS_FS is not set
|
|
||||||
CONFIG_INOTIFY=y
|
CONFIG_INOTIFY=y
|
||||||
CONFIG_INOTIFY_USER=y
|
CONFIG_INOTIFY_USER=y
|
||||||
# CONFIG_QUOTA is not set
|
# CONFIG_QUOTA is not set
|
||||||
# CONFIG_DNOTIFY is not set
|
|
||||||
# CONFIG_AUTOFS_FS is not set
|
# CONFIG_AUTOFS_FS is not set
|
||||||
# CONFIG_AUTOFS4_FS is not set
|
# CONFIG_AUTOFS4_FS is not set
|
||||||
# CONFIG_FUSE_FS is not set
|
# CONFIG_FUSE_FS is not set
|
||||||
|
|
@ -1059,8 +1121,11 @@ CONFIG_SYSFS=y
|
||||||
# CONFIG_JFFS2_FS is not set
|
# CONFIG_JFFS2_FS is not set
|
||||||
# CONFIG_CRAMFS is not set
|
# CONFIG_CRAMFS is not set
|
||||||
# CONFIG_VXFS_FS is not set
|
# CONFIG_VXFS_FS is not set
|
||||||
|
# CONFIG_MINIX_FS is not set
|
||||||
|
# CONFIG_OMFS_FS is not set
|
||||||
# CONFIG_HPFS_FS is not set
|
# CONFIG_HPFS_FS is not set
|
||||||
# CONFIG_QNX4FS_FS is not set
|
# CONFIG_QNX4FS_FS is not set
|
||||||
|
# CONFIG_ROMFS_FS is not set
|
||||||
# CONFIG_SYSV_FS is not set
|
# CONFIG_SYSV_FS is not set
|
||||||
# CONFIG_UFS_FS is not set
|
# CONFIG_UFS_FS is not set
|
||||||
CONFIG_NETWORK_FILESYSTEMS=y
|
CONFIG_NETWORK_FILESYSTEMS=y
|
||||||
|
|
@ -1068,13 +1133,12 @@ CONFIG_NFS_FS=m
|
||||||
CONFIG_NFS_V3=y
|
CONFIG_NFS_V3=y
|
||||||
# CONFIG_NFS_V3_ACL is not set
|
# CONFIG_NFS_V3_ACL is not set
|
||||||
# CONFIG_NFS_V4 is not set
|
# CONFIG_NFS_V4 is not set
|
||||||
# CONFIG_NFS_DIRECTIO is not set
|
|
||||||
# CONFIG_NFSD is not set
|
# CONFIG_NFSD is not set
|
||||||
CONFIG_LOCKD=m
|
CONFIG_LOCKD=m
|
||||||
CONFIG_LOCKD_V4=y
|
CONFIG_LOCKD_V4=y
|
||||||
CONFIG_NFS_COMMON=y
|
CONFIG_NFS_COMMON=y
|
||||||
CONFIG_SUNRPC=m
|
CONFIG_SUNRPC=m
|
||||||
# CONFIG_SUNRPC_BIND34 is not set
|
# CONFIG_SUNRPC_REGISTER_V4 is not set
|
||||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||||
CONFIG_SMB_FS=m
|
CONFIG_SMB_FS=m
|
||||||
|
|
@ -1130,7 +1194,6 @@ CONFIG_NLS_DEFAULT="iso8859-1"
|
||||||
# CONFIG_NLS_KOI8_U is not set
|
# CONFIG_NLS_KOI8_U is not set
|
||||||
# CONFIG_NLS_UTF8 is not set
|
# CONFIG_NLS_UTF8 is not set
|
||||||
# CONFIG_DLM is not set
|
# CONFIG_DLM is not set
|
||||||
# CONFIG_INSTRUMENTATION is not set
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# Kernel hacking
|
# Kernel hacking
|
||||||
|
|
@ -1138,14 +1201,61 @@ CONFIG_NLS_DEFAULT="iso8859-1"
|
||||||
# CONFIG_PRINTK_TIME is not set
|
# CONFIG_PRINTK_TIME is not set
|
||||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||||
CONFIG_ENABLE_MUST_CHECK=y
|
CONFIG_ENABLE_MUST_CHECK=y
|
||||||
|
CONFIG_FRAME_WARN=1024
|
||||||
# CONFIG_MAGIC_SYSRQ is not set
|
# CONFIG_MAGIC_SYSRQ is not set
|
||||||
# CONFIG_UNUSED_SYMBOLS is not set
|
# CONFIG_UNUSED_SYMBOLS is not set
|
||||||
CONFIG_DEBUG_FS=y
|
CONFIG_DEBUG_FS=y
|
||||||
# CONFIG_HEADERS_CHECK is not set
|
# CONFIG_HEADERS_CHECK is not set
|
||||||
# CONFIG_DEBUG_KERNEL is not set
|
CONFIG_DEBUG_KERNEL=y
|
||||||
|
# CONFIG_DEBUG_SHIRQ is not set
|
||||||
|
CONFIG_DETECT_SOFTLOCKUP=y
|
||||||
|
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||||
|
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||||
|
# CONFIG_SCHED_DEBUG is not set
|
||||||
|
# CONFIG_SCHEDSTATS is not set
|
||||||
|
# CONFIG_TIMER_STATS is not set
|
||||||
|
# CONFIG_DEBUG_OBJECTS is not set
|
||||||
|
# CONFIG_DEBUG_SLAB is not set
|
||||||
|
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||||
|
# CONFIG_RT_MUTEX_TESTER is not set
|
||||||
|
# CONFIG_DEBUG_SPINLOCK is not set
|
||||||
|
# CONFIG_DEBUG_MUTEXES is not set
|
||||||
|
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||||
|
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||||
|
# CONFIG_DEBUG_KOBJECT is not set
|
||||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||||
|
# CONFIG_DEBUG_INFO is not set
|
||||||
|
# CONFIG_DEBUG_VM is not set
|
||||||
|
# CONFIG_DEBUG_WRITECOUNT is not set
|
||||||
|
# CONFIG_DEBUG_MEMORY_INIT is not set
|
||||||
|
# CONFIG_DEBUG_LIST is not set
|
||||||
|
# CONFIG_DEBUG_SG is not set
|
||||||
|
# CONFIG_FRAME_POINTER is not set
|
||||||
|
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||||
|
# CONFIG_RCU_TORTURE_TEST is not set
|
||||||
|
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||||
|
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||||
|
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
||||||
|
# CONFIG_FAULT_INJECTION is not set
|
||||||
|
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Tracers
|
||||||
|
#
|
||||||
|
# CONFIG_SCHED_TRACER is not set
|
||||||
|
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||||
|
# CONFIG_BOOT_TRACER is not set
|
||||||
|
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
||||||
# CONFIG_SAMPLES is not set
|
# CONFIG_SAMPLES is not set
|
||||||
|
CONFIG_HAVE_ARCH_KGDB=y
|
||||||
|
# CONFIG_KGDB is not set
|
||||||
|
# CONFIG_DEBUG_STACKOVERFLOW is not set
|
||||||
|
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||||
|
# CONFIG_KGDB_TESTCASE is not set
|
||||||
|
CONFIG_DEBUG_VERBOSE=y
|
||||||
CONFIG_DEBUG_MMRS=y
|
CONFIG_DEBUG_MMRS=y
|
||||||
|
# CONFIG_DEBUG_HWERR is not set
|
||||||
|
# CONFIG_DEBUG_DOUBLEFAULT is not set
|
||||||
CONFIG_DEBUG_HUNT_FOR_ZERO=y
|
CONFIG_DEBUG_HUNT_FOR_ZERO=y
|
||||||
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
|
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
|
||||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
|
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
|
||||||
|
|
@ -1154,7 +1264,7 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
|
||||||
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
|
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
|
||||||
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
|
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
|
||||||
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
|
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
|
||||||
CONFIG_EARLY_PRINTK=y
|
# CONFIG_EARLY_PRINTK is not set
|
||||||
# CONFIG_CPLB_INFO is not set
|
# CONFIG_CPLB_INFO is not set
|
||||||
CONFIG_ACCESS_CHECK=y
|
CONFIG_ACCESS_CHECK=y
|
||||||
|
|
||||||
|
|
@ -1163,10 +1273,96 @@ CONFIG_ACCESS_CHECK=y
|
||||||
#
|
#
|
||||||
# CONFIG_KEYS is not set
|
# CONFIG_KEYS is not set
|
||||||
CONFIG_SECURITY=y
|
CONFIG_SECURITY=y
|
||||||
|
# CONFIG_SECURITYFS is not set
|
||||||
# CONFIG_SECURITY_NETWORK is not set
|
# CONFIG_SECURITY_NETWORK is not set
|
||||||
# CONFIG_SECURITY_CAPABILITIES is not set
|
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||||
# CONFIG_SECURITY_ROOTPLUG is not set
|
# CONFIG_SECURITY_ROOTPLUG is not set
|
||||||
# CONFIG_CRYPTO is not set
|
CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
|
||||||
|
CONFIG_CRYPTO=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Crypto core or helper
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_FIPS is not set
|
||||||
|
# CONFIG_CRYPTO_MANAGER is not set
|
||||||
|
# CONFIG_CRYPTO_MANAGER2 is not set
|
||||||
|
# CONFIG_CRYPTO_GF128MUL is not set
|
||||||
|
# CONFIG_CRYPTO_NULL is not set
|
||||||
|
# CONFIG_CRYPTO_CRYPTD is not set
|
||||||
|
# CONFIG_CRYPTO_AUTHENC is not set
|
||||||
|
# CONFIG_CRYPTO_TEST is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Authenticated Encryption with Associated Data
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_CCM is not set
|
||||||
|
# CONFIG_CRYPTO_GCM is not set
|
||||||
|
# CONFIG_CRYPTO_SEQIV is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Block modes
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_CBC is not set
|
||||||
|
# CONFIG_CRYPTO_CTR is not set
|
||||||
|
# CONFIG_CRYPTO_CTS is not set
|
||||||
|
# CONFIG_CRYPTO_ECB is not set
|
||||||
|
# CONFIG_CRYPTO_LRW is not set
|
||||||
|
# CONFIG_CRYPTO_PCBC is not set
|
||||||
|
# CONFIG_CRYPTO_XTS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Hash modes
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_HMAC is not set
|
||||||
|
# CONFIG_CRYPTO_XCBC is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Digest
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_CRC32C is not set
|
||||||
|
# CONFIG_CRYPTO_MD4 is not set
|
||||||
|
# CONFIG_CRYPTO_MD5 is not set
|
||||||
|
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||||
|
# CONFIG_CRYPTO_RMD128 is not set
|
||||||
|
# CONFIG_CRYPTO_RMD160 is not set
|
||||||
|
# CONFIG_CRYPTO_RMD256 is not set
|
||||||
|
# CONFIG_CRYPTO_RMD320 is not set
|
||||||
|
# CONFIG_CRYPTO_SHA1 is not set
|
||||||
|
# CONFIG_CRYPTO_SHA256 is not set
|
||||||
|
# CONFIG_CRYPTO_SHA512 is not set
|
||||||
|
# CONFIG_CRYPTO_TGR192 is not set
|
||||||
|
# CONFIG_CRYPTO_WP512 is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Ciphers
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_AES is not set
|
||||||
|
# CONFIG_CRYPTO_ANUBIS is not set
|
||||||
|
# CONFIG_CRYPTO_ARC4 is not set
|
||||||
|
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||||
|
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||||
|
# CONFIG_CRYPTO_CAST5 is not set
|
||||||
|
# CONFIG_CRYPTO_CAST6 is not set
|
||||||
|
# CONFIG_CRYPTO_DES is not set
|
||||||
|
# CONFIG_CRYPTO_FCRYPT is not set
|
||||||
|
# CONFIG_CRYPTO_KHAZAD is not set
|
||||||
|
# CONFIG_CRYPTO_SALSA20 is not set
|
||||||
|
# CONFIG_CRYPTO_SEED is not set
|
||||||
|
# CONFIG_CRYPTO_SERPENT is not set
|
||||||
|
# CONFIG_CRYPTO_TEA is not set
|
||||||
|
# CONFIG_CRYPTO_TWOFISH is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Compression
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_DEFLATE is not set
|
||||||
|
# CONFIG_CRYPTO_LZO is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Random Number Generation
|
||||||
|
#
|
||||||
|
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||||
|
CONFIG_CRYPTO_HW=y
|
||||||
|
|
||||||
#
|
#
|
||||||
# Library routines
|
# Library routines
|
||||||
|
|
@ -1174,6 +1370,7 @@ CONFIG_SECURITY=y
|
||||||
CONFIG_BITREVERSE=y
|
CONFIG_BITREVERSE=y
|
||||||
CONFIG_CRC_CCITT=m
|
CONFIG_CRC_CCITT=m
|
||||||
# CONFIG_CRC16 is not set
|
# CONFIG_CRC16 is not set
|
||||||
|
# CONFIG_CRC_T10DIF is not set
|
||||||
# CONFIG_CRC_ITU_T is not set
|
# CONFIG_CRC_ITU_T is not set
|
||||||
CONFIG_CRC32=y
|
CONFIG_CRC32=y
|
||||||
# CONFIG_CRC7 is not set
|
# CONFIG_CRC7 is not set
|
||||||
|
|
|
||||||
|
|
@ -63,23 +63,23 @@ static inline __wsum
|
||||||
csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
|
csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
|
||||||
unsigned short proto, __wsum sum)
|
unsigned short proto, __wsum sum)
|
||||||
{
|
{
|
||||||
|
unsigned int carry;
|
||||||
|
|
||||||
__asm__ ("%0 = %0 + %1;\n\t"
|
__asm__ ("%0 = %0 + %2;\n\t"
|
||||||
"CC = AC0;\n\t"
|
"CC = AC0;\n\t"
|
||||||
"if !CC jump 4;\n\t"
|
"%1 = CC;\n\t"
|
||||||
"%0 = %0 + %4;\n\t"
|
"%0 = %0 + %1;\n\t"
|
||||||
"%0 = %0 + %2;\n\t"
|
"%0 = %0 + %3;\n\t"
|
||||||
"CC = AC0;\n\t"
|
"CC = AC0;\n\t"
|
||||||
"if !CC jump 4;\n\t"
|
"%1 = CC;\n\t"
|
||||||
"%0 = %0 + %4;\n\t"
|
"%0 = %0 + %1;\n\t"
|
||||||
"%0 = %0 + %3;\n\t"
|
"%0 = %0 + %4;\n\t"
|
||||||
"CC = AC0;\n\t"
|
"CC = AC0;\n\t"
|
||||||
"if !CC jump 4;\n\t"
|
"%1 = CC;\n\t"
|
||||||
"%0 = %0 + %4;\n\t"
|
"%0 = %0 + %1;\n\t"
|
||||||
"NOP;\n\t"
|
: "=d" (sum), "=&d" (carry)
|
||||||
: "=d" (sum)
|
: "d" (daddr), "d" (saddr), "d" ((len + proto) << 8), "0"(sum)
|
||||||
: "d" (daddr), "d" (saddr), "d" ((ntohs(len)<<16)+proto*256), "d" (1), "0"(sum)
|
: "CC");
|
||||||
: "CC");
|
|
||||||
|
|
||||||
return (sum);
|
return (sum);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -13,29 +13,7 @@
|
||||||
|
|
||||||
static inline void __delay(unsigned long loops)
|
static inline void __delay(unsigned long loops)
|
||||||
{
|
{
|
||||||
if (ANOMALY_05000312) {
|
__asm__ __volatile__ (
|
||||||
/* Interrupted loads to loop registers -> bad */
|
|
||||||
unsigned long tmp;
|
|
||||||
__asm__ __volatile__(
|
|
||||||
"[--SP] = LC0;"
|
|
||||||
"[--SP] = LT0;"
|
|
||||||
"[--SP] = LB0;"
|
|
||||||
"LSETUP (1f,1f) LC0 = %1;"
|
|
||||||
"1: NOP;"
|
|
||||||
/* We take advantage of the fact that LC0 is 0 at
|
|
||||||
* the end of the loop. Otherwise we'd need some
|
|
||||||
* NOPs after the CLI here.
|
|
||||||
*/
|
|
||||||
"CLI %0;"
|
|
||||||
"LB0 = [SP++];"
|
|
||||||
"LT0 = [SP++];"
|
|
||||||
"LC0 = [SP++];"
|
|
||||||
"STI %0;"
|
|
||||||
: "=d" (tmp)
|
|
||||||
: "a" (loops)
|
|
||||||
);
|
|
||||||
} else
|
|
||||||
__asm__ __volatile__ (
|
|
||||||
"LSETUP(1f, 1f) LC0 = %0;"
|
"LSETUP(1f, 1f) LC0 = %0;"
|
||||||
"1: NOP;"
|
"1: NOP;"
|
||||||
:
|
:
|
||||||
|
|
@ -47,16 +25,15 @@ static inline void __delay(unsigned long loops)
|
||||||
#include <linux/param.h> /* needed for HZ */
|
#include <linux/param.h> /* needed for HZ */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Use only for very small delays ( < 1 msec). Should probably use a
|
* close approximation borrowed from m68knommu to avoid 64-bit math
|
||||||
* lookup table, really, as the multiplications take much too long with
|
|
||||||
* short delays. This is a "reasonable" implementation, though (and the
|
|
||||||
* first constant multiplications gets optimized away if the delay is
|
|
||||||
* a constant)
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#define HZSCALE (268435456 / (1000000/HZ))
|
||||||
|
|
||||||
static inline void udelay(unsigned long usecs)
|
static inline void udelay(unsigned long usecs)
|
||||||
{
|
{
|
||||||
extern unsigned long loops_per_jiffy;
|
extern unsigned long loops_per_jiffy;
|
||||||
__delay(usecs * loops_per_jiffy / (1000000 / HZ));
|
__delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6);
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -27,60 +27,6 @@
|
||||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
|
||||||
* Number BF537/6/4 BF561 BF533/2/1
|
|
||||||
* BF527/5/2
|
|
||||||
*
|
|
||||||
* GPIO_0 PF0 PF0 PF0
|
|
||||||
* GPIO_1 PF1 PF1 PF1
|
|
||||||
* GPIO_2 PF2 PF2 PF2
|
|
||||||
* GPIO_3 PF3 PF3 PF3
|
|
||||||
* GPIO_4 PF4 PF4 PF4
|
|
||||||
* GPIO_5 PF5 PF5 PF5
|
|
||||||
* GPIO_6 PF6 PF6 PF6
|
|
||||||
* GPIO_7 PF7 PF7 PF7
|
|
||||||
* GPIO_8 PF8 PF8 PF8
|
|
||||||
* GPIO_9 PF9 PF9 PF9
|
|
||||||
* GPIO_10 PF10 PF10 PF10
|
|
||||||
* GPIO_11 PF11 PF11 PF11
|
|
||||||
* GPIO_12 PF12 PF12 PF12
|
|
||||||
* GPIO_13 PF13 PF13 PF13
|
|
||||||
* GPIO_14 PF14 PF14 PF14
|
|
||||||
* GPIO_15 PF15 PF15 PF15
|
|
||||||
* GPIO_16 PG0 PF16
|
|
||||||
* GPIO_17 PG1 PF17
|
|
||||||
* GPIO_18 PG2 PF18
|
|
||||||
* GPIO_19 PG3 PF19
|
|
||||||
* GPIO_20 PG4 PF20
|
|
||||||
* GPIO_21 PG5 PF21
|
|
||||||
* GPIO_22 PG6 PF22
|
|
||||||
* GPIO_23 PG7 PF23
|
|
||||||
* GPIO_24 PG8 PF24
|
|
||||||
* GPIO_25 PG9 PF25
|
|
||||||
* GPIO_26 PG10 PF26
|
|
||||||
* GPIO_27 PG11 PF27
|
|
||||||
* GPIO_28 PG12 PF28
|
|
||||||
* GPIO_29 PG13 PF29
|
|
||||||
* GPIO_30 PG14 PF30
|
|
||||||
* GPIO_31 PG15 PF31
|
|
||||||
* GPIO_32 PH0 PF32
|
|
||||||
* GPIO_33 PH1 PF33
|
|
||||||
* GPIO_34 PH2 PF34
|
|
||||||
* GPIO_35 PH3 PF35
|
|
||||||
* GPIO_36 PH4 PF36
|
|
||||||
* GPIO_37 PH5 PF37
|
|
||||||
* GPIO_38 PH6 PF38
|
|
||||||
* GPIO_39 PH7 PF39
|
|
||||||
* GPIO_40 PH8 PF40
|
|
||||||
* GPIO_41 PH9 PF41
|
|
||||||
* GPIO_42 PH10 PF42
|
|
||||||
* GPIO_43 PH11 PF43
|
|
||||||
* GPIO_44 PH12 PF44
|
|
||||||
* GPIO_45 PH13 PF45
|
|
||||||
* GPIO_46 PH14 PF46
|
|
||||||
* GPIO_47 PH15 PF47
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __ARCH_BLACKFIN_GPIO_H__
|
#ifndef __ARCH_BLACKFIN_GPIO_H__
|
||||||
#define __ARCH_BLACKFIN_GPIO_H__
|
#define __ARCH_BLACKFIN_GPIO_H__
|
||||||
|
|
||||||
|
|
@ -295,10 +241,6 @@ int bfin_gpio_direction_output(unsigned gpio, int value);
|
||||||
int bfin_gpio_get_value(unsigned gpio);
|
int bfin_gpio_get_value(unsigned gpio);
|
||||||
void bfin_gpio_set_value(unsigned gpio, int value);
|
void bfin_gpio_set_value(unsigned gpio, int value);
|
||||||
|
|
||||||
#ifndef BF548_FAMILY
|
|
||||||
#define bfin_gpio_set_value(gpio, value) set_gpio_data(gpio, value)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_GPIOLIB
|
#ifdef CONFIG_GPIOLIB
|
||||||
#include <asm-generic/gpio.h> /* cansleep wrappers */
|
#include <asm-generic/gpio.h> /* cansleep wrappers */
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,32 +1,8 @@
|
||||||
/*
|
/* Blackfin KGDB header
|
||||||
* File: include/asm-blackfin/kgdb.h
|
|
||||||
* Based on:
|
|
||||||
* Author: Sonic Zhang
|
|
||||||
*
|
*
|
||||||
* Created:
|
* Copyright 2005-2009 Analog Devices Inc.
|
||||||
* Description:
|
|
||||||
*
|
*
|
||||||
* Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
|
* Licensed under the GPL-2 or later.
|
||||||
*
|
|
||||||
* Modified:
|
|
||||||
* Copyright 2005-2006 Analog Devices Inc.
|
|
||||||
*
|
|
||||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, see the file COPYING, or write
|
|
||||||
* to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __ASM_BLACKFIN_KGDB_H__
|
#ifndef __ASM_BLACKFIN_KGDB_H__
|
||||||
|
|
@ -37,17 +13,18 @@
|
||||||
/* gdb locks */
|
/* gdb locks */
|
||||||
#define KGDB_MAX_NO_CPUS 8
|
#define KGDB_MAX_NO_CPUS 8
|
||||||
|
|
||||||
/************************************************************************/
|
/*
|
||||||
/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
|
* BUFMAX defines the maximum number of characters in inbound/outbound buffers.
|
||||||
/* at least NUMREGBYTES*2 are needed for register packets */
|
* At least NUMREGBYTES*2 are needed for register packets.
|
||||||
/* Longer buffer is needed to list all threads */
|
* Longer buffer is needed to list all threads.
|
||||||
|
*/
|
||||||
#define BUFMAX 2048
|
#define BUFMAX 2048
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Note that this register image is different from
|
* Note that this register image is different from
|
||||||
* the register image that Linux produces at interrupt time.
|
* the register image that Linux produces at interrupt time.
|
||||||
*
|
*
|
||||||
* Linux's register image is defined by struct pt_regs in ptrace.h.
|
* Linux's register image is defined by struct pt_regs in ptrace.h.
|
||||||
*/
|
*/
|
||||||
enum regnames {
|
enum regnames {
|
||||||
/* Core Registers */
|
/* Core Registers */
|
||||||
|
|
@ -104,14 +81,14 @@ enum regnames {
|
||||||
BFIN_RETX,
|
BFIN_RETX,
|
||||||
BFIN_RETN,
|
BFIN_RETN,
|
||||||
BFIN_RETE,
|
BFIN_RETE,
|
||||||
|
|
||||||
/* Pseudo Registers */
|
/* Pseudo Registers */
|
||||||
BFIN_PC,
|
BFIN_PC,
|
||||||
BFIN_CC,
|
BFIN_CC,
|
||||||
BFIN_EXTRA1, /* Address of .text section. */
|
BFIN_EXTRA1, /* Address of .text section. */
|
||||||
BFIN_EXTRA2, /* Address of .data section. */
|
BFIN_EXTRA2, /* Address of .data section. */
|
||||||
BFIN_EXTRA3, /* Address of .bss section. */
|
BFIN_EXTRA3, /* Address of .bss section. */
|
||||||
BFIN_FDPIC_EXEC,
|
BFIN_FDPIC_EXEC,
|
||||||
BFIN_FDPIC_INTERP,
|
BFIN_FDPIC_INTERP,
|
||||||
|
|
||||||
/* MMRs */
|
/* MMRs */
|
||||||
|
|
@ -126,7 +103,7 @@ enum regnames {
|
||||||
|
|
||||||
static inline void arch_kgdb_breakpoint(void)
|
static inline void arch_kgdb_breakpoint(void)
|
||||||
{
|
{
|
||||||
asm(" EXCPT 2;");
|
asm("EXCPT 2;");
|
||||||
}
|
}
|
||||||
#define BREAK_INSTR_SIZE 2
|
#define BREAK_INSTR_SIZE 2
|
||||||
#define CACHE_FLUSH_IS_SAFE 1
|
#define CACHE_FLUSH_IS_SAFE 1
|
||||||
|
|
|
||||||
|
|
@ -115,7 +115,7 @@
|
||||||
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
|
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
|
||||||
|
|
||||||
/* Enable SCLK Out */
|
/* Enable SCLK Out */
|
||||||
#define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
|
#define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
|
||||||
#else
|
#else
|
||||||
#define mem_SDRRC CONFIG_MEM_SDRRC
|
#define mem_SDRRC CONFIG_MEM_SDRRC
|
||||||
#define mem_SDGCTL CONFIG_MEM_SDGCTL
|
#define mem_SDGCTL CONFIG_MEM_SDGCTL
|
||||||
|
|
|
||||||
|
|
@ -59,6 +59,7 @@ struct blackfin_pda { /* Per-processor Data Area */
|
||||||
unsigned long icplb_fault_addr;
|
unsigned long icplb_fault_addr;
|
||||||
unsigned long retx;
|
unsigned long retx;
|
||||||
unsigned long seqstat;
|
unsigned long seqstat;
|
||||||
|
unsigned int __nmi_count; /* number of times NMI asserted on this CPU */
|
||||||
};
|
};
|
||||||
|
|
||||||
extern struct blackfin_pda cpu_pda[];
|
extern struct blackfin_pda cpu_pda[];
|
||||||
|
|
|
||||||
|
|
@ -15,6 +15,6 @@ extern void native_machine_halt(void);
|
||||||
extern void native_machine_power_off(void);
|
extern void native_machine_power_off(void);
|
||||||
|
|
||||||
/* common reboot workarounds */
|
/* common reboot workarounds */
|
||||||
extern void bfin_gpio_reset_spi0_ssel1(void);
|
extern void bfin_reset_boot_spi_cs(unsigned short pin);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -15,6 +15,8 @@ else
|
||||||
obj-y += time.o
|
obj-y += time.o
|
||||||
endif
|
endif
|
||||||
|
|
||||||
|
CFLAGS_kgdb_test.o := -mlong-calls -O0
|
||||||
|
|
||||||
obj-$(CONFIG_IPIPE) += ipipe.o
|
obj-$(CONFIG_IPIPE) += ipipe.o
|
||||||
obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
|
obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
|
||||||
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
|
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
|
||||||
|
|
|
||||||
|
|
@ -249,6 +249,13 @@ static void __dma_memcpy(u32 daddr, s16 dmod, u32 saddr, s16 smod, size_t cnt, u
|
||||||
|
|
||||||
spin_lock_irqsave(&mdma_lock, flags);
|
spin_lock_irqsave(&mdma_lock, flags);
|
||||||
|
|
||||||
|
/* Force a sync in case a previous config reset on this channel
|
||||||
|
* occurred. This is needed so subsequent writes to DMA registers
|
||||||
|
* are not spuriously lost/corrupted. Do it under irq lock and
|
||||||
|
* without the anomaly version (because we are atomic already).
|
||||||
|
*/
|
||||||
|
__builtin_bfin_ssync();
|
||||||
|
|
||||||
if (bfin_read_MDMA_S0_CONFIG())
|
if (bfin_read_MDMA_S0_CONFIG())
|
||||||
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
|
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
|
||||||
continue;
|
continue;
|
||||||
|
|
|
||||||
|
|
@ -27,59 +27,6 @@
|
||||||
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
|
||||||
* Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
|
|
||||||
*
|
|
||||||
* GPIO_0 PF0 PF0 PF0 PA0...PJ13
|
|
||||||
* GPIO_1 PF1 PF1 PF1
|
|
||||||
* GPIO_2 PF2 PF2 PF2
|
|
||||||
* GPIO_3 PF3 PF3 PF3
|
|
||||||
* GPIO_4 PF4 PF4 PF4
|
|
||||||
* GPIO_5 PF5 PF5 PF5
|
|
||||||
* GPIO_6 PF6 PF6 PF6
|
|
||||||
* GPIO_7 PF7 PF7 PF7
|
|
||||||
* GPIO_8 PF8 PF8 PF8
|
|
||||||
* GPIO_9 PF9 PF9 PF9
|
|
||||||
* GPIO_10 PF10 PF10 PF10
|
|
||||||
* GPIO_11 PF11 PF11 PF11
|
|
||||||
* GPIO_12 PF12 PF12 PF12
|
|
||||||
* GPIO_13 PF13 PF13 PF13
|
|
||||||
* GPIO_14 PF14 PF14 PF14
|
|
||||||
* GPIO_15 PF15 PF15 PF15
|
|
||||||
* GPIO_16 PG0 PF16
|
|
||||||
* GPIO_17 PG1 PF17
|
|
||||||
* GPIO_18 PG2 PF18
|
|
||||||
* GPIO_19 PG3 PF19
|
|
||||||
* GPIO_20 PG4 PF20
|
|
||||||
* GPIO_21 PG5 PF21
|
|
||||||
* GPIO_22 PG6 PF22
|
|
||||||
* GPIO_23 PG7 PF23
|
|
||||||
* GPIO_24 PG8 PF24
|
|
||||||
* GPIO_25 PG9 PF25
|
|
||||||
* GPIO_26 PG10 PF26
|
|
||||||
* GPIO_27 PG11 PF27
|
|
||||||
* GPIO_28 PG12 PF28
|
|
||||||
* GPIO_29 PG13 PF29
|
|
||||||
* GPIO_30 PG14 PF30
|
|
||||||
* GPIO_31 PG15 PF31
|
|
||||||
* GPIO_32 PH0 PF32
|
|
||||||
* GPIO_33 PH1 PF33
|
|
||||||
* GPIO_34 PH2 PF34
|
|
||||||
* GPIO_35 PH3 PF35
|
|
||||||
* GPIO_36 PH4 PF36
|
|
||||||
* GPIO_37 PH5 PF37
|
|
||||||
* GPIO_38 PH6 PF38
|
|
||||||
* GPIO_39 PH7 PF39
|
|
||||||
* GPIO_40 PH8 PF40
|
|
||||||
* GPIO_41 PH9 PF41
|
|
||||||
* GPIO_42 PH10 PF42
|
|
||||||
* GPIO_43 PH11 PF43
|
|
||||||
* GPIO_44 PH12 PF44
|
|
||||||
* GPIO_45 PH13 PF45
|
|
||||||
* GPIO_46 PH14 PF46
|
|
||||||
* GPIO_47 PH15 PF47
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/err.h>
|
#include <linux/err.h>
|
||||||
|
|
@ -119,51 +66,18 @@ enum {
|
||||||
#define AWA_DUMMY_READ(...) do { } while (0)
|
#define AWA_DUMMY_READ(...) do { } while (0)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
static struct gpio_port_t * const gpio_array[] = {
|
||||||
#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
|
#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
|
||||||
static struct gpio_port_t *gpio_bankb[] = {
|
|
||||||
(struct gpio_port_t *) FIO_FLAG_D,
|
(struct gpio_port_t *) FIO_FLAG_D,
|
||||||
};
|
#elif defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
|
||||||
static struct gpio_port_t *gpio_bankb[] = {
|
|
||||||
(struct gpio_port_t *) PORTFIO,
|
(struct gpio_port_t *) PORTFIO,
|
||||||
(struct gpio_port_t *) PORTGIO,
|
(struct gpio_port_t *) PORTGIO,
|
||||||
(struct gpio_port_t *) PORTHIO,
|
(struct gpio_port_t *) PORTHIO,
|
||||||
};
|
#elif defined(BF561_FAMILY)
|
||||||
|
|
||||||
static unsigned short *port_fer[] = {
|
|
||||||
(unsigned short *) PORTF_FER,
|
|
||||||
(unsigned short *) PORTG_FER,
|
|
||||||
(unsigned short *) PORTH_FER,
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
|
||||||
static unsigned short *port_mux[] = {
|
|
||||||
(unsigned short *) PORTF_MUX,
|
|
||||||
(unsigned short *) PORTG_MUX,
|
|
||||||
(unsigned short *) PORTH_MUX,
|
|
||||||
};
|
|
||||||
|
|
||||||
static const
|
|
||||||
u8 pmux_offset[][16] =
|
|
||||||
{{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
|
|
||||||
{ 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
|
|
||||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef BF561_FAMILY
|
|
||||||
static struct gpio_port_t *gpio_bankb[] = {
|
|
||||||
(struct gpio_port_t *) FIO0_FLAG_D,
|
(struct gpio_port_t *) FIO0_FLAG_D,
|
||||||
(struct gpio_port_t *) FIO1_FLAG_D,
|
(struct gpio_port_t *) FIO1_FLAG_D,
|
||||||
(struct gpio_port_t *) FIO2_FLAG_D,
|
(struct gpio_port_t *) FIO2_FLAG_D,
|
||||||
};
|
#elif defined(BF548_FAMILY)
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef BF548_FAMILY
|
|
||||||
static struct gpio_port_t *gpio_array[] = {
|
|
||||||
(struct gpio_port_t *)PORTA_FER,
|
(struct gpio_port_t *)PORTA_FER,
|
||||||
(struct gpio_port_t *)PORTB_FER,
|
(struct gpio_port_t *)PORTB_FER,
|
||||||
(struct gpio_port_t *)PORTC_FER,
|
(struct gpio_port_t *)PORTC_FER,
|
||||||
|
|
@ -174,7 +88,39 @@ static struct gpio_port_t *gpio_array[] = {
|
||||||
(struct gpio_port_t *)PORTH_FER,
|
(struct gpio_port_t *)PORTH_FER,
|
||||||
(struct gpio_port_t *)PORTI_FER,
|
(struct gpio_port_t *)PORTI_FER,
|
||||||
(struct gpio_port_t *)PORTJ_FER,
|
(struct gpio_port_t *)PORTJ_FER,
|
||||||
|
#else
|
||||||
|
# error no gpio arrays defined
|
||||||
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
||||||
|
static unsigned short * const port_fer[] = {
|
||||||
|
(unsigned short *) PORTF_FER,
|
||||||
|
(unsigned short *) PORTG_FER,
|
||||||
|
(unsigned short *) PORTH_FER,
|
||||||
|
};
|
||||||
|
|
||||||
|
# if !defined(BF537_FAMILY)
|
||||||
|
static unsigned short * const port_mux[] = {
|
||||||
|
(unsigned short *) PORTF_MUX,
|
||||||
|
(unsigned short *) PORTG_MUX,
|
||||||
|
(unsigned short *) PORTH_MUX,
|
||||||
|
};
|
||||||
|
|
||||||
|
static const
|
||||||
|
u8 pmux_offset[][16] = {
|
||||||
|
# if defined(BF527_FAMILY)
|
||||||
|
{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
|
||||||
|
{ 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
|
||||||
|
{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
|
||||||
|
# elif defined(BF518_FAMILY)
|
||||||
|
{ 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
|
||||||
|
{ 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
|
||||||
|
{ 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
|
||||||
|
# endif
|
||||||
|
};
|
||||||
|
# endif
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
|
static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
|
||||||
|
|
@ -188,35 +134,9 @@ static struct str_ident {
|
||||||
} str_ident[MAX_RESOURCES];
|
} str_ident[MAX_RESOURCES];
|
||||||
|
|
||||||
#if defined(CONFIG_PM)
|
#if defined(CONFIG_PM)
|
||||||
#if defined(CONFIG_BF54x)
|
|
||||||
static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
|
static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
|
||||||
#else
|
|
||||||
static unsigned short wakeup_map[GPIO_BANK_NUM];
|
|
||||||
static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
|
|
||||||
static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
|
|
||||||
|
|
||||||
#ifdef BF533_FAMILY
|
|
||||||
static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB};
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef BF537_FAMILY
|
|
||||||
static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef BF538_FAMILY
|
|
||||||
static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
|
||||||
static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef BF561_FAMILY
|
|
||||||
static unsigned int sic_iwr_irqs[] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
#endif /* CONFIG_PM */
|
|
||||||
|
|
||||||
inline int check_gpio(unsigned gpio)
|
inline int check_gpio(unsigned gpio)
|
||||||
{
|
{
|
||||||
#if defined(BF548_FAMILY)
|
#if defined(BF548_FAMILY)
|
||||||
|
|
@ -330,9 +250,10 @@ static struct {
|
||||||
{.res = P_SPI0_SSEL3, .offset = 0},
|
{.res = P_SPI0_SSEL3, .offset = 0},
|
||||||
};
|
};
|
||||||
|
|
||||||
static void portmux_setup(unsigned short per, unsigned short function)
|
static void portmux_setup(unsigned short per)
|
||||||
{
|
{
|
||||||
u16 y, offset, muxreg;
|
u16 y, offset, muxreg;
|
||||||
|
u16 function = P_FUNCT2MUX(per);
|
||||||
|
|
||||||
for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
|
for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
|
||||||
if (port_mux_lut[y].res == per) {
|
if (port_mux_lut[y].res == per) {
|
||||||
|
|
@ -353,30 +274,33 @@ static void portmux_setup(unsigned short per, unsigned short function)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#elif defined(BF548_FAMILY)
|
#elif defined(BF548_FAMILY)
|
||||||
inline void portmux_setup(unsigned short portno, unsigned short function)
|
inline void portmux_setup(unsigned short per)
|
||||||
{
|
{
|
||||||
u32 pmux;
|
u32 pmux;
|
||||||
|
u16 ident = P_IDENT(per);
|
||||||
|
u16 function = P_FUNCT2MUX(per);
|
||||||
|
|
||||||
pmux = gpio_array[gpio_bank(portno)]->port_mux;
|
pmux = gpio_array[gpio_bank(ident)]->port_mux;
|
||||||
|
|
||||||
pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
|
pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
|
||||||
pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
|
pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
|
||||||
|
|
||||||
gpio_array[gpio_bank(portno)]->port_mux = pmux;
|
gpio_array[gpio_bank(ident)]->port_mux = pmux;
|
||||||
}
|
}
|
||||||
|
|
||||||
inline u16 get_portmux(unsigned short portno)
|
inline u16 get_portmux(unsigned short per)
|
||||||
{
|
{
|
||||||
u32 pmux;
|
u32 pmux;
|
||||||
|
u16 ident = P_IDENT(per);
|
||||||
|
|
||||||
pmux = gpio_array[gpio_bank(portno)]->port_mux;
|
pmux = gpio_array[gpio_bank(ident)]->port_mux;
|
||||||
|
|
||||||
return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
|
return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
|
||||||
}
|
}
|
||||||
#elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
#elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
||||||
inline void portmux_setup(unsigned short portno, unsigned short function)
|
inline void portmux_setup(unsigned short per)
|
||||||
{
|
{
|
||||||
u16 pmux, ident = P_IDENT(portno);
|
u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
|
||||||
u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
|
u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
|
||||||
|
|
||||||
pmux = *port_mux[gpio_bank(ident)];
|
pmux = *port_mux[gpio_bank(ident)];
|
||||||
|
|
@ -424,90 +348,71 @@ void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
|
||||||
unsigned long flags; \
|
unsigned long flags; \
|
||||||
local_irq_save_hw(flags); \
|
local_irq_save_hw(flags); \
|
||||||
if (arg) \
|
if (arg) \
|
||||||
gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
|
gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
|
||||||
else \
|
else \
|
||||||
gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
|
gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
|
||||||
AWA_DUMMY_READ(name); \
|
AWA_DUMMY_READ(name); \
|
||||||
local_irq_restore_hw(flags); \
|
local_irq_restore_hw(flags); \
|
||||||
} \
|
} \
|
||||||
EXPORT_SYMBOL(set_gpio_ ## name);
|
EXPORT_SYMBOL(set_gpio_ ## name);
|
||||||
|
|
||||||
SET_GPIO(dir)
|
SET_GPIO(dir) /* set_gpio_dir() */
|
||||||
SET_GPIO(inen)
|
SET_GPIO(inen) /* set_gpio_inen() */
|
||||||
SET_GPIO(polar)
|
SET_GPIO(polar) /* set_gpio_polar() */
|
||||||
SET_GPIO(edge)
|
SET_GPIO(edge) /* set_gpio_edge() */
|
||||||
SET_GPIO(both)
|
SET_GPIO(both) /* set_gpio_both() */
|
||||||
|
|
||||||
|
|
||||||
#if ANOMALY_05000311 || ANOMALY_05000323
|
|
||||||
#define SET_GPIO_SC(name) \
|
#define SET_GPIO_SC(name) \
|
||||||
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
|
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
|
||||||
{ \
|
{ \
|
||||||
unsigned long flags; \
|
unsigned long flags; \
|
||||||
local_irq_save_hw(flags); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
||||||
|
local_irq_save_hw(flags); \
|
||||||
if (arg) \
|
if (arg) \
|
||||||
gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
|
gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
|
||||||
else \
|
else \
|
||||||
gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
|
gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
|
||||||
AWA_DUMMY_READ(name); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
||||||
local_irq_restore_hw(flags); \
|
AWA_DUMMY_READ(name); \
|
||||||
|
local_irq_restore_hw(flags); \
|
||||||
|
} \
|
||||||
} \
|
} \
|
||||||
EXPORT_SYMBOL(set_gpio_ ## name);
|
EXPORT_SYMBOL(set_gpio_ ## name);
|
||||||
#else
|
|
||||||
#define SET_GPIO_SC(name) \
|
|
||||||
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
|
|
||||||
{ \
|
|
||||||
if (arg) \
|
|
||||||
gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
|
|
||||||
else \
|
|
||||||
gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
|
|
||||||
} \
|
|
||||||
EXPORT_SYMBOL(set_gpio_ ## name);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
SET_GPIO_SC(maska)
|
SET_GPIO_SC(maska)
|
||||||
SET_GPIO_SC(maskb)
|
SET_GPIO_SC(maskb)
|
||||||
SET_GPIO_SC(data)
|
SET_GPIO_SC(data)
|
||||||
|
|
||||||
#if ANOMALY_05000311 || ANOMALY_05000323
|
|
||||||
void set_gpio_toggle(unsigned gpio)
|
void set_gpio_toggle(unsigned gpio)
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
local_irq_save_hw(flags);
|
if (ANOMALY_05000311 || ANOMALY_05000323)
|
||||||
gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
|
local_irq_save_hw(flags);
|
||||||
AWA_DUMMY_READ(toggle);
|
gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
|
||||||
local_irq_restore_hw(flags);
|
if (ANOMALY_05000311 || ANOMALY_05000323) {
|
||||||
|
AWA_DUMMY_READ(toggle);
|
||||||
|
local_irq_restore_hw(flags);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
#else
|
|
||||||
void set_gpio_toggle(unsigned gpio)
|
|
||||||
{
|
|
||||||
gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
EXPORT_SYMBOL(set_gpio_toggle);
|
EXPORT_SYMBOL(set_gpio_toggle);
|
||||||
|
|
||||||
|
|
||||||
/*Set current PORT date (16-bit word)*/
|
/*Set current PORT date (16-bit word)*/
|
||||||
|
|
||||||
#if ANOMALY_05000311 || ANOMALY_05000323
|
|
||||||
#define SET_GPIO_P(name) \
|
#define SET_GPIO_P(name) \
|
||||||
void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
|
void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
|
||||||
{ \
|
{ \
|
||||||
unsigned long flags; \
|
unsigned long flags; \
|
||||||
local_irq_save_hw(flags); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
||||||
gpio_bankb[gpio_bank(gpio)]->name = arg; \
|
local_irq_save_hw(flags); \
|
||||||
AWA_DUMMY_READ(name); \
|
gpio_array[gpio_bank(gpio)]->name = arg; \
|
||||||
local_irq_restore_hw(flags); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
||||||
|
AWA_DUMMY_READ(name); \
|
||||||
|
local_irq_restore_hw(flags); \
|
||||||
|
} \
|
||||||
} \
|
} \
|
||||||
EXPORT_SYMBOL(set_gpiop_ ## name);
|
EXPORT_SYMBOL(set_gpiop_ ## name);
|
||||||
#else
|
|
||||||
#define SET_GPIO_P(name) \
|
|
||||||
void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
|
|
||||||
{ \
|
|
||||||
gpio_bankb[gpio_bank(gpio)]->name = arg; \
|
|
||||||
} \
|
|
||||||
EXPORT_SYMBOL(set_gpiop_ ## name);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
SET_GPIO_P(data)
|
SET_GPIO_P(data)
|
||||||
SET_GPIO_P(dir)
|
SET_GPIO_P(dir)
|
||||||
|
|
@ -519,27 +424,21 @@ SET_GPIO_P(maska)
|
||||||
SET_GPIO_P(maskb)
|
SET_GPIO_P(maskb)
|
||||||
|
|
||||||
/* Get a specific bit */
|
/* Get a specific bit */
|
||||||
#if ANOMALY_05000311 || ANOMALY_05000323
|
|
||||||
#define GET_GPIO(name) \
|
#define GET_GPIO(name) \
|
||||||
unsigned short get_gpio_ ## name(unsigned gpio) \
|
unsigned short get_gpio_ ## name(unsigned gpio) \
|
||||||
{ \
|
{ \
|
||||||
unsigned long flags; \
|
unsigned long flags; \
|
||||||
unsigned short ret; \
|
unsigned short ret; \
|
||||||
local_irq_save_hw(flags); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
||||||
ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
|
local_irq_save_hw(flags); \
|
||||||
AWA_DUMMY_READ(name); \
|
ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
|
||||||
local_irq_restore_hw(flags); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
||||||
|
AWA_DUMMY_READ(name); \
|
||||||
|
local_irq_restore_hw(flags); \
|
||||||
|
} \
|
||||||
return ret; \
|
return ret; \
|
||||||
} \
|
} \
|
||||||
EXPORT_SYMBOL(get_gpio_ ## name);
|
EXPORT_SYMBOL(get_gpio_ ## name);
|
||||||
#else
|
|
||||||
#define GET_GPIO(name) \
|
|
||||||
unsigned short get_gpio_ ## name(unsigned gpio) \
|
|
||||||
{ \
|
|
||||||
return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
|
|
||||||
} \
|
|
||||||
EXPORT_SYMBOL(get_gpio_ ## name);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
GET_GPIO(data)
|
GET_GPIO(data)
|
||||||
GET_GPIO(dir)
|
GET_GPIO(dir)
|
||||||
|
|
@ -552,27 +451,21 @@ GET_GPIO(maskb)
|
||||||
|
|
||||||
/*Get current PORT date (16-bit word)*/
|
/*Get current PORT date (16-bit word)*/
|
||||||
|
|
||||||
#if ANOMALY_05000311 || ANOMALY_05000323
|
|
||||||
#define GET_GPIO_P(name) \
|
#define GET_GPIO_P(name) \
|
||||||
unsigned short get_gpiop_ ## name(unsigned gpio) \
|
unsigned short get_gpiop_ ## name(unsigned gpio) \
|
||||||
{ \
|
{ \
|
||||||
unsigned long flags; \
|
unsigned long flags; \
|
||||||
unsigned short ret; \
|
unsigned short ret; \
|
||||||
local_irq_save_hw(flags); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
||||||
ret = (gpio_bankb[gpio_bank(gpio)]->name); \
|
local_irq_save_hw(flags); \
|
||||||
AWA_DUMMY_READ(name); \
|
ret = (gpio_array[gpio_bank(gpio)]->name); \
|
||||||
local_irq_restore_hw(flags); \
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
||||||
|
AWA_DUMMY_READ(name); \
|
||||||
|
local_irq_restore_hw(flags); \
|
||||||
|
} \
|
||||||
return ret; \
|
return ret; \
|
||||||
} \
|
} \
|
||||||
EXPORT_SYMBOL(get_gpiop_ ## name);
|
EXPORT_SYMBOL(get_gpiop_ ## name);
|
||||||
#else
|
|
||||||
#define GET_GPIO_P(name) \
|
|
||||||
unsigned short get_gpiop_ ## name(unsigned gpio) \
|
|
||||||
{ \
|
|
||||||
return (gpio_bankb[gpio_bank(gpio)]->name);\
|
|
||||||
} \
|
|
||||||
EXPORT_SYMBOL(get_gpiop_ ## name);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
GET_GPIO_P(data)
|
GET_GPIO_P(data)
|
||||||
GET_GPIO_P(dir)
|
GET_GPIO_P(dir)
|
||||||
|
|
@ -585,6 +478,26 @@ GET_GPIO_P(maskb)
|
||||||
|
|
||||||
|
|
||||||
#ifdef CONFIG_PM
|
#ifdef CONFIG_PM
|
||||||
|
|
||||||
|
static unsigned short wakeup_map[GPIO_BANK_NUM];
|
||||||
|
static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
|
||||||
|
|
||||||
|
static const unsigned int sic_iwr_irqs[] = {
|
||||||
|
#if defined(BF533_FAMILY)
|
||||||
|
IRQ_PROG_INTB
|
||||||
|
#elif defined(BF537_FAMILY)
|
||||||
|
IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
|
||||||
|
#elif defined(BF538_FAMILY)
|
||||||
|
IRQ_PORTF_INTB
|
||||||
|
#elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
||||||
|
IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
|
||||||
|
#elif defined(BF561_FAMILY)
|
||||||
|
IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
|
||||||
|
#else
|
||||||
|
# error no SIC_IWR defined
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
/***********************************************************
|
/***********************************************************
|
||||||
*
|
*
|
||||||
* FUNCTIONS: Blackfin PM Setup API
|
* FUNCTIONS: Blackfin PM Setup API
|
||||||
|
|
@ -669,18 +582,18 @@ u32 bfin_pm_standby_setup(void)
|
||||||
mask = wakeup_map[gpio_bank(i)];
|
mask = wakeup_map[gpio_bank(i)];
|
||||||
bank = gpio_bank(i);
|
bank = gpio_bank(i);
|
||||||
|
|
||||||
gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
|
gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
|
||||||
gpio_bankb[bank]->maskb = 0;
|
gpio_array[bank]->maskb = 0;
|
||||||
|
|
||||||
if (mask) {
|
if (mask) {
|
||||||
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
||||||
gpio_bank_saved[bank].fer = *port_fer[bank];
|
gpio_bank_saved[bank].fer = *port_fer[bank];
|
||||||
#endif
|
#endif
|
||||||
gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
|
gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
|
||||||
gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
|
gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
|
||||||
gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
|
gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
|
||||||
gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
|
gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
|
||||||
gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
|
gpio_bank_saved[bank].both = gpio_array[bank]->both;
|
||||||
gpio_bank_saved[bank].reserved =
|
gpio_bank_saved[bank].reserved =
|
||||||
reserved_gpio_map[bank];
|
reserved_gpio_map[bank];
|
||||||
|
|
||||||
|
|
@ -700,7 +613,7 @@ u32 bfin_pm_standby_setup(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
|
bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
|
||||||
gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
|
gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -721,18 +634,18 @@ void bfin_pm_standby_restore(void)
|
||||||
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
||||||
*port_fer[bank] = gpio_bank_saved[bank].fer;
|
*port_fer[bank] = gpio_bank_saved[bank].fer;
|
||||||
#endif
|
#endif
|
||||||
gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
|
gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
|
||||||
gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
|
gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
|
||||||
gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
|
gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
|
||||||
gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
|
gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
|
||||||
gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
|
gpio_array[bank]->both = gpio_bank_saved[bank].both;
|
||||||
|
|
||||||
reserved_gpio_map[bank] =
|
reserved_gpio_map[bank] =
|
||||||
gpio_bank_saved[bank].reserved;
|
gpio_bank_saved[bank].reserved;
|
||||||
bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
|
bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
|
gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
|
||||||
}
|
}
|
||||||
AWA_DUMMY_READ(maskb);
|
AWA_DUMMY_READ(maskb);
|
||||||
}
|
}
|
||||||
|
|
@ -745,21 +658,21 @@ void bfin_gpio_pm_hibernate_suspend(void)
|
||||||
bank = gpio_bank(i);
|
bank = gpio_bank(i);
|
||||||
|
|
||||||
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
||||||
gpio_bank_saved[bank].fer = *port_fer[bank];
|
gpio_bank_saved[bank].fer = *port_fer[bank];
|
||||||
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
||||||
gpio_bank_saved[bank].mux = *port_mux[bank];
|
gpio_bank_saved[bank].mux = *port_mux[bank];
|
||||||
#else
|
#else
|
||||||
if (bank == 0)
|
if (bank == 0)
|
||||||
gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
|
gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
gpio_bank_saved[bank].data = gpio_bankb[bank]->data;
|
gpio_bank_saved[bank].data = gpio_array[bank]->data;
|
||||||
gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
|
gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
|
||||||
gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
|
gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
|
||||||
gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
|
gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
|
||||||
gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
|
gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
|
||||||
gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
|
gpio_bank_saved[bank].both = gpio_array[bank]->both;
|
||||||
gpio_bank_saved[bank].maska = gpio_bankb[bank]->maska;
|
gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
|
||||||
}
|
}
|
||||||
|
|
||||||
AWA_DUMMY_READ(maska);
|
AWA_DUMMY_READ(maska);
|
||||||
|
|
@ -770,27 +683,27 @@ void bfin_gpio_pm_hibernate_restore(void)
|
||||||
int i, bank;
|
int i, bank;
|
||||||
|
|
||||||
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
||||||
bank = gpio_bank(i);
|
bank = gpio_bank(i);
|
||||||
|
|
||||||
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
|
||||||
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
|
||||||
*port_mux[bank] = gpio_bank_saved[bank].mux;
|
*port_mux[bank] = gpio_bank_saved[bank].mux;
|
||||||
#else
|
#else
|
||||||
if (bank == 0)
|
if (bank == 0)
|
||||||
bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
|
bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
|
||||||
#endif
|
#endif
|
||||||
*port_fer[bank] = gpio_bank_saved[bank].fer;
|
*port_fer[bank] = gpio_bank_saved[bank].fer;
|
||||||
#endif
|
#endif
|
||||||
gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
|
gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
|
||||||
gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
|
gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
|
||||||
gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
|
gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
|
||||||
gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
|
gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
|
||||||
gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
|
gpio_array[bank]->both = gpio_bank_saved[bank].both;
|
||||||
|
|
||||||
gpio_bankb[bank]->data_set = gpio_bank_saved[bank].data
|
gpio_array[bank]->data_set = gpio_bank_saved[bank].data
|
||||||
| gpio_bank_saved[bank].dir;
|
| gpio_bank_saved[bank].dir;
|
||||||
|
|
||||||
gpio_bankb[bank]->maska = gpio_bank_saved[bank].maska;
|
gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
|
||||||
}
|
}
|
||||||
AWA_DUMMY_READ(maska);
|
AWA_DUMMY_READ(maska);
|
||||||
}
|
}
|
||||||
|
|
@ -817,12 +730,12 @@ void bfin_gpio_pm_hibernate_suspend(void)
|
||||||
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
||||||
bank = gpio_bank(i);
|
bank = gpio_bank(i);
|
||||||
|
|
||||||
gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
|
gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
|
||||||
gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
|
gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
|
||||||
gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
|
gpio_bank_saved[bank].data = gpio_array[bank]->data;
|
||||||
gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
|
gpio_bank_saved[bank].data = gpio_array[bank]->data;
|
||||||
gpio_bank_saved[bank].inen = gpio_array[bank]->port_inen;
|
gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
|
||||||
gpio_bank_saved[bank].dir = gpio_array[bank]->port_dir_set;
|
gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -831,21 +744,21 @@ void bfin_gpio_pm_hibernate_restore(void)
|
||||||
int i, bank;
|
int i, bank;
|
||||||
|
|
||||||
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
||||||
bank = gpio_bank(i);
|
bank = gpio_bank(i);
|
||||||
|
|
||||||
gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
|
gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
|
||||||
gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
|
gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
|
||||||
gpio_array[bank]->port_inen = gpio_bank_saved[bank].inen;
|
gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
|
||||||
gpio_array[bank]->port_dir_set = gpio_bank_saved[bank].dir;
|
gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
|
||||||
gpio_array[bank]->port_set = gpio_bank_saved[bank].data
|
gpio_array[bank]->data_set = gpio_bank_saved[bank].data
|
||||||
| gpio_bank_saved[bank].dir;
|
| gpio_bank_saved[bank].dir;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
unsigned short get_gpio_dir(unsigned gpio)
|
unsigned short get_gpio_dir(unsigned gpio)
|
||||||
{
|
{
|
||||||
return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
|
return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(get_gpio_dir);
|
EXPORT_SYMBOL(get_gpio_dir);
|
||||||
|
|
||||||
|
|
@ -905,9 +818,7 @@ int peripheral_request(unsigned short per, const char *label)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifdef BF548_FAMILY
|
#ifdef BF548_FAMILY
|
||||||
u16 funct = get_portmux(ident);
|
if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
|
||||||
|
|
||||||
if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
|
|
||||||
#else
|
#else
|
||||||
if (!(per & P_MAYSHARE)) {
|
if (!(per & P_MAYSHARE)) {
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -931,11 +842,7 @@ int peripheral_request(unsigned short per, const char *label)
|
||||||
anyway:
|
anyway:
|
||||||
reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
|
reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
|
||||||
|
|
||||||
#ifdef BF548_FAMILY
|
portmux_setup(per);
|
||||||
portmux_setup(ident, P_FUNCT2MUX(per));
|
|
||||||
#else
|
|
||||||
portmux_setup(per, P_FUNCT2MUX(per));
|
|
||||||
#endif
|
|
||||||
port_setup(ident, PERIPHERAL_USAGE);
|
port_setup(ident, PERIPHERAL_USAGE);
|
||||||
|
|
||||||
local_irq_restore_hw(flags);
|
local_irq_restore_hw(flags);
|
||||||
|
|
@ -977,9 +884,6 @@ void peripheral_free(unsigned short per)
|
||||||
if (!(per & P_DEFINED))
|
if (!(per & P_DEFINED))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
if (check_gpio(ident) < 0)
|
|
||||||
return;
|
|
||||||
|
|
||||||
local_irq_save_hw(flags);
|
local_irq_save_hw(flags);
|
||||||
|
|
||||||
if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
|
if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
|
||||||
|
|
@ -1056,9 +960,15 @@ int bfin_gpio_request(unsigned gpio, const char *label)
|
||||||
local_irq_restore_hw(flags);
|
local_irq_restore_hw(flags);
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
}
|
}
|
||||||
if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))
|
if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
|
||||||
printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
|
printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
|
||||||
" (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
|
" (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
|
||||||
|
}
|
||||||
|
#ifndef BF548_FAMILY
|
||||||
|
else { /* Reset POLAR setting when acquiring a gpio for the first time */
|
||||||
|
set_gpio_polar(gpio, 0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
|
reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
|
||||||
set_label(gpio, label);
|
set_label(gpio, label);
|
||||||
|
|
@ -1078,6 +988,8 @@ void bfin_gpio_free(unsigned gpio)
|
||||||
if (check_gpio(gpio) < 0)
|
if (check_gpio(gpio) < 0)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
might_sleep();
|
||||||
|
|
||||||
local_irq_save_hw(flags);
|
local_irq_save_hw(flags);
|
||||||
|
|
||||||
if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
|
if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
|
||||||
|
|
@ -1158,92 +1070,15 @@ void bfin_gpio_irq_free(unsigned gpio)
|
||||||
local_irq_restore_hw(flags);
|
local_irq_restore_hw(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline void __bfin_gpio_direction_input(unsigned gpio)
|
||||||
|
{
|
||||||
#ifdef BF548_FAMILY
|
#ifdef BF548_FAMILY
|
||||||
int bfin_gpio_direction_input(unsigned gpio)
|
gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
|
||||||
{
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
|
|
||||||
gpio_error(gpio);
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
local_irq_save_hw(flags);
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
|
|
||||||
local_irq_restore_hw(flags);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(bfin_gpio_direction_input);
|
|
||||||
|
|
||||||
int bfin_gpio_direction_output(unsigned gpio, int value)
|
|
||||||
{
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
|
|
||||||
gpio_error(gpio);
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
local_irq_save_hw(flags);
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
|
|
||||||
gpio_set_value(gpio, value);
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
|
|
||||||
local_irq_restore_hw(flags);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(bfin_gpio_direction_output);
|
|
||||||
|
|
||||||
void bfin_gpio_set_value(unsigned gpio, int arg)
|
|
||||||
{
|
|
||||||
if (arg)
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
|
|
||||||
else
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(bfin_gpio_set_value);
|
|
||||||
|
|
||||||
int bfin_gpio_get_value(unsigned gpio)
|
|
||||||
{
|
|
||||||
return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(bfin_gpio_get_value);
|
|
||||||
|
|
||||||
void bfin_gpio_irq_prepare(unsigned gpio)
|
|
||||||
{
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
port_setup(gpio, GPIO_USAGE);
|
|
||||||
|
|
||||||
local_irq_save_hw(flags);
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
|
|
||||||
gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
|
|
||||||
local_irq_restore_hw(flags);
|
|
||||||
}
|
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
|
||||||
int bfin_gpio_get_value(unsigned gpio)
|
#endif
|
||||||
{
|
gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
|
||||||
unsigned long flags;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
if (unlikely(get_gpio_edge(gpio))) {
|
|
||||||
local_irq_save_hw(flags);
|
|
||||||
set_gpio_edge(gpio, 0);
|
|
||||||
ret = get_gpio_data(gpio);
|
|
||||||
set_gpio_edge(gpio, 1);
|
|
||||||
local_irq_restore_hw(flags);
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
} else
|
|
||||||
return get_gpio_data(gpio);
|
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(bfin_gpio_get_value);
|
|
||||||
|
|
||||||
|
|
||||||
int bfin_gpio_direction_input(unsigned gpio)
|
int bfin_gpio_direction_input(unsigned gpio)
|
||||||
{
|
{
|
||||||
|
|
@ -1255,8 +1090,7 @@ int bfin_gpio_direction_input(unsigned gpio)
|
||||||
}
|
}
|
||||||
|
|
||||||
local_irq_save_hw(flags);
|
local_irq_save_hw(flags);
|
||||||
gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
|
__bfin_gpio_direction_input(gpio);
|
||||||
gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
|
|
||||||
AWA_DUMMY_READ(inen);
|
AWA_DUMMY_READ(inen);
|
||||||
local_irq_restore_hw(flags);
|
local_irq_restore_hw(flags);
|
||||||
|
|
||||||
|
|
@ -1264,6 +1098,30 @@ int bfin_gpio_direction_input(unsigned gpio)
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(bfin_gpio_direction_input);
|
EXPORT_SYMBOL(bfin_gpio_direction_input);
|
||||||
|
|
||||||
|
void bfin_gpio_irq_prepare(unsigned gpio)
|
||||||
|
{
|
||||||
|
#ifdef BF548_FAMILY
|
||||||
|
unsigned long flags;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
port_setup(gpio, GPIO_USAGE);
|
||||||
|
|
||||||
|
#ifdef BF548_FAMILY
|
||||||
|
local_irq_save_hw(flags);
|
||||||
|
__bfin_gpio_direction_input(gpio);
|
||||||
|
local_irq_restore_hw(flags);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void bfin_gpio_set_value(unsigned gpio, int arg)
|
||||||
|
{
|
||||||
|
if (arg)
|
||||||
|
gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
||||||
|
else
|
||||||
|
gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL(bfin_gpio_set_value);
|
||||||
|
|
||||||
int bfin_gpio_direction_output(unsigned gpio, int value)
|
int bfin_gpio_direction_output(unsigned gpio, int value)
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
@ -1274,14 +1132,15 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
|
||||||
}
|
}
|
||||||
|
|
||||||
local_irq_save_hw(flags);
|
local_irq_save_hw(flags);
|
||||||
gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
|
|
||||||
|
|
||||||
if (value)
|
gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
|
||||||
gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
gpio_set_value(gpio, value);
|
||||||
else
|
#ifdef BF548_FAMILY
|
||||||
gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
|
gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
|
||||||
|
#else
|
||||||
|
gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
|
||||||
|
#endif
|
||||||
|
|
||||||
gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
|
|
||||||
AWA_DUMMY_READ(dir);
|
AWA_DUMMY_READ(dir);
|
||||||
local_irq_restore_hw(flags);
|
local_irq_restore_hw(flags);
|
||||||
|
|
||||||
|
|
@ -1289,6 +1148,27 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(bfin_gpio_direction_output);
|
EXPORT_SYMBOL(bfin_gpio_direction_output);
|
||||||
|
|
||||||
|
int bfin_gpio_get_value(unsigned gpio)
|
||||||
|
{
|
||||||
|
#ifdef BF548_FAMILY
|
||||||
|
return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
|
||||||
|
#else
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
if (unlikely(get_gpio_edge(gpio))) {
|
||||||
|
int ret;
|
||||||
|
local_irq_save_hw(flags);
|
||||||
|
set_gpio_edge(gpio, 0);
|
||||||
|
ret = get_gpio_data(gpio);
|
||||||
|
set_gpio_edge(gpio, 1);
|
||||||
|
local_irq_restore_hw(flags);
|
||||||
|
return ret;
|
||||||
|
} else
|
||||||
|
return get_gpio_data(gpio);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL(bfin_gpio_get_value);
|
||||||
|
|
||||||
/* If we are booting from SPI and our board lacks a strong enough pull up,
|
/* If we are booting from SPI and our board lacks a strong enough pull up,
|
||||||
* the core can reset and execute the bootrom faster than the resistor can
|
* the core can reset and execute the bootrom faster than the resistor can
|
||||||
* pull the signal logically high. To work around this (common) error in
|
* pull the signal logically high. To work around this (common) error in
|
||||||
|
|
@ -1299,23 +1179,15 @@ EXPORT_SYMBOL(bfin_gpio_direction_output);
|
||||||
* lives here as we need to force all the GPIO states w/out going through
|
* lives here as we need to force all the GPIO states w/out going through
|
||||||
* BUG() checks and such.
|
* BUG() checks and such.
|
||||||
*/
|
*/
|
||||||
void bfin_gpio_reset_spi0_ssel1(void)
|
void bfin_reset_boot_spi_cs(unsigned short pin)
|
||||||
{
|
{
|
||||||
u16 gpio = P_IDENT(P_SPI0_SSEL1);
|
unsigned short gpio = P_IDENT(pin);
|
||||||
|
|
||||||
port_setup(gpio, GPIO_USAGE);
|
port_setup(gpio, GPIO_USAGE);
|
||||||
gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
||||||
AWA_DUMMY_READ(data_set);
|
AWA_DUMMY_READ(data_set);
|
||||||
udelay(1);
|
udelay(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
void bfin_gpio_irq_prepare(unsigned gpio)
|
|
||||||
{
|
|
||||||
port_setup(gpio, GPIO_USAGE);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /*BF548_FAMILY */
|
|
||||||
|
|
||||||
#if defined(CONFIG_PROC_FS)
|
#if defined(CONFIG_PROC_FS)
|
||||||
static int gpio_proc_read(char *buf, char **start, off_t offset,
|
static int gpio_proc_read(char *buf, char **start, off_t offset,
|
||||||
int len, int *unused_i, void *unused_v)
|
int len, int *unused_i, void *unused_v)
|
||||||
|
|
@ -1369,11 +1241,7 @@ int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
|
||||||
|
|
||||||
void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
|
void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
|
||||||
{
|
{
|
||||||
#ifdef BF548_FAMILY
|
|
||||||
return bfin_gpio_set_value(gpio, value);
|
return bfin_gpio_set_value(gpio, value);
|
||||||
#else
|
|
||||||
return set_gpio_data(gpio, value);
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
|
int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
|
||||||
|
|
|
||||||
|
|
@ -63,10 +63,8 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
|
||||||
dcplb_tbl[cpu][i_d].addr = 0;
|
dcplb_tbl[cpu][i_d].addr = 0;
|
||||||
dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
|
dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
|
||||||
|
|
||||||
#if 0
|
|
||||||
icplb_tbl[cpu][i_i].addr = 0;
|
icplb_tbl[cpu][i_i].addr = 0;
|
||||||
icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB;
|
icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB;
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Cover kernel memory with 4M pages. */
|
/* Cover kernel memory with 4M pages. */
|
||||||
addr = 0;
|
addr = 0;
|
||||||
|
|
|
||||||
|
|
@ -163,12 +163,14 @@ MGR_ATTR static int icplb_miss(int cpu)
|
||||||
nr_icplb_supv_miss[cpu]++;
|
nr_icplb_supv_miss[cpu]++;
|
||||||
|
|
||||||
base = 0;
|
base = 0;
|
||||||
for (idx = 0; idx < icplb_nr_bounds; idx++) {
|
idx = 0;
|
||||||
|
do {
|
||||||
eaddr = icplb_bounds[idx].eaddr;
|
eaddr = icplb_bounds[idx].eaddr;
|
||||||
if (addr < eaddr)
|
if (addr < eaddr)
|
||||||
break;
|
break;
|
||||||
base = eaddr;
|
base = eaddr;
|
||||||
}
|
} while (++idx < icplb_nr_bounds);
|
||||||
|
|
||||||
if (unlikely(idx == icplb_nr_bounds))
|
if (unlikely(idx == icplb_nr_bounds))
|
||||||
return CPLB_NO_ADDR_MATCH;
|
return CPLB_NO_ADDR_MATCH;
|
||||||
|
|
||||||
|
|
@ -208,12 +210,14 @@ MGR_ATTR static int dcplb_miss(int cpu)
|
||||||
nr_dcplb_supv_miss[cpu]++;
|
nr_dcplb_supv_miss[cpu]++;
|
||||||
|
|
||||||
base = 0;
|
base = 0;
|
||||||
for (idx = 0; idx < dcplb_nr_bounds; idx++) {
|
idx = 0;
|
||||||
|
do {
|
||||||
eaddr = dcplb_bounds[idx].eaddr;
|
eaddr = dcplb_bounds[idx].eaddr;
|
||||||
if (addr < eaddr)
|
if (addr < eaddr)
|
||||||
break;
|
break;
|
||||||
base = eaddr;
|
base = eaddr;
|
||||||
}
|
} while (++idx < dcplb_nr_bounds);
|
||||||
|
|
||||||
if (unlikely(idx == dcplb_nr_bounds))
|
if (unlikely(idx == dcplb_nr_bounds))
|
||||||
return CPLB_NO_ADDR_MATCH;
|
return CPLB_NO_ADDR_MATCH;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -35,6 +35,7 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <asm/trace.h>
|
#include <asm/trace.h>
|
||||||
|
#include <asm/pda.h>
|
||||||
|
|
||||||
static atomic_t irq_err_count;
|
static atomic_t irq_err_count;
|
||||||
static spinlock_t irq_controller_lock;
|
static spinlock_t irq_controller_lock;
|
||||||
|
|
@ -96,8 +97,13 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||||
seq_putc(p, '\n');
|
seq_putc(p, '\n');
|
||||||
skip:
|
skip:
|
||||||
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
|
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
|
||||||
} else if (i == NR_IRQS)
|
} else if (i == NR_IRQS) {
|
||||||
|
seq_printf(p, "NMI: ");
|
||||||
|
for_each_online_cpu(j)
|
||||||
|
seq_printf(p, "%10u ", cpu_pda[j].__nmi_count);
|
||||||
|
seq_printf(p, " CORE Non Maskable Interrupt\n");
|
||||||
seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
|
seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
|
||||||
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -20,8 +20,8 @@
|
||||||
* reset while the Core B bit (on dual core parts) is cleared by
|
* reset while the Core B bit (on dual core parts) is cleared by
|
||||||
* the core reset.
|
* the core reset.
|
||||||
*/
|
*/
|
||||||
__attribute__((l1_text))
|
__attribute__ ((__l1_text__, __noreturn__))
|
||||||
static void _bfin_reset(void)
|
static void bfin_reset(void)
|
||||||
{
|
{
|
||||||
/* Wait for completion of "system" events such as cache line
|
/* Wait for completion of "system" events such as cache line
|
||||||
* line fills so that we avoid infinite stalls later on as
|
* line fills so that we avoid infinite stalls later on as
|
||||||
|
|
@ -30,7 +30,11 @@ static void _bfin_reset(void)
|
||||||
*/
|
*/
|
||||||
__builtin_bfin_ssync();
|
__builtin_bfin_ssync();
|
||||||
|
|
||||||
while (1) {
|
/* The bootrom checks to see how it was reset and will
|
||||||
|
* automatically perform a software reset for us when
|
||||||
|
* it starts executing after the core reset.
|
||||||
|
*/
|
||||||
|
if (ANOMALY_05000353 || ANOMALY_05000386) {
|
||||||
/* Initiate System software reset. */
|
/* Initiate System software reset. */
|
||||||
bfin_write_SWRST(0x7);
|
bfin_write_SWRST(0x7);
|
||||||
|
|
||||||
|
|
@ -50,6 +54,11 @@ static void _bfin_reset(void)
|
||||||
/* Clear System software reset */
|
/* Clear System software reset */
|
||||||
bfin_write_SWRST(0);
|
bfin_write_SWRST(0);
|
||||||
|
|
||||||
|
/* The BF526 ROM will crash during reset */
|
||||||
|
#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
|
||||||
|
bfin_read_SWRST();
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Wait for the SWRST write to complete. Cannot rely on SSYNC
|
/* Wait for the SWRST write to complete. Cannot rely on SSYNC
|
||||||
* though as the System state is all reset now.
|
* though as the System state is all reset now.
|
||||||
*/
|
*/
|
||||||
|
|
@ -60,22 +69,11 @@ static void _bfin_reset(void)
|
||||||
: "a" (15 * 1)
|
: "a" (15 * 1)
|
||||||
: "LC1", "LB1", "LT1"
|
: "LC1", "LB1", "LT1"
|
||||||
);
|
);
|
||||||
|
}
|
||||||
|
|
||||||
|
while (1)
|
||||||
/* Issue core reset */
|
/* Issue core reset */
|
||||||
asm("raise 1");
|
asm("raise 1");
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static void bfin_reset(void)
|
|
||||||
{
|
|
||||||
if (ANOMALY_05000353 || ANOMALY_05000386)
|
|
||||||
_bfin_reset();
|
|
||||||
else
|
|
||||||
/* the bootrom checks to see how it was reset and will
|
|
||||||
* automatically perform a software reset for us when
|
|
||||||
* it starts executing boot
|
|
||||||
*/
|
|
||||||
asm("raise 1;");
|
|
||||||
}
|
}
|
||||||
|
|
||||||
__attribute__((weak))
|
__attribute__((weak))
|
||||||
|
|
|
||||||
|
|
@ -60,7 +60,7 @@ void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
|
||||||
#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
|
#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
|
||||||
#define BFIN_MEMMAP_RAM 1
|
#define BFIN_MEMMAP_RAM 1
|
||||||
#define BFIN_MEMMAP_RESERVED 2
|
#define BFIN_MEMMAP_RESERVED 2
|
||||||
struct bfin_memmap {
|
static struct bfin_memmap {
|
||||||
int nr_map;
|
int nr_map;
|
||||||
struct bfin_memmap_entry {
|
struct bfin_memmap_entry {
|
||||||
unsigned long long addr; /* start of memory segment */
|
unsigned long long addr; /* start of memory segment */
|
||||||
|
|
@ -824,7 +824,15 @@ void __init setup_arch(char **cmdline_p)
|
||||||
flash_probe();
|
flash_probe();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
|
||||||
|
|
||||||
|
/* Newer parts mirror SWRST bits in SYSCR */
|
||||||
|
#if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
|
||||||
|
defined(CONFIG_BF538) || defined(CONFIG_BF539)
|
||||||
_bfin_swrst = bfin_read_SWRST();
|
_bfin_swrst = bfin_read_SWRST();
|
||||||
|
#else
|
||||||
|
_bfin_swrst = bfin_read_SYSCR();
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
|
#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
|
||||||
bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
|
bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
|
||||||
|
|
@ -853,7 +861,7 @@ void __init setup_arch(char **cmdline_p)
|
||||||
else if (_bfin_swrst & RESET_SOFTWARE)
|
else if (_bfin_swrst & RESET_SOFTWARE)
|
||||||
printk(KERN_NOTICE "Reset caused by Software reset\n");
|
printk(KERN_NOTICE "Reset caused by Software reset\n");
|
||||||
|
|
||||||
printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
|
printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
|
||||||
if (bfin_compiled_revid() == 0xffff)
|
if (bfin_compiled_revid() == 0xffff)
|
||||||
printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
|
printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
|
||||||
else if (bfin_compiled_revid() == -1)
|
else if (bfin_compiled_revid() == -1)
|
||||||
|
|
|
||||||
|
|
@ -673,6 +673,14 @@ static void decode_instruction(unsigned short *address)
|
||||||
verbose_printk("RTI");
|
verbose_printk("RTI");
|
||||||
else if (opcode == 0x0012)
|
else if (opcode == 0x0012)
|
||||||
verbose_printk("RTX");
|
verbose_printk("RTX");
|
||||||
|
else if (opcode == 0x0013)
|
||||||
|
verbose_printk("RTN");
|
||||||
|
else if (opcode == 0x0014)
|
||||||
|
verbose_printk("RTE");
|
||||||
|
else if (opcode == 0x0025)
|
||||||
|
verbose_printk("EMUEXCPT");
|
||||||
|
else if (opcode == 0x0040 && opcode <= 0x0047)
|
||||||
|
verbose_printk("STI R%i", opcode & 7);
|
||||||
else if (opcode >= 0x0050 && opcode <= 0x0057)
|
else if (opcode >= 0x0050 && opcode <= 0x0057)
|
||||||
verbose_printk("JUMP (P%i)", opcode & 7);
|
verbose_printk("JUMP (P%i)", opcode & 7);
|
||||||
else if (opcode >= 0x0060 && opcode <= 0x0067)
|
else if (opcode >= 0x0060 && opcode <= 0x0067)
|
||||||
|
|
@ -681,6 +689,10 @@ static void decode_instruction(unsigned short *address)
|
||||||
verbose_printk("CALL (PC+P%i)", opcode & 7);
|
verbose_printk("CALL (PC+P%i)", opcode & 7);
|
||||||
else if (opcode >= 0x0080 && opcode <= 0x0087)
|
else if (opcode >= 0x0080 && opcode <= 0x0087)
|
||||||
verbose_printk("JUMP (PC+P%i)", opcode & 7);
|
verbose_printk("JUMP (PC+P%i)", opcode & 7);
|
||||||
|
else if (opcode >= 0x0090 && opcode <= 0x009F)
|
||||||
|
verbose_printk("RAISE 0x%x", opcode & 0xF);
|
||||||
|
else if (opcode >= 0x00A0 && opcode <= 0x00AF)
|
||||||
|
verbose_printk("EXCPT 0x%x", opcode & 0xF);
|
||||||
else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF))
|
else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF))
|
||||||
verbose_printk("IF !CC JUMP");
|
verbose_printk("IF !CC JUMP");
|
||||||
else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff))
|
else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff))
|
||||||
|
|
@ -820,11 +832,8 @@ void show_stack(struct task_struct *task, unsigned long *stack)
|
||||||
decode_address(buf, (unsigned int)stack);
|
decode_address(buf, (unsigned int)stack);
|
||||||
printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
|
printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
|
||||||
|
|
||||||
addr = (unsigned int *)((unsigned int)stack & ~0x3F);
|
|
||||||
|
|
||||||
/* First thing is to look for a frame pointer */
|
/* First thing is to look for a frame pointer */
|
||||||
for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0;
|
for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) {
|
||||||
addr < endstack; addr++, i++) {
|
|
||||||
if (*addr & 0x1)
|
if (*addr & 0x1)
|
||||||
continue;
|
continue;
|
||||||
ins_addr = (unsigned short *)*addr;
|
ins_addr = (unsigned short *)*addr;
|
||||||
|
|
@ -834,7 +843,8 @@ void show_stack(struct task_struct *task, unsigned long *stack)
|
||||||
|
|
||||||
if (fp) {
|
if (fp) {
|
||||||
/* Let's check to see if it is a frame pointer */
|
/* Let's check to see if it is a frame pointer */
|
||||||
while (fp >= (addr - 1) && fp < endstack && fp)
|
while (fp >= (addr - 1) && fp < endstack
|
||||||
|
&& fp && ((unsigned int) fp & 0x3) == 0)
|
||||||
fp = (unsigned int *)*fp;
|
fp = (unsigned int *)*fp;
|
||||||
if (fp == 0 || fp == endstack) {
|
if (fp == 0 || fp == endstack) {
|
||||||
fp = addr - 1;
|
fp = addr - 1;
|
||||||
|
|
@ -1052,8 +1062,9 @@ void show_regs(struct pt_regs *fp)
|
||||||
char buf [150];
|
char buf [150];
|
||||||
struct irqaction *action;
|
struct irqaction *action;
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
unsigned long flags;
|
unsigned long flags = 0;
|
||||||
unsigned int cpu = smp_processor_id();
|
unsigned int cpu = smp_processor_id();
|
||||||
|
unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
|
||||||
|
|
||||||
verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted());
|
verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted());
|
||||||
verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
|
verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
|
||||||
|
|
@ -1073,17 +1084,22 @@ void show_regs(struct pt_regs *fp)
|
||||||
}
|
}
|
||||||
verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n",
|
verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n",
|
||||||
fp->seqstat & SEQSTAT_EXCAUSE);
|
fp->seqstat & SEQSTAT_EXCAUSE);
|
||||||
for (i = 6; i <= 15 ; i++) {
|
for (i = 2; i <= 15 ; i++) {
|
||||||
if (fp->ipend & (1 << i)) {
|
if (fp->ipend & (1 << i)) {
|
||||||
decode_address(buf, bfin_read32(EVT0 + 4*i));
|
if (i != 4) {
|
||||||
verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
|
decode_address(buf, bfin_read32(EVT0 + 4*i));
|
||||||
|
verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
|
||||||
|
} else
|
||||||
|
verbose_printk(KERN_NOTICE " interrupts disabled\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* if no interrupts are going off, don't print this out */
|
/* if no interrupts are going off, don't print this out */
|
||||||
if (fp->ipend & ~0x3F) {
|
if (fp->ipend & ~0x3F) {
|
||||||
for (i = 0; i < (NR_IRQS - 1); i++) {
|
for (i = 0; i < (NR_IRQS - 1); i++) {
|
||||||
spin_lock_irqsave(&irq_desc[i].lock, flags);
|
if (!in_atomic)
|
||||||
|
spin_lock_irqsave(&irq_desc[i].lock, flags);
|
||||||
|
|
||||||
action = irq_desc[i].action;
|
action = irq_desc[i].action;
|
||||||
if (!action)
|
if (!action)
|
||||||
goto unlock;
|
goto unlock;
|
||||||
|
|
@ -1096,7 +1112,8 @@ void show_regs(struct pt_regs *fp)
|
||||||
}
|
}
|
||||||
verbose_printk("\n");
|
verbose_printk("\n");
|
||||||
unlock:
|
unlock:
|
||||||
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
|
if (!in_atomic)
|
||||||
|
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -46,6 +46,7 @@
|
||||||
#include <asm/dpmc.h>
|
#include <asm/dpmc.h>
|
||||||
#include <asm/bfin_sdh.h>
|
#include <asm/bfin_sdh.h>
|
||||||
#include <linux/spi/ad7877.h>
|
#include <linux/spi/ad7877.h>
|
||||||
|
#include <net/dsa.h>
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Name the Board for the /proc/cpuinfo
|
* Name the Board for the /proc/cpuinfo
|
||||||
|
|
@ -104,8 +105,31 @@ static struct platform_device rtc_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
|
};
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
|
||||||
|
static struct dsa_platform_data ksz8893m_switch_data = {
|
||||||
|
.mii_bus = &bfin_mii_bus.dev,
|
||||||
|
.netdev = &bfin_mac_device.dev,
|
||||||
|
.port_names[0] = NULL,
|
||||||
|
.port_names[1] = "eth%d",
|
||||||
|
.port_names[2] = "eth%d",
|
||||||
|
.port_names[3] = "cpu",
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device ksz8893m_switch_device = {
|
||||||
|
.name = "dsa",
|
||||||
|
.id = 0,
|
||||||
|
.num_resources = 0,
|
||||||
|
.dev.platform_data = &ksz8893m_switch_data,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -147,6 +171,15 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_NET_DSA_KSZ8893M) \
|
||||||
|
|| defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
|
||||||
|
/* SPI SWITCH CHIP */
|
||||||
|
static struct bfin5xx_spi_chip spi_switch_info = {
|
||||||
|
.enable_dma = 0,
|
||||||
|
.bits_per_word = 8,
|
||||||
|
};
|
||||||
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
||||||
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
|
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
|
||||||
.enable_dma = 1,
|
.enable_dma = 1,
|
||||||
|
|
@ -226,6 +259,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_NET_DSA_KSZ8893M) \
|
||||||
|
|| defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
|
||||||
|
{
|
||||||
|
.modalias = "ksz8893m",
|
||||||
|
.max_speed_hz = 5000000,
|
||||||
|
.bus_num = 0,
|
||||||
|
.chip_select = 1,
|
||||||
|
.platform_data = NULL,
|
||||||
|
.controller_data = &spi_switch_info,
|
||||||
|
.mode = SPI_MODE_3,
|
||||||
|
},
|
||||||
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
|
||||||
{
|
{
|
||||||
.modalias = "spi_mmc_dummy",
|
.modalias = "spi_mmc_dummy",
|
||||||
|
|
@ -473,7 +519,6 @@ static struct platform_device i2c_bfin_twi_device = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
||||||
{
|
{
|
||||||
|
|
@ -487,7 +532,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||||
static struct platform_device bfin_sport0_uart_device = {
|
static struct platform_device bfin_sport0_uart_device = {
|
||||||
|
|
@ -584,9 +628,14 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
|
||||||
|
&ksz8893m_switch_device,
|
||||||
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||||
&bfin_spi0_device,
|
&bfin_spi0_device,
|
||||||
&bfin_spi1_device,
|
&bfin_spi1_device,
|
||||||
|
|
@ -632,12 +681,8 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
static int __init ezbrd_init(void)
|
static int __init ezbrd_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info));
|
ARRAY_SIZE(bfin_i2c_board_info));
|
||||||
#endif
|
|
||||||
|
|
||||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||||
return 0;
|
return 0;
|
||||||
|
|
@ -649,7 +694,7 @@ void native_machine_restart(char *cmd)
|
||||||
{
|
{
|
||||||
/* workaround reboot hang when booting from SPI */
|
/* workaround reboot hang when booting from SPI */
|
||||||
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
void bfin_get_ether_addr(char *addr)
|
void bfin_get_ether_addr(char *addr)
|
||||||
|
|
|
||||||
|
|
@ -103,6 +103,8 @@
|
||||||
#define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))
|
#define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))
|
||||||
#define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2))
|
#define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2))
|
||||||
|
|
||||||
|
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
|
||||||
|
|
||||||
/* SPORT Port Mux */
|
/* SPORT Port Mux */
|
||||||
#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
|
#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
|
||||||
#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
|
#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
|
||||||
|
|
|
||||||
|
|
@ -403,8 +403,13 @@ static struct platform_device isp1362_hcd_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -793,7 +798,6 @@ static struct platform_device i2c_bfin_twi_device = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
||||||
{
|
{
|
||||||
|
|
@ -809,7 +813,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||||
static struct platform_device bfin_sport0_uart_device = {
|
static struct platform_device bfin_sport0_uart_device = {
|
||||||
|
|
@ -920,6 +923,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -968,27 +972,23 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
&bfin_gpios_device,
|
&bfin_gpios_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init stamp_init(void)
|
static int __init cm_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info));
|
ARRAY_SIZE(bfin_i2c_board_info));
|
||||||
#endif
|
|
||||||
|
|
||||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
arch_initcall(stamp_init);
|
arch_initcall(cm_init);
|
||||||
|
|
||||||
void native_machine_restart(char *cmd)
|
void native_machine_restart(char *cmd)
|
||||||
{
|
{
|
||||||
/* workaround reboot hang when booting from SPI */
|
/* workaround reboot hang when booting from SPI */
|
||||||
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
void bfin_get_ether_addr(char *addr)
|
void bfin_get_ether_addr(char *addr)
|
||||||
|
|
|
||||||
|
|
@ -208,8 +208,13 @@ static struct platform_device rtc_device = {
|
||||||
|
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -590,7 +595,6 @@ static struct platform_device i2c_bfin_twi_device = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
||||||
{
|
{
|
||||||
|
|
@ -604,7 +608,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||||
static struct platform_device bfin_sport0_uart_device = {
|
static struct platform_device bfin_sport0_uart_device = {
|
||||||
|
|
@ -720,6 +723,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -764,27 +768,23 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
&bfin_gpios_device,
|
&bfin_gpios_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init stamp_init(void)
|
static int __init ezbrd_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info));
|
ARRAY_SIZE(bfin_i2c_board_info));
|
||||||
#endif
|
|
||||||
|
|
||||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
arch_initcall(stamp_init);
|
arch_initcall(ezbrd_init);
|
||||||
|
|
||||||
void native_machine_restart(char *cmd)
|
void native_machine_restart(char *cmd)
|
||||||
{
|
{
|
||||||
/* workaround reboot hang when booting from SPI */
|
/* workaround reboot hang when booting from SPI */
|
||||||
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
void bfin_get_ether_addr(char *addr)
|
void bfin_get_ether_addr(char *addr)
|
||||||
|
|
|
||||||
|
|
@ -425,8 +425,13 @@ static struct platform_device isp1362_hcd_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -830,7 +835,6 @@ static struct platform_device i2c_bfin_twi_device = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
|
||||||
{
|
{
|
||||||
|
|
@ -844,7 +848,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||||
static struct platform_device bfin_sport0_uart_device = {
|
static struct platform_device bfin_sport0_uart_device = {
|
||||||
|
|
@ -988,6 +991,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -1048,27 +1052,23 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
&bfin_gpios_device,
|
&bfin_gpios_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init stamp_init(void)
|
static int __init ezkit_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info));
|
ARRAY_SIZE(bfin_i2c_board_info));
|
||||||
#endif
|
|
||||||
|
|
||||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
arch_initcall(stamp_init);
|
arch_initcall(ezkit_init);
|
||||||
|
|
||||||
void native_machine_restart(char *cmd)
|
void native_machine_restart(char *cmd)
|
||||||
{
|
{
|
||||||
/* workaround reboot hang when booting from SPI */
|
/* workaround reboot hang when booting from SPI */
|
||||||
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
void bfin_get_ether_addr(char *addr)
|
void bfin_get_ether_addr(char *addr)
|
||||||
|
|
|
||||||
|
|
@ -73,6 +73,8 @@
|
||||||
|
|
||||||
#define P_HWAIT (P_DONTCARE)
|
#define P_HWAIT (P_DONTCARE)
|
||||||
|
|
||||||
|
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
|
||||||
|
|
||||||
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
|
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
|
||||||
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
|
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
|
||||||
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
|
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
|
||||||
|
|
|
||||||
|
|
@ -309,10 +309,8 @@ static struct platform_device i2c_gpio_device = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
static const unsigned int cclk_vlev_datasheet[] =
|
static const unsigned int cclk_vlev_datasheet[] =
|
||||||
{
|
{
|
||||||
|
|
@ -390,10 +388,8 @@ static int __init blackstamp_init(void)
|
||||||
|
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info));
|
ARRAY_SIZE(bfin_i2c_board_info));
|
||||||
#endif
|
|
||||||
|
|
||||||
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
|
|
|
||||||
|
|
@ -441,7 +441,6 @@ static struct platform_device i2c_gpio_device = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
|
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
|
||||||
{
|
{
|
||||||
|
|
@ -461,7 +460,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
static const unsigned int cclk_vlev_datasheet[] =
|
static const unsigned int cclk_vlev_datasheet[] =
|
||||||
{
|
{
|
||||||
|
|
@ -550,10 +548,8 @@ static int __init stamp_init(void)
|
||||||
|
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info));
|
ARRAY_SIZE(bfin_i2c_board_info));
|
||||||
#endif
|
|
||||||
|
|
||||||
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
|
|
|
||||||
|
|
@ -54,14 +54,11 @@
|
||||||
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
|
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
|
||||||
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
|
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
|
||||||
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
|
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
|
||||||
|
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
|
||||||
|
|
||||||
#define P_TMR2 (P_DONTCARE)
|
#define P_TMR2 (P_DONTCARE)
|
||||||
#define P_TMR1 (P_DONTCARE)
|
#define P_TMR1 (P_DONTCARE)
|
||||||
#define P_TMR0 (P_DONTCARE)
|
#define P_TMR0 (P_DONTCARE)
|
||||||
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1))
|
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1))
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* _MACH_PORTMUX_H_ */
|
#endif /* _MACH_PORTMUX_H_ */
|
||||||
|
|
|
||||||
|
|
@ -479,8 +479,13 @@ static struct platform_device bfin_sport1_uart_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -591,6 +596,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -262,8 +262,13 @@ static struct platform_device isp1362_hcd_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -662,6 +667,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -708,7 +714,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init stamp_init(void)
|
static int __init generic_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
|
|
@ -720,13 +726,13 @@ static int __init stamp_init(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
arch_initcall(stamp_init);
|
arch_initcall(generic_init);
|
||||||
|
|
||||||
void native_machine_restart(char *cmd)
|
void native_machine_restart(char *cmd)
|
||||||
{
|
{
|
||||||
/* workaround reboot hang when booting from SPI */
|
/* workaround reboot hang when booting from SPI */
|
||||||
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
|
|
||||||
|
|
@ -61,8 +61,13 @@ static struct platform_device rtc_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -324,6 +329,7 @@ static struct platform_device *minotaur_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -377,5 +383,5 @@ void native_machine_restart(char *cmd)
|
||||||
{
|
{
|
||||||
/* workaround reboot hang when booting from SPI */
|
/* workaround reboot hang when booting from SPI */
|
||||||
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -198,8 +198,13 @@ static struct platform_device isp1362_hcd_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -529,6 +534,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -558,7 +564,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init stamp_init(void)
|
static int __init pnav_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
|
|
@ -569,7 +575,7 @@ static int __init stamp_init(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
arch_initcall(stamp_init);
|
arch_initcall(pnav_init);
|
||||||
|
|
||||||
void bfin_get_ether_addr(char *addr)
|
void bfin_get_ether_addr(char *addr)
|
||||||
{
|
{
|
||||||
|
|
|
||||||
|
|
@ -321,8 +321,13 @@ static struct platform_device isp1362_hcd_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -1068,7 +1073,6 @@ static struct adp5588_kpad_platform_data adp5588_kpad_data = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
|
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
|
||||||
{
|
{
|
||||||
|
|
@ -1102,7 +1106,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
|
||||||
},
|
},
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
||||||
static struct platform_device bfin_sport0_uart_device = {
|
static struct platform_device bfin_sport0_uart_device = {
|
||||||
|
|
@ -1217,6 +1220,7 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -1284,12 +1288,8 @@ static struct platform_device *stamp_devices[] __initdata = {
|
||||||
static int __init stamp_init(void)
|
static int __init stamp_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info,
|
i2c_register_board_info(0, bfin_i2c_board_info,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info));
|
ARRAY_SIZE(bfin_i2c_board_info));
|
||||||
#endif
|
|
||||||
|
|
||||||
bfin_plat_nand_init();
|
bfin_plat_nand_init();
|
||||||
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
|
||||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||||
|
|
@ -1307,7 +1307,7 @@ void native_machine_restart(char *cmd)
|
||||||
{
|
{
|
||||||
/* workaround reboot hang when booting from SPI */
|
/* workaround reboot hang when booting from SPI */
|
||||||
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||||||
bfin_gpio_reset_spi0_ssel1();
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
|
|
@ -481,8 +481,13 @@ static struct platform_device bfin_sport1_uart_device = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
static struct platform_device bfin_mii_bus = {
|
||||||
|
.name = "bfin_mii_bus",
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device bfin_mac_device = {
|
static struct platform_device bfin_mac_device = {
|
||||||
.name = "bfin_mac",
|
.name = "bfin_mac",
|
||||||
|
.dev.platform_data = &bfin_mii_bus,
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -593,6 +598,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||||
|
&bfin_mii_bus,
|
||||||
&bfin_mac_device,
|
&bfin_mac_device,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -615,7 +621,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
|
||||||
&bfin_gpios_device,
|
&bfin_gpios_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init cm_bf537_init(void)
|
static int __init tcm_bf537_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
|
platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
|
||||||
|
|
@ -629,7 +635,7 @@ static int __init cm_bf537_init(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
arch_initcall(cm_bf537_init);
|
arch_initcall(tcm_bf537_init);
|
||||||
|
|
||||||
void bfin_get_ether_addr(char *addr)
|
void bfin_get_ether_addr(char *addr)
|
||||||
{
|
{
|
||||||
|
|
|
||||||
|
|
@ -31,6 +31,7 @@
|
||||||
#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
|
#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
|
||||||
#define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
|
#define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
|
||||||
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
|
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
|
||||||
|
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
|
||||||
|
|
||||||
#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
|
#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
|
||||||
#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
|
#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
|
||||||
|
|
|
||||||
|
|
@ -102,5 +102,6 @@
|
||||||
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
|
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
|
||||||
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
|
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
|
||||||
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
|
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
|
||||||
|
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
|
||||||
|
|
||||||
#endif /* _MACH_PORTMUX_H_ */
|
#endif /* _MACH_PORTMUX_H_ */
|
||||||
|
|
|
||||||
|
|
@ -781,7 +781,6 @@ static struct platform_device i2c_bfin_twi1_device = {
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
|
static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -800,7 +799,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||||
#include <linux/gpio_keys.h>
|
#include <linux/gpio_keys.h>
|
||||||
|
|
@ -956,13 +954,11 @@ static int __init ezkit_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_BOARDINFO
|
|
||||||
i2c_register_board_info(0, bfin_i2c_board_info0,
|
i2c_register_board_info(0, bfin_i2c_board_info0,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info0));
|
ARRAY_SIZE(bfin_i2c_board_info0));
|
||||||
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
|
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
|
||||||
i2c_register_board_info(1, bfin_i2c_board_info1,
|
i2c_register_board_info(1, bfin_i2c_board_info1,
|
||||||
ARRAY_SIZE(bfin_i2c_board_info1));
|
ARRAY_SIZE(bfin_i2c_board_info1));
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
|
platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
|
||||||
|
|
|
||||||
|
|
@ -175,6 +175,7 @@
|
||||||
#define ANOMALY_05000311 (0)
|
#define ANOMALY_05000311 (0)
|
||||||
#define ANOMALY_05000323 (0)
|
#define ANOMALY_05000323 (0)
|
||||||
#define ANOMALY_05000363 (0)
|
#define ANOMALY_05000363 (0)
|
||||||
|
#define ANOMALY_05000380 (0)
|
||||||
#define ANOMALY_05000412 (0)
|
#define ANOMALY_05000412 (0)
|
||||||
#define ANOMALY_05000432 (0)
|
#define ANOMALY_05000432 (0)
|
||||||
#define ANOMALY_05000435 (0)
|
#define ANOMALY_05000435 (0)
|
||||||
|
|
|
||||||
|
|
@ -104,6 +104,18 @@
|
||||||
|
|
||||||
#define AMGCTLVAL (V_AMBEN | V_AMCKEN)
|
#define AMGCTLVAL (V_AMBEN | V_AMCKEN)
|
||||||
|
|
||||||
|
#if defined(CONFIG_BF542M)
|
||||||
|
# define CONFIG_BF542
|
||||||
|
#elif defined(CONFIG_BF544M)
|
||||||
|
# define CONFIG_BF544
|
||||||
|
#elif defined(CONFIG_BF547M)
|
||||||
|
# define CONFIG_BF547
|
||||||
|
#elif defined(CONFIG_BF548M)
|
||||||
|
# define CONFIG_BF548
|
||||||
|
#elif defined(CONFIG_BF549M)
|
||||||
|
# define CONFIG_BF549
|
||||||
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_BF542)
|
#if defined(CONFIG_BF542)
|
||||||
# define CPU "BF542"
|
# define CPU "BF542"
|
||||||
# define CPUID 0x27de
|
# define CPUID 0x27de
|
||||||
|
|
|
||||||
|
|
@ -195,17 +195,17 @@
|
||||||
struct gpio_port_t {
|
struct gpio_port_t {
|
||||||
unsigned short port_fer;
|
unsigned short port_fer;
|
||||||
unsigned short dummy1;
|
unsigned short dummy1;
|
||||||
unsigned short port_data;
|
unsigned short data;
|
||||||
unsigned short dummy2;
|
unsigned short dummy2;
|
||||||
unsigned short port_set;
|
unsigned short data_set;
|
||||||
unsigned short dummy3;
|
unsigned short dummy3;
|
||||||
unsigned short port_clear;
|
unsigned short data_clear;
|
||||||
unsigned short dummy4;
|
unsigned short dummy4;
|
||||||
unsigned short port_dir_set;
|
unsigned short dir_set;
|
||||||
unsigned short dummy5;
|
unsigned short dummy5;
|
||||||
unsigned short port_dir_clear;
|
unsigned short dir_clear;
|
||||||
unsigned short dummy6;
|
unsigned short dummy6;
|
||||||
unsigned short port_inen;
|
unsigned short inen;
|
||||||
unsigned short dummy7;
|
unsigned short dummy7;
|
||||||
unsigned int port_mux;
|
unsigned int port_mux;
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -125,6 +125,7 @@
|
||||||
#define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3))
|
#define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3))
|
||||||
#define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3))
|
#define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3))
|
||||||
|
|
||||||
|
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
|
||||||
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))
|
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))
|
||||||
#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))
|
#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))
|
||||||
#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))
|
#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))
|
||||||
|
|
|
||||||
|
|
@ -1106,6 +1106,8 @@
|
||||||
#define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */
|
#define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */
|
||||||
#define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */
|
#define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */
|
||||||
#define POL 0x0000C000 /* PPI Signal Polarities */
|
#define POL 0x0000C000 /* PPI Signal Polarities */
|
||||||
|
#define POLC 0x4000 /* PPI Clock Polarity */
|
||||||
|
#define POLS 0x8000 /* PPI Frame Sync Polarity */
|
||||||
|
|
||||||
/* PPI_STATUS Masks */
|
/* PPI_STATUS Masks */
|
||||||
#define FLD 0x00000400 /* Field Indicator */
|
#define FLD 0x00000400 /* Field Indicator */
|
||||||
|
|
|
||||||
|
|
@ -85,5 +85,6 @@
|
||||||
#define P_SPI0_MOSI (P_DONTCARE)
|
#define P_SPI0_MOSI (P_DONTCARE)
|
||||||
#define P_SPI0_MISO (P_DONTCARE)
|
#define P_SPI0_MISO (P_DONTCARE)
|
||||||
#define P_SPI0_SCK (P_DONTCARE)
|
#define P_SPI0_SCK (P_DONTCARE)
|
||||||
|
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
|
||||||
|
|
||||||
#endif /* _MACH_PORTMUX_H_ */
|
#endif /* _MACH_PORTMUX_H_ */
|
||||||
|
|
|
||||||
|
|
@ -14,6 +14,7 @@
|
||||||
#include <asm/clocks.h>
|
#include <asm/clocks.h>
|
||||||
#include <asm/mem_init.h>
|
#include <asm/mem_init.h>
|
||||||
|
|
||||||
|
#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
|
||||||
#define PLL_CTL_VAL \
|
#define PLL_CTL_VAL \
|
||||||
(((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
|
(((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
|
||||||
(PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0))
|
(PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0))
|
||||||
|
|
@ -76,7 +77,7 @@ void init_clocks(void)
|
||||||
bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
|
bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
|
||||||
#ifdef EBIU_SDGCTL
|
#ifdef EBIU_SDGCTL
|
||||||
bfin_write_EBIU_SDRRC(mem_SDRRC);
|
bfin_write_EBIU_SDRRC(mem_SDRRC);
|
||||||
bfin_write_EBIU_SDGCTL(mem_SDGCTL);
|
bfin_write_EBIU_SDGCTL((bfin_read_EBIU_SDGCTL() & SDGCTL_WIDTH) | mem_SDGCTL);
|
||||||
#else
|
#else
|
||||||
bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ));
|
bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ));
|
||||||
do_sync();
|
do_sync();
|
||||||
|
|
|
||||||
|
|
@ -151,13 +151,6 @@ ENTRY(_ex_syscall)
|
||||||
jump.s _bfin_return_from_exception;
|
jump.s _bfin_return_from_exception;
|
||||||
ENDPROC(_ex_syscall)
|
ENDPROC(_ex_syscall)
|
||||||
|
|
||||||
ENTRY(_ex_soft_bp)
|
|
||||||
r7 = retx;
|
|
||||||
r7 += -2;
|
|
||||||
retx = r7;
|
|
||||||
jump.s _ex_trap_c;
|
|
||||||
ENDPROC(_ex_soft_bp)
|
|
||||||
|
|
||||||
ENTRY(_ex_single_step)
|
ENTRY(_ex_single_step)
|
||||||
/* If we just returned from an interrupt, the single step event is
|
/* If we just returned from an interrupt, the single step event is
|
||||||
for the RTI instruction. */
|
for the RTI instruction. */
|
||||||
|
|
@ -1087,7 +1080,7 @@ ENTRY(_ex_table)
|
||||||
* EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined
|
* EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined
|
||||||
*/
|
*/
|
||||||
.long _ex_syscall /* 0x00 - User Defined - Linux Syscall */
|
.long _ex_syscall /* 0x00 - User Defined - Linux Syscall */
|
||||||
.long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */
|
.long _ex_trap_c /* 0x01 - User Defined - Software breakpoint */
|
||||||
#ifdef CONFIG_KGDB
|
#ifdef CONFIG_KGDB
|
||||||
.long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection
|
.long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection
|
||||||
and break signal trap */
|
and break signal trap */
|
||||||
|
|
|
||||||
|
|
@ -17,6 +17,19 @@
|
||||||
|
|
||||||
__INIT
|
__INIT
|
||||||
|
|
||||||
|
ENTRY(__init_clear_bss)
|
||||||
|
r2 = r2 - r1;
|
||||||
|
cc = r2 == 0;
|
||||||
|
if cc jump .L_bss_done;
|
||||||
|
r2 >>= 2;
|
||||||
|
p1 = r1;
|
||||||
|
p2 = r2;
|
||||||
|
lsetup (1f, 1f) lc0 = p2;
|
||||||
|
1: [p1++] = r0;
|
||||||
|
.L_bss_done:
|
||||||
|
rts;
|
||||||
|
ENDPROC(__init_clear_bss)
|
||||||
|
|
||||||
#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
|
#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
|
||||||
|
|
||||||
ENTRY(__start)
|
ENTRY(__start)
|
||||||
|
|
@ -144,6 +157,35 @@ ENTRY(__start)
|
||||||
call _init_early_exception_vectors;
|
call _init_early_exception_vectors;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
r0 = 0 (x);
|
||||||
|
/* Zero out all of the fun bss regions */
|
||||||
|
#if L1_DATA_A_LENGTH > 0
|
||||||
|
r1.l = __sbss_l1;
|
||||||
|
r1.h = __sbss_l1;
|
||||||
|
r2.l = __ebss_l1;
|
||||||
|
r2.h = __ebss_l1;
|
||||||
|
call __init_clear_bss
|
||||||
|
#endif
|
||||||
|
#if L1_DATA_B_LENGTH > 0
|
||||||
|
r1.l = __sbss_b_l1;
|
||||||
|
r1.h = __sbss_b_l1;
|
||||||
|
r2.l = __ebss_b_l1;
|
||||||
|
r2.h = __ebss_b_l1;
|
||||||
|
call __init_clear_bss
|
||||||
|
#endif
|
||||||
|
#if L2_LENGTH > 0
|
||||||
|
r1.l = __sbss_l2;
|
||||||
|
r1.h = __sbss_l2;
|
||||||
|
r2.l = __ebss_l2;
|
||||||
|
r2.h = __ebss_l2;
|
||||||
|
call __init_clear_bss
|
||||||
|
#endif
|
||||||
|
r1.l = ___bss_start;
|
||||||
|
r1.h = ___bss_start;
|
||||||
|
r2.l = ___bss_stop;
|
||||||
|
r2.h = ___bss_stop;
|
||||||
|
call __init_clear_bss
|
||||||
|
|
||||||
/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
|
/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
|
||||||
call _bfin_relocate_l1_mem;
|
call _bfin_relocate_l1_mem;
|
||||||
#ifdef CONFIG_BFIN_KERNEL_CLOCK
|
#ifdef CONFIG_BFIN_KERNEL_CLOCK
|
||||||
|
|
@ -185,19 +227,6 @@ ENDPROC(__start)
|
||||||
# define WDOG_CTL WDOGA_CTL
|
# define WDOG_CTL WDOGA_CTL
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
ENTRY(__init_clear_bss)
|
|
||||||
r2 = r2 - r1;
|
|
||||||
cc = r2 == 0;
|
|
||||||
if cc jump .L_bss_done;
|
|
||||||
r2 >>= 2;
|
|
||||||
p1 = r1;
|
|
||||||
p2 = r2;
|
|
||||||
lsetup (1f, 1f) lc0 = p2;
|
|
||||||
1: [p1++] = r0;
|
|
||||||
.L_bss_done:
|
|
||||||
rts;
|
|
||||||
ENDPROC(__init_clear_bss)
|
|
||||||
|
|
||||||
ENTRY(_real_start)
|
ENTRY(_real_start)
|
||||||
/* Enable nested interrupts */
|
/* Enable nested interrupts */
|
||||||
[--sp] = reti;
|
[--sp] = reti;
|
||||||
|
|
@ -209,35 +238,6 @@ ENTRY(_real_start)
|
||||||
w[p0] = r0;
|
w[p0] = r0;
|
||||||
ssync;
|
ssync;
|
||||||
|
|
||||||
r0 = 0 (x);
|
|
||||||
/* Zero out all of the fun bss regions */
|
|
||||||
#if L1_DATA_A_LENGTH > 0
|
|
||||||
r1.l = __sbss_l1;
|
|
||||||
r1.h = __sbss_l1;
|
|
||||||
r2.l = __ebss_l1;
|
|
||||||
r2.h = __ebss_l1;
|
|
||||||
call __init_clear_bss
|
|
||||||
#endif
|
|
||||||
#if L1_DATA_B_LENGTH > 0
|
|
||||||
r1.l = __sbss_b_l1;
|
|
||||||
r1.h = __sbss_b_l1;
|
|
||||||
r2.l = __ebss_b_l1;
|
|
||||||
r2.h = __ebss_b_l1;
|
|
||||||
call __init_clear_bss
|
|
||||||
#endif
|
|
||||||
#if L2_LENGTH > 0
|
|
||||||
r1.l = __sbss_l2;
|
|
||||||
r1.h = __sbss_l2;
|
|
||||||
r2.l = __ebss_l2;
|
|
||||||
r2.h = __ebss_l2;
|
|
||||||
call __init_clear_bss
|
|
||||||
#endif
|
|
||||||
r1.l = ___bss_start;
|
|
||||||
r1.h = ___bss_start;
|
|
||||||
r2.l = ___bss_stop;
|
|
||||||
r2.h = ___bss_stop;
|
|
||||||
call __init_clear_bss
|
|
||||||
|
|
||||||
/* Pass the u-boot arguments to the global value command line */
|
/* Pass the u-boot arguments to the global value command line */
|
||||||
R0 = R7;
|
R0 = R7;
|
||||||
call _cmdline_init;
|
call _cmdline_init;
|
||||||
|
|
|
||||||
|
|
@ -195,7 +195,7 @@ ENDPROC(_evt_ivhw)
|
||||||
/* Interrupt routine for evt2 (NMI).
|
/* Interrupt routine for evt2 (NMI).
|
||||||
* We don't actually use this, so just return.
|
* We don't actually use this, so just return.
|
||||||
* For inner circle type details, please see:
|
* For inner circle type details, please see:
|
||||||
* http://docs.blackfin.uclinux.org/doku.php?id=linux:nmi
|
* http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi
|
||||||
*/
|
*/
|
||||||
ENTRY(_evt_nmi)
|
ENTRY(_evt_nmi)
|
||||||
.weak _evt_nmi
|
.weak _evt_nmi
|
||||||
|
|
|
||||||
|
|
@ -1101,10 +1101,9 @@ int __init init_arch_irq(void)
|
||||||
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
|
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
|
||||||
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
|
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
|
||||||
|
|
||||||
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \
|
#ifdef SIC_IWR0
|
||||||
|| defined(BF538_FAMILY) || defined(CONFIG_BF51x)
|
|
||||||
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
|
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
|
||||||
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
|
# ifdef SIC_IWR1
|
||||||
/* BF52x/BF51x system reset does not properly reset SIC_IWR1 which
|
/* BF52x/BF51x system reset does not properly reset SIC_IWR1 which
|
||||||
* will screw up the bootrom as it relies on MDMA0/1 waking it
|
* will screw up the bootrom as it relies on MDMA0/1 waking it
|
||||||
* up from IDLE instructions. See this report for more info:
|
* up from IDLE instructions. See this report for more info:
|
||||||
|
|
@ -1114,10 +1113,8 @@ int __init init_arch_irq(void)
|
||||||
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
|
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
|
||||||
else
|
else
|
||||||
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
|
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
|
||||||
#else
|
# endif
|
||||||
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
|
# ifdef SIC_IWR2
|
||||||
#endif
|
|
||||||
# ifdef CONFIG_BF54x
|
|
||||||
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
|
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
|
||||||
# endif
|
# endif
|
||||||
#else
|
#else
|
||||||
|
|
|
||||||
|
|
@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void)
|
||||||
|
|
||||||
bfin_pm_standby_restore();
|
bfin_pm_standby_restore();
|
||||||
|
|
||||||
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \
|
#ifdef SIC_IWR0
|
||||||
defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
|
|
||||||
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
|
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
|
||||||
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
|
# ifdef SIC_IWR1
|
||||||
/* BF52x system reset does not properly reset SIC_IWR1 which
|
/* BF52x system reset does not properly reset SIC_IWR1 which
|
||||||
* will screw up the bootrom as it relies on MDMA0/1 waking it
|
* will screw up the bootrom as it relies on MDMA0/1 waking it
|
||||||
* up from IDLE instructions. See this report for more info:
|
* up from IDLE instructions. See this report for more info:
|
||||||
|
|
@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void)
|
||||||
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
|
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
|
||||||
else
|
else
|
||||||
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
|
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
|
||||||
#else
|
# endif
|
||||||
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
|
# ifdef SIC_IWR2
|
||||||
#endif
|
|
||||||
# ifdef CONFIG_BF54x
|
|
||||||
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
|
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
|
||||||
# endif
|
# endif
|
||||||
#else
|
#else
|
||||||
|
|
|
||||||
|
|
@ -443,7 +443,7 @@ sn_acpi_slot_fixup(struct pci_dev *dev)
|
||||||
size = pci_resource_len(dev, PCI_ROM_RESOURCE);
|
size = pci_resource_len(dev, PCI_ROM_RESOURCE);
|
||||||
addr = ioremap(pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE],
|
addr = ioremap(pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE],
|
||||||
size);
|
size);
|
||||||
image_size = pci_get_rom_size(addr, size);
|
image_size = pci_get_rom_size(dev, addr, size);
|
||||||
dev->resource[PCI_ROM_RESOURCE].start = (unsigned long) addr;
|
dev->resource[PCI_ROM_RESOURCE].start = (unsigned long) addr;
|
||||||
dev->resource[PCI_ROM_RESOURCE].end =
|
dev->resource[PCI_ROM_RESOURCE].end =
|
||||||
(unsigned long) addr + image_size - 1;
|
(unsigned long) addr + image_size - 1;
|
||||||
|
|
|
||||||
|
|
@ -269,7 +269,7 @@ sn_io_slot_fixup(struct pci_dev *dev)
|
||||||
|
|
||||||
rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
|
rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
|
||||||
size + 1);
|
size + 1);
|
||||||
image_size = pci_get_rom_size(rom, size + 1);
|
image_size = pci_get_rom_size(dev, rom, size + 1);
|
||||||
dev->resource[PCI_ROM_RESOURCE].end =
|
dev->resource[PCI_ROM_RESOURCE].end =
|
||||||
dev->resource[PCI_ROM_RESOURCE].start +
|
dev->resource[PCI_ROM_RESOURCE].start +
|
||||||
image_size - 1;
|
image_size - 1;
|
||||||
|
|
|
||||||
|
|
@ -351,7 +351,7 @@ config SGI_IP27
|
||||||
select ARC64
|
select ARC64
|
||||||
select BOOT_ELF64
|
select BOOT_ELF64
|
||||||
select DEFAULT_SGI_PARTITION
|
select DEFAULT_SGI_PARTITION
|
||||||
select DMA_IP27
|
select DMA_COHERENT
|
||||||
select SYS_HAS_EARLY_PRINTK
|
select SYS_HAS_EARLY_PRINTK
|
||||||
select HW_HAS_PCI
|
select HW_HAS_PCI
|
||||||
select NR_CPUS_DEFAULT_64
|
select NR_CPUS_DEFAULT_64
|
||||||
|
|
@ -761,9 +761,6 @@ config CFE
|
||||||
config DMA_COHERENT
|
config DMA_COHERENT
|
||||||
bool
|
bool
|
||||||
|
|
||||||
config DMA_IP27
|
|
||||||
bool
|
|
||||||
|
|
||||||
config DMA_NONCOHERENT
|
config DMA_NONCOHERENT
|
||||||
bool
|
bool
|
||||||
select DMA_NEED_PCI_MAP_STATE
|
select DMA_NEED_PCI_MAP_STATE
|
||||||
|
|
@ -1368,7 +1365,7 @@ config CPU_SUPPORTS_64BIT_KERNEL
|
||||||
#
|
#
|
||||||
config HARDWARE_WATCHPOINTS
|
config HARDWARE_WATCHPOINTS
|
||||||
bool
|
bool
|
||||||
default y if CPU_MIPS32 || CPU_MIPS64
|
default y if CPU_MIPSR1 || CPU_MIPSR2
|
||||||
|
|
||||||
menu "Kernel type"
|
menu "Kernel type"
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -89,7 +89,7 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = {
|
||||||
.irq = AU1000_RTC_MATCH2_INT,
|
.irq = AU1000_RTC_MATCH2_INT,
|
||||||
.set_next_event = au1x_rtcmatch2_set_next_event,
|
.set_next_event = au1x_rtcmatch2_set_next_event,
|
||||||
.set_mode = au1x_rtcmatch2_set_mode,
|
.set_mode = au1x_rtcmatch2_set_mode,
|
||||||
.cpumask = CPU_MASK_ALL,
|
.cpumask = CPU_MASK_ALL_PTR,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct irqaction au1x_rtcmatch2_irqaction = {
|
static struct irqaction au1x_rtcmatch2_irqaction = {
|
||||||
|
|
|
||||||
|
|
@ -15,13 +15,11 @@
|
||||||
#include <linux/serial.h>
|
#include <linux/serial.h>
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/string.h> /* for memset */
|
#include <linux/string.h> /* for memset */
|
||||||
#include <linux/serial.h>
|
|
||||||
#include <linux/tty.h>
|
#include <linux/tty.h>
|
||||||
#include <linux/time.h>
|
#include <linux/time.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/serial_core.h>
|
#include <linux/serial_core.h>
|
||||||
#include <linux/serial_8250.h>
|
#include <linux/serial_8250.h>
|
||||||
#include <linux/string.h>
|
|
||||||
|
|
||||||
#include <asm/processor.h>
|
#include <asm/processor.h>
|
||||||
#include <asm/reboot.h>
|
#include <asm/reboot.h>
|
||||||
|
|
|
||||||
|
|
@ -53,7 +53,7 @@ CONFIG_GENERIC_TIME=y
|
||||||
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
|
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
|
||||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||||
CONFIG_ARC=y
|
CONFIG_ARC=y
|
||||||
CONFIG_DMA_IP27=y
|
CONFIG_DMA_COHERENT=y
|
||||||
CONFIG_EARLY_PRINTK=y
|
CONFIG_EARLY_PRINTK=y
|
||||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||||
# CONFIG_NO_IOPORT is not set
|
# CONFIG_NO_IOPORT is not set
|
||||||
|
|
|
||||||
|
|
@ -50,7 +50,7 @@
|
||||||
static __inline__ void atomic_add(int i, atomic_t * v)
|
static __inline__ void atomic_add(int i, atomic_t * v)
|
||||||
{
|
{
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -62,7 +62,7 @@ static __inline__ void atomic_add(int i, atomic_t * v)
|
||||||
: "=&r" (temp), "=m" (v->counter)
|
: "=&r" (temp), "=m" (v->counter)
|
||||||
: "Ir" (i), "m" (v->counter));
|
: "Ir" (i), "m" (v->counter));
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -95,7 +95,7 @@ static __inline__ void atomic_add(int i, atomic_t * v)
|
||||||
static __inline__ void atomic_sub(int i, atomic_t * v)
|
static __inline__ void atomic_sub(int i, atomic_t * v)
|
||||||
{
|
{
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -107,7 +107,7 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
|
||||||
: "=&r" (temp), "=m" (v->counter)
|
: "=&r" (temp), "=m" (v->counter)
|
||||||
: "Ir" (i), "m" (v->counter));
|
: "Ir" (i), "m" (v->counter));
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -135,12 +135,12 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
|
||||||
*/
|
*/
|
||||||
static __inline__ int atomic_add_return(int i, atomic_t * v)
|
static __inline__ int atomic_add_return(int i, atomic_t * v)
|
||||||
{
|
{
|
||||||
unsigned long result;
|
int result;
|
||||||
|
|
||||||
smp_llsc_mb();
|
smp_llsc_mb();
|
||||||
|
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -154,7 +154,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
|
||||||
: "Ir" (i), "m" (v->counter)
|
: "Ir" (i), "m" (v->counter)
|
||||||
: "memory");
|
: "memory");
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -187,12 +187,12 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
|
||||||
|
|
||||||
static __inline__ int atomic_sub_return(int i, atomic_t * v)
|
static __inline__ int atomic_sub_return(int i, atomic_t * v)
|
||||||
{
|
{
|
||||||
unsigned long result;
|
int result;
|
||||||
|
|
||||||
smp_llsc_mb();
|
smp_llsc_mb();
|
||||||
|
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -206,7 +206,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
|
||||||
: "Ir" (i), "m" (v->counter)
|
: "Ir" (i), "m" (v->counter)
|
||||||
: "memory");
|
: "memory");
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -247,12 +247,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
|
||||||
*/
|
*/
|
||||||
static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
|
static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
|
||||||
{
|
{
|
||||||
unsigned long result;
|
int result;
|
||||||
|
|
||||||
smp_llsc_mb();
|
smp_llsc_mb();
|
||||||
|
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -270,7 +270,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
|
||||||
: "Ir" (i), "m" (v->counter)
|
: "Ir" (i), "m" (v->counter)
|
||||||
: "memory");
|
: "memory");
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
int temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -429,7 +429,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
|
||||||
static __inline__ void atomic64_add(long i, atomic64_t * v)
|
static __inline__ void atomic64_add(long i, atomic64_t * v)
|
||||||
{
|
{
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -441,7 +441,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
|
||||||
: "=&r" (temp), "=m" (v->counter)
|
: "=&r" (temp), "=m" (v->counter)
|
||||||
: "Ir" (i), "m" (v->counter));
|
: "Ir" (i), "m" (v->counter));
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -474,7 +474,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
|
||||||
static __inline__ void atomic64_sub(long i, atomic64_t * v)
|
static __inline__ void atomic64_sub(long i, atomic64_t * v)
|
||||||
{
|
{
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -486,7 +486,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
|
||||||
: "=&r" (temp), "=m" (v->counter)
|
: "=&r" (temp), "=m" (v->counter)
|
||||||
: "Ir" (i), "m" (v->counter));
|
: "Ir" (i), "m" (v->counter));
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -514,12 +514,12 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
|
||||||
*/
|
*/
|
||||||
static __inline__ long atomic64_add_return(long i, atomic64_t * v)
|
static __inline__ long atomic64_add_return(long i, atomic64_t * v)
|
||||||
{
|
{
|
||||||
unsigned long result;
|
long result;
|
||||||
|
|
||||||
smp_llsc_mb();
|
smp_llsc_mb();
|
||||||
|
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -533,7 +533,7 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
|
||||||
: "Ir" (i), "m" (v->counter)
|
: "Ir" (i), "m" (v->counter)
|
||||||
: "memory");
|
: "memory");
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -566,12 +566,12 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
|
||||||
|
|
||||||
static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
||||||
{
|
{
|
||||||
unsigned long result;
|
long result;
|
||||||
|
|
||||||
smp_llsc_mb();
|
smp_llsc_mb();
|
||||||
|
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -585,7 +585,7 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
||||||
: "Ir" (i), "m" (v->counter)
|
: "Ir" (i), "m" (v->counter)
|
||||||
: "memory");
|
: "memory");
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -626,12 +626,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
||||||
*/
|
*/
|
||||||
static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
|
static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
|
||||||
{
|
{
|
||||||
unsigned long result;
|
long result;
|
||||||
|
|
||||||
smp_llsc_mb();
|
smp_llsc_mb();
|
||||||
|
|
||||||
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
if (cpu_has_llsc && R10000_LLSC_WAR) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
@ -649,7 +649,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
|
||||||
: "Ir" (i), "m" (v->counter)
|
: "Ir" (i), "m" (v->counter)
|
||||||
: "memory");
|
: "memory");
|
||||||
} else if (cpu_has_llsc) {
|
} else if (cpu_has_llsc) {
|
||||||
unsigned long temp;
|
long temp;
|
||||||
|
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
" .set mips3 \n"
|
" .set mips3 \n"
|
||||||
|
|
|
||||||
|
|
@ -80,11 +80,8 @@ struct rb532_gpio_reg {
|
||||||
/* Compact Flash GPIO pin */
|
/* Compact Flash GPIO pin */
|
||||||
#define CF_GPIO_NUM 13
|
#define CF_GPIO_NUM 13
|
||||||
|
|
||||||
extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val);
|
|
||||||
extern unsigned get_434_reg(unsigned reg_offs);
|
|
||||||
extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
|
|
||||||
extern unsigned char get_latch_u5(void);
|
|
||||||
extern void rb532_gpio_set_ilevel(int bit, unsigned gpio);
|
extern void rb532_gpio_set_ilevel(int bit, unsigned gpio);
|
||||||
extern void rb532_gpio_set_istat(int bit, unsigned gpio);
|
extern void rb532_gpio_set_istat(int bit, unsigned gpio);
|
||||||
|
extern void rb532_gpio_set_func(unsigned gpio);
|
||||||
|
|
||||||
#endif /* _RC32434_GPIO_H_ */
|
#endif /* _RC32434_GPIO_H_ */
|
||||||
|
|
|
||||||
|
|
@ -30,4 +30,7 @@
|
||||||
#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
|
#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
|
||||||
#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
|
#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
|
||||||
|
|
||||||
|
#define GPIO_MAPPED_IRQ_BASE GROUP4_IRQ_BASE
|
||||||
|
#define GPIO_MAPPED_IRQ_GROUP 4
|
||||||
|
|
||||||
#endif /* __ASM_RC32434_IRQ_H */
|
#endif /* __ASM_RC32434_IRQ_H */
|
||||||
|
|
|
||||||
|
|
@ -83,4 +83,7 @@ struct mpmc_device {
|
||||||
void __iomem *base;
|
void __iomem *base;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
|
||||||
|
extern unsigned char get_latch_u5(void);
|
||||||
|
|
||||||
#endif /* __ASM_RC32434_RB_H */
|
#endif /* __ASM_RC32434_RB_H */
|
||||||
|
|
|
||||||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue