drm/radeon: update comments to clarify VM setup (v2)
The actual set up and assignment of VM page tables is done on the fly in radeon_gart.c. v2: update vm size comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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3 changed files with 12 additions and 3 deletions
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@ -770,6 +770,10 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(0x15DC, 0);
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/* empty context1-7 */
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/* Assign the pt base to something valid for now; the pts used for
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* the VMs are determined by the application and setup and assigned
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* on the fly in the vm part of radeon_gart.c
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*/
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for (i = 1; i < 8; i++) {
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WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0);
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WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), 0);
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@ -1018,6 +1018,10 @@ int radeon_device_init(struct radeon_device *rdev,
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return r;
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/* initialize vm here */
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mutex_init(&rdev->vm_manager.lock);
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/* Adjust VM size here.
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* Currently set to 4GB ((1 << 20) 4k pages).
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* Max GPUVM size for cayman and SI is 40 bits.
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*/
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rdev->vm_manager.max_pfn = 1 << 20;
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INIT_LIST_HEAD(&rdev->vm_manager.lru_vm);
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@ -2407,12 +2407,13 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(0x15DC, 0);
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/* empty context1-15 */
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/* FIXME start with 4G, once using 2 level pt switch to full
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* vm size space
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*/
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/* set vm size, must be a multiple of 4 */
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WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);
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WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn);
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/* Assign the pt base to something valid for now; the pts used for
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* the VMs are determined by the application and setup and assigned
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* on the fly in the vm part of radeon_gart.c
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*/
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for (i = 1; i < 16; i++) {
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if (i < 8)
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WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
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