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Blackfin arch: Fix bug missing L2_MEMORY definition for EZKIT-BF561 compiling error

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Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Robin Getz 2007-09-13 11:49:33 +08:00 committed by Bryan Wu
parent 4d5f4ed3fb
commit 2296fb7ff0
1 changed files with 3 additions and 1 deletions
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4
include/asm-blackfin/cplb.h
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@ -30,7 +30,8 @@
#ifndef _CPLB_H #ifndef _CPLB_H
#define _CPLB_H #define _CPLB_H
# include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/mach/anomaly.h>
#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO) #define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK) #define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
@ -54,6 +55,7 @@
#endif #endif
#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) #define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
#define L2_MEMORY (CPLB_COMMON)
#define SDRAM_DNON_CHBL (CPLB_COMMON) #define SDRAM_DNON_CHBL (CPLB_COMMON)
#define SDRAM_EBIU (CPLB_COMMON) #define SDRAM_EBIU (CPLB_COMMON)
#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY) #define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)