Blackfin arch: Fix bug missing L2_MEMORY definition for EZKIT-BF561 compiling error
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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1 changed files with 3 additions and 1 deletions
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@ -30,7 +30,8 @@
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#ifndef _CPLB_H
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#define _CPLB_H
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# include <asm/blackfin.h>
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#include <asm/blackfin.h>
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#include <asm/mach/anomaly.h>
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#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
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#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
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@ -54,6 +55,7 @@
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#endif
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#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
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#define L2_MEMORY (CPLB_COMMON)
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#define SDRAM_DNON_CHBL (CPLB_COMMON)
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#define SDRAM_EBIU (CPLB_COMMON)
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#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
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