clockevents/drivers/dw_apb: Migrate to new 'set-state' interface
Migrate dw_apb driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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5c78b26545
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226be92b3e
1 changed files with 80 additions and 61 deletions
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@ -110,37 +110,28 @@ static void apbt_enable_int(struct dw_apb_timer *timer)
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apbt_writel(timer, ctrl, APBTMR_N_CONTROL);
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}
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static void apbt_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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static int apbt_shutdown(struct clock_event_device *evt)
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{
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unsigned long ctrl;
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unsigned long period;
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struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
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unsigned long ctrl;
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pr_debug("%s CPU %d mode=%d\n", __func__,
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cpumask_first(evt->cpumask),
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mode);
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pr_debug("%s CPU %d state=shutdown\n", __func__,
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cpumask_first(evt->cpumask));
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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period = DIV_ROUND_UP(dw_ced->timer.freq, HZ);
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ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);
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ctrl |= APBTMR_CONTROL_MODE_PERIODIC;
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apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);
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/*
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* DW APB p. 46, have to disable timer before load counter,
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* may cause sync problem.
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*/
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ctrl &= ~APBTMR_CONTROL_ENABLE;
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apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);
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udelay(1);
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pr_debug("Setting clock period %lu for HZ %d\n", period, HZ);
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apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT);
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ctrl |= APBTMR_CONTROL_ENABLE;
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apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);
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break;
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return 0;
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}
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static int apbt_set_oneshot(struct clock_event_device *evt)
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{
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struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
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unsigned long ctrl;
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pr_debug("%s CPU %d state=oneshot\n", __func__,
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cpumask_first(evt->cpumask));
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case CLOCK_EVT_MODE_ONESHOT:
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ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);
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/*
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* set free running mode, this mode will let timer reload max
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@ -162,19 +153,44 @@ static void apbt_set_mode(enum clock_event_mode mode,
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ctrl &= ~APBTMR_CONTROL_INT;
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ctrl |= APBTMR_CONTROL_ENABLE;
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apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);
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break;
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return 0;
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}
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static int apbt_set_periodic(struct clock_event_device *evt)
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{
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struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
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unsigned long period = DIV_ROUND_UP(dw_ced->timer.freq, HZ);
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unsigned long ctrl;
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pr_debug("%s CPU %d state=periodic\n", __func__,
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cpumask_first(evt->cpumask));
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);
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ctrl |= APBTMR_CONTROL_MODE_PERIODIC;
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apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);
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/*
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* DW APB p. 46, have to disable timer before load counter,
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* may cause sync problem.
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*/
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ctrl &= ~APBTMR_CONTROL_ENABLE;
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apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);
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break;
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udelay(1);
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pr_debug("Setting clock period %lu for HZ %d\n", period, HZ);
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apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT);
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ctrl |= APBTMR_CONTROL_ENABLE;
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apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);
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return 0;
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}
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static int apbt_resume(struct clock_event_device *evt)
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{
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struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
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pr_debug("%s CPU %d state=resume\n", __func__,
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cpumask_first(evt->cpumask));
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case CLOCK_EVT_MODE_RESUME:
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apbt_enable_int(&dw_ced->timer);
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break;
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}
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return 0;
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}
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static int apbt_next_event(unsigned long delta,
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@ -233,7 +249,10 @@ dw_apb_clockevent_init(int cpu, const char *name, unsigned rating,
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dw_ced->ced.min_delta_ns = clockevent_delta2ns(5000, &dw_ced->ced);
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dw_ced->ced.cpumask = cpumask_of(cpu);
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dw_ced->ced.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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dw_ced->ced.set_mode = apbt_set_mode;
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dw_ced->ced.set_state_shutdown = apbt_shutdown;
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dw_ced->ced.set_state_periodic = apbt_set_periodic;
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dw_ced->ced.set_state_oneshot = apbt_set_oneshot;
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dw_ced->ced.tick_resume = apbt_resume;
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dw_ced->ced.set_next_event = apbt_next_event;
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dw_ced->ced.irq = dw_ced->timer.irq;
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dw_ced->ced.rating = rating;
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