mmc: Test bus-width for old MMC devices
Some old MMC devices fail with the 4/8 bits the driver tries to use exclusively. This patch adds a test for the given bus setup and falls back to the lower bit mode (until 1-bit mode) when the test fails. [Major rework and refactoring by tiwai] [Quirk addition and many fixes by prakity] Signed-off-by: Aries Lee <arieslee@jmicron.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Philip Rakity <prakity@marvell.com> Tested-by: Philip Rakity <prakity@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
Aries Lee
Chris Ball
parent
e6f29a8dc1
commit
22113efd00
7 changed files with 158 additions and 29 deletions
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@ -534,39 +534,57 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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*/
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if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
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(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
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unsigned ext_csd_bit, bus_width;
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static unsigned ext_csd_bits[][2] = {
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{ EXT_CSD_BUS_WIDTH_8, EXT_CSD_DDR_BUS_WIDTH_8 },
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{ EXT_CSD_BUS_WIDTH_4, EXT_CSD_DDR_BUS_WIDTH_4 },
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{ EXT_CSD_BUS_WIDTH_1, EXT_CSD_BUS_WIDTH_1 },
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};
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static unsigned bus_widths[] = {
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MMC_BUS_WIDTH_8,
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MMC_BUS_WIDTH_4,
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MMC_BUS_WIDTH_1
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};
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unsigned idx, bus_width = 0;
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if (host->caps & MMC_CAP_8_BIT_DATA) {
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if (ddr)
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ext_csd_bit = EXT_CSD_DDR_BUS_WIDTH_8;
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else
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ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
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bus_width = MMC_BUS_WIDTH_8;
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} else {
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if (ddr)
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ext_csd_bit = EXT_CSD_DDR_BUS_WIDTH_4;
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else
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ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
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bus_width = MMC_BUS_WIDTH_4;
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if (host->caps & MMC_CAP_8_BIT_DATA)
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idx = 0;
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else
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idx = 1;
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for (; idx < ARRAY_SIZE(bus_widths); idx++) {
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bus_width = bus_widths[idx];
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if (bus_width == MMC_BUS_WIDTH_1)
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ddr = 0; /* no DDR for 1-bit width */
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err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
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EXT_CSD_BUS_WIDTH,
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ext_csd_bits[idx][0]);
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if (!err) {
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/*
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* If controller can't handle bus width test,
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* use the highest bus width to maintain
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* compatibility with previous MMC behavior.
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*/
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if (!(host->caps & MMC_CAP_BUS_WIDTH_TEST))
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break;
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mmc_set_bus_width_ddr(card->host,
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bus_width, MMC_SDR_MODE);
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err = mmc_bus_test(card, bus_width);
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if (!err)
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break;
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}
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}
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err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
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EXT_CSD_BUS_WIDTH, ext_csd_bit);
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if (err && err != -EBADMSG)
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goto free_card;
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if (!err && ddr) {
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err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
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EXT_CSD_BUS_WIDTH,
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ext_csd_bits[idx][1]);
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}
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if (err) {
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printk(KERN_WARNING "%s: switch to bus width %d ddr %d "
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"failed\n", mmc_hostname(card->host),
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1 << bus_width, ddr);
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err = 0;
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} else {
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if (ddr)
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mmc_card_set_ddr_mode(card);
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else
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ddr = MMC_SDR_MODE;
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"failed\n", mmc_hostname(card->host),
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1 << bus_width, ddr);
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goto free_card;
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} else if (ddr) {
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mmc_card_set_ddr_mode(card);
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mmc_set_bus_width_ddr(card->host, bus_width, ddr);
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}
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}
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@ -462,3 +462,104 @@ int mmc_send_status(struct mmc_card *card, u32 *status)
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return 0;
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}
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static int
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mmc_send_bus_test(struct mmc_card *card, struct mmc_host *host, u8 opcode,
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u8 len)
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{
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struct mmc_request mrq;
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struct mmc_command cmd;
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struct mmc_data data;
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struct scatterlist sg;
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u8 *data_buf;
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u8 *test_buf;
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int i, err;
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static u8 testdata_8bit[8] = { 0x55, 0xaa, 0, 0, 0, 0, 0, 0 };
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static u8 testdata_4bit[4] = { 0x5a, 0, 0, 0 };
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/* dma onto stack is unsafe/nonportable, but callers to this
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* routine normally provide temporary on-stack buffers ...
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*/
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data_buf = kmalloc(len, GFP_KERNEL);
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if (!data_buf)
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return -ENOMEM;
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if (len == 8)
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test_buf = testdata_8bit;
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else if (len == 4)
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test_buf = testdata_4bit;
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else {
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printk(KERN_ERR "%s: Invalid bus_width %d\n",
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mmc_hostname(host), len);
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kfree(data_buf);
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return -EINVAL;
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}
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if (opcode == MMC_BUS_TEST_W)
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memcpy(data_buf, test_buf, len);
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memset(&mrq, 0, sizeof(struct mmc_request));
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memset(&cmd, 0, sizeof(struct mmc_command));
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memset(&data, 0, sizeof(struct mmc_data));
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mrq.cmd = &cmd;
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mrq.data = &data;
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cmd.opcode = opcode;
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cmd.arg = 0;
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/* NOTE HACK: the MMC_RSP_SPI_R1 is always correct here, but we
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* rely on callers to never use this with "native" calls for reading
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* CSD or CID. Native versions of those commands use the R2 type,
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* not R1 plus a data block.
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*/
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cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
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data.blksz = len;
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data.blocks = 1;
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if (opcode == MMC_BUS_TEST_R)
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data.flags = MMC_DATA_READ;
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else
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data.flags = MMC_DATA_WRITE;
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data.sg = &sg;
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data.sg_len = 1;
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sg_init_one(&sg, data_buf, len);
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mmc_wait_for_req(host, &mrq);
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err = 0;
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if (opcode == MMC_BUS_TEST_R) {
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for (i = 0; i < len / 4; i++)
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if ((test_buf[i] ^ data_buf[i]) != 0xff) {
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err = -EIO;
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break;
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}
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}
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kfree(data_buf);
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if (cmd.error)
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return cmd.error;
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if (data.error)
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return data.error;
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return err;
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}
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int mmc_bus_test(struct mmc_card *card, u8 bus_width)
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{
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int err, width;
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if (bus_width == MMC_BUS_WIDTH_8)
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width = 8;
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else if (bus_width == MMC_BUS_WIDTH_4)
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width = 4;
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else if (bus_width == MMC_BUS_WIDTH_1)
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return 0; /* no need for test */
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else
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return -EINVAL;
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/*
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* Ignore errors from BUS_TEST_W. BUS_TEST_R will fail if there
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* is a problem. This improves chances that the test will work.
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*/
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mmc_send_bus_test(card, card->host, MMC_BUS_TEST_W, width);
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err = mmc_send_bus_test(card, card->host, MMC_BUS_TEST_R, width);
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return err;
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}
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@ -26,6 +26,7 @@ int mmc_send_cid(struct mmc_host *host, u32 *cid);
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int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp);
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int mmc_spi_set_crc(struct mmc_host *host, int use_crc);
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int mmc_card_sleepawake(struct mmc_host *host, int sleep);
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int mmc_bus_test(struct mmc_card *card, u8 bus_width);
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#endif
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@ -23,6 +23,7 @@
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#include <linux/leds.h>
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#include <linux/mmc/mmc.h>
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#include <linux/mmc/host.h>
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#include "sdhci.h"
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@ -1521,7 +1522,11 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
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if (intmask & SDHCI_INT_DATA_TIMEOUT)
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host->data->error = -ETIMEDOUT;
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else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
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else if (intmask & SDHCI_INT_DATA_END_BIT)
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host->data->error = -EILSEQ;
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else if ((intmask & SDHCI_INT_DATA_CRC) &&
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SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND))
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!= MMC_BUS_TEST_R)
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host->data->error = -EILSEQ;
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else if (intmask & SDHCI_INT_ADMA_ERROR) {
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printk(KERN_ERR "%s: ADMA error\n", mmc_hostname(host->mmc));
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@ -52,6 +52,7 @@
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#define SDHCI_CMD_RESP_SHORT_BUSY 0x03
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#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff))
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#define SDHCI_GET_CMD(c) ((c>>8) & 0x3f)
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#define SDHCI_RESPONSE 0x10
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@ -172,6 +172,7 @@ struct mmc_host {
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#define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
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/* DDR mode at 1.2V */
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#define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
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#define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
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mmc_pm_flag_t pm_caps; /* supported pm features */
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@ -40,7 +40,9 @@
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#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
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#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
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#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
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#define MMC_BUS_TEST_R 14 /* adtc R1 */
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#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
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#define MMC_BUS_TEST_W 19 /* adtc R1 */
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#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
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#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
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