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ste_dma40: move mode_opt to separate config

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Defaults are "basic mode" for physical channels, and "logical source
logical destination" for logical channels.

Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Rabin Vincent 2010-10-12 13:00:52 +00:00 committed by Dan Williams
parent 38bdbf020a
commit 20a5b6d043
4 changed files with 44 additions and 13 deletions
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4
arch/arm/mach-ux500/devices-db8500.c
View file

@ -132,7 +132,6 @@ static struct resource dma40_resources[] = {
/* Default configuration for physcial memcpy */ /* Default configuration for physcial memcpy */
struct stedma40_chan_cfg dma40_memcpy_conf_phy = { struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
.channel_type = STEDMA40_PCHAN_BASIC_MODE,
.mode = STEDMA40_MODE_PHYSICAL, .mode = STEDMA40_MODE_PHYSICAL,
.dir = STEDMA40_MEM_TO_MEM, .dir = STEDMA40_MEM_TO_MEM,
@ -148,8 +147,7 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
}; };
/* Default configuration for logical memcpy */ /* Default configuration for logical memcpy */
struct stedma40_chan_cfg dma40_memcpy_conf_log = { struct stedma40_chan_cfg dma40_memcpy_conf_log = {
.channel_type = (STEDMA40_LCHAN_SRC_LOG_DST_LOG | .channel_type = STEDMA40_NO_TIM_FOR_LINK,
STEDMA40_NO_TIM_FOR_LINK),
.dir = STEDMA40_MEM_TO_MEM, .dir = STEDMA40_MEM_TO_MEM,
.src_info.endianess = STEDMA40_LITTLE_ENDIAN, .src_info.endianess = STEDMA40_LITTLE_ENDIAN,

18
arch/arm/plat-nomadik/include/plat/ste_dma40.h
View file

@ -29,14 +29,14 @@ enum stedma40_mode {
STEDMA40_MODE_OPERATION, STEDMA40_MODE_OPERATION,
}; };
/* Mode options */ enum stedma40_mode_opt {
#define STEDMA40_INFO_CH_MODE_OPT_POS 8 STEDMA40_PCHAN_BASIC_MODE = 0,
#define STEDMA40_PCHAN_BASIC_MODE (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS) STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
#define STEDMA40_PCHAN_MODULO_MODE (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS) STEDMA40_PCHAN_MODULO_MODE,
#define STEDMA40_PCHAN_DOUBLE_DST_MODE (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS) STEDMA40_PCHAN_DOUBLE_DST_MODE,
#define STEDMA40_LCHAN_SRC_PHY_DST_LOG (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS) STEDMA40_LCHAN_SRC_PHY_DST_LOG,
#define STEDMA40_LCHAN_SRC_LOG_DST_PHS (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS) STEDMA40_LCHAN_SRC_LOG_DST_PHY,
#define STEDMA40_LCHAN_SRC_LOG_DST_LOG (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS) };
/* Interrupt */ /* Interrupt */
#define STEDMA40_INFO_TIM_POS 10 #define STEDMA40_INFO_TIM_POS 10
@ -116,6 +116,7 @@ struct stedma40_half_channel_info {
* @channel_type: priority, mode, mode options and interrupt configuration. * @channel_type: priority, mode, mode options and interrupt configuration.
* @high_priority: true if high-priority * @high_priority: true if high-priority
* @mode: channel mode: physical, logical, or operation * @mode: channel mode: physical, logical, or operation
* @mode_opt: options for the chosen channel mode
* @src_dev_type: Src device type * @src_dev_type: Src device type
* @dst_dev_type: Dst device type * @dst_dev_type: Dst device type
* @src_info: Parameters for dst half channel * @src_info: Parameters for dst half channel
@ -131,6 +132,7 @@ struct stedma40_chan_cfg {
unsigned int channel_type; unsigned int channel_type;
bool high_priority; bool high_priority;
enum stedma40_mode mode; enum stedma40_mode mode;
enum stedma40_mode_opt mode_opt;
int src_dev_type; int src_dev_type;
int dst_dev_type; int dst_dev_type;
struct stedma40_half_channel_info src_info; struct stedma40_half_channel_info src_info;

28
drivers/dma/ste_dma40.c
View file

@ -693,6 +693,31 @@ static u32 d40_chan_has_events(struct d40_chan *d40c)
return val; return val;
} }
static u32 d40_get_prmo(struct d40_chan *d40c)
{
static const unsigned int phy_map[] = {
[STEDMA40_PCHAN_BASIC_MODE]
= D40_DREG_PRMO_PCHAN_BASIC,
[STEDMA40_PCHAN_MODULO_MODE]
= D40_DREG_PRMO_PCHAN_MODULO,
[STEDMA40_PCHAN_DOUBLE_DST_MODE]
= D40_DREG_PRMO_PCHAN_DOUBLE_DST,
};
static const unsigned int log_map[] = {
[STEDMA40_LCHAN_SRC_PHY_DST_LOG]
= D40_DREG_PRMO_LCHAN_SRC_PHY_DST_LOG,
[STEDMA40_LCHAN_SRC_LOG_DST_PHY]
= D40_DREG_PRMO_LCHAN_SRC_LOG_DST_PHY,
[STEDMA40_LCHAN_SRC_LOG_DST_LOG]
= D40_DREG_PRMO_LCHAN_SRC_LOG_DST_LOG,
};
if (d40c->log_num == D40_PHY_CHAN)
return phy_map[d40c->dma_cfg.mode_opt];
else
return log_map[d40c->dma_cfg.mode_opt];
}
static void d40_config_write(struct d40_chan *d40c) static void d40_config_write(struct d40_chan *d40c)
{ {
u32 addr_base; u32 addr_base;
@ -706,8 +731,7 @@ static void d40_config_write(struct d40_chan *d40c)
writel(var, d40c->base->virtbase + D40_DREG_PRMSE + addr_base); writel(var, d40c->base->virtbase + D40_DREG_PRMSE + addr_base);
/* Setup operational mode option register */ /* Setup operational mode option register */
var = ((d40c->dma_cfg.channel_type >> STEDMA40_INFO_CH_MODE_OPT_POS) & var = d40_get_prmo(d40c) << D40_CHAN_POS(d40c->phy_chan->num);
0x3) << D40_CHAN_POS(d40c->phy_chan->num);
writel(var, d40c->base->virtbase + D40_DREG_PRMOE + addr_base); writel(var, d40c->base->virtbase + D40_DREG_PRMOE + addr_base);

7
drivers/dma/ste_dma40_ll.h
View file

@ -130,6 +130,13 @@
#define D40_DREG_PRMSO 0x014 #define D40_DREG_PRMSO 0x014
#define D40_DREG_PRMOE 0x018 #define D40_DREG_PRMOE 0x018
#define D40_DREG_PRMOO 0x01C #define D40_DREG_PRMOO 0x01C
#define D40_DREG_PRMO_PCHAN_BASIC 0x1
#define D40_DREG_PRMO_PCHAN_MODULO 0x2
#define D40_DREG_PRMO_PCHAN_DOUBLE_DST 0x3
#define D40_DREG_PRMO_LCHAN_SRC_PHY_DST_LOG 0x1
#define D40_DREG_PRMO_LCHAN_SRC_LOG_DST_PHY 0x2
#define D40_DREG_PRMO_LCHAN_SRC_LOG_DST_LOG 0x3
#define D40_DREG_LCPA 0x020 #define D40_DREG_LCPA 0x020
#define D40_DREG_LCLA 0x024 #define D40_DREG_LCLA 0x024
#define D40_DREG_ACTIVE 0x050 #define D40_DREG_ACTIVE 0x050