xtensa: use the new byteorder headers
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
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1 changed files with 15 additions and 17 deletions
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@ -14,7 +14,17 @@
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#include <asm/types.h>
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#include <linux/compiler.h>
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static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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#ifdef __XTENSA_EL__
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# define __LITTLE_ENDIAN
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#elif defined(__XTENSA_EB__)
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# define __BIG_ENDIAN
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#else
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# error processor byte order undefined!
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#endif
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#define __SWAB_64_THRU_32__
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static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
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{
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__u32 res;
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/* instruction sequence from Xtensa ISA release 2/2000 */
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@ -28,8 +38,9 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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);
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return res;
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}
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#define __arch_swab32 __arch_swab32
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static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
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static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
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{
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/* Given that 'short' values are signed (i.e., can be negative),
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* we cannot assume that the upper 16-bits of the register are
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@ -62,21 +73,8 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
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return res;
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}
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#define __arch_swab16 __arch_swab16
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#define __arch__swab32(x) ___arch__swab32(x)
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#define __arch__swab16(x) ___arch__swab16(x)
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#ifdef __XTENSA_EL__
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# include <linux/byteorder/little_endian.h>
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#elif defined(__XTENSA_EB__)
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# include <linux/byteorder/big_endian.h>
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#else
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# error processor byte order undefined!
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#endif
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#include <linux/byteorder.h>
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#endif /* _XTENSA_BYTEORDER_H */
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