Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

ASoC: Use standard cache sync code in wm8961

Browse source 
We write the reset register with the default value so it should not be
mistakenly written.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Mark Brown 2011-12-16 07:57:11 +01:00
parent 2ec2a9061d
commit 202a51a8d9
1 changed files with 1 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

13
sound/soc/codecs/wm8961.c
View file

@ -1047,18 +1047,7 @@ static int wm8961_suspend(struct snd_soc_codec *codec)
static int wm8961_resume(struct snd_soc_codec *codec)
{
u16 *reg_cache = codec->reg_cache;
int i;
for (i = 0; i < codec->driver->reg_cache_size; i++) {
if (reg_cache[i] == wm8961_reg_defaults[i])
continue;
if (i == WM8961_SOFTWARE_RESET)
continue;
snd_soc_write(codec, i, reg_cache[i]);
}
snd_soc_cache_sync(codec);
wm8961_set_bias_level(codec, SND_SOC_BIAS_STANDBY);