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[IA64] Disable/re-enable CPE interrupts on Altix

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When the CPE handler encounters too many CPEs (such as a solid single
bit memory error), it sets up a polling timer and disables the CPE
interrupt (to avoid excessive overhead logging the stream of single
bit errors).  disable_irq_nosync() calls chip->disable() to provide
a chipset specifiec interface for disabling the interrupt.  This patch
adds the Altix specific support to disable and re-enable the CPE interrupt.

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Russ Anderson 2007-10-31 11:10:38 -05:00 committed by Tony Luck
parent adb34022eb
commit 1f3b6045f7
2 changed files with 8 additions and 2 deletions
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2
arch/ia64/kernel/mca.c
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@ -571,7 +571,7 @@ ia64_mca_cpe_int_handler (int cpe_irq, void *arg)
* Outputs
* None
*/
static void __init
void
ia64_mca_register_cpev (int cpev)
{
/* Register the CPE interrupt vector with SAL */

8
arch/ia64/sn/kernel/irq.c
View file

@ -5,7 +5,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
#include <linux/irq.h>
@ -85,12 +85,18 @@ static void sn_shutdown_irq(unsigned int irq)
{
}
extern void ia64_mca_register_cpev(int);
static void sn_disable_irq(unsigned int irq)
{
if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
ia64_mca_register_cpev(0);
}
static void sn_enable_irq(unsigned int irq)
{
if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
ia64_mca_register_cpev(irq);
}
static void sn_ack_irq(unsigned int irq)