x86: x86 i387 cleanup
This removes all the old code that is no longer used after the i387 unification and cleanup. The i387_64.h is renamed to i387.h with no changes, but since it replaces the nonempty one-line stub i387.h it looks like a big diff and not a rename. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Roland McGrath
Ingo Molnar
parent
4421011120
commit
1eeaed7679
5 changed files with 374 additions and 824 deletions
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@ -1,181 +0,0 @@
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/*
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* Copyright 2002 Andi Kleen, SuSE Labs.
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* FXSAVE<->i387 conversion support. Based on code by Gareth Hughes.
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* This is used for ptrace, signals and coredumps in 32bit emulation.
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*/
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#include <linux/sched.h>
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#include <asm/sigcontext32.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/i387.h>
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static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
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{
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unsigned int tmp; /* to avoid 16 bit prefixes in the code */
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/* Transform each pair of bits into 01 (valid) or 00 (empty) */
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tmp = ~twd;
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tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
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/* and move the valid bits to the lower byte. */
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tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
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tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
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tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
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return tmp;
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}
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#define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
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#define FP_EXP_TAG_VALID 0
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#define FP_EXP_TAG_ZERO 1
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#define FP_EXP_TAG_SPECIAL 2
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#define FP_EXP_TAG_EMPTY 3
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static inline unsigned long twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
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{
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struct _fpxreg *st;
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unsigned long tos = (fxsave->swd >> 11) & 7;
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unsigned long twd = (unsigned long) fxsave->twd;
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unsigned long tag;
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unsigned long ret = 0xffff0000;
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int i;
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for (i = 0; i < 8; i++, twd >>= 1) {
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if (twd & 0x1) {
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st = FPREG_ADDR(fxsave, (i - tos) & 7);
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switch (st->exponent & 0x7fff) {
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case 0x7fff:
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tag = FP_EXP_TAG_SPECIAL;
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break;
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case 0x0000:
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if (!st->significand[0] &&
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!st->significand[1] &&
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!st->significand[2] &&
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!st->significand[3])
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tag = FP_EXP_TAG_ZERO;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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default:
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if (st->significand[3] & 0x8000)
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tag = FP_EXP_TAG_VALID;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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}
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} else {
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tag = FP_EXP_TAG_EMPTY;
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}
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ret |= tag << (2 * i);
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}
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return ret;
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}
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#define G(num, val) err |= __get_user(val, num + (u32 __user *)buf)
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static inline int convert_fxsr_from_user(struct i387_fxsave_struct *fxsave,
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struct _fpstate_ia32 __user *buf)
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{
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struct _fpxreg *to;
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struct _fpreg __user *from;
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int i, err = 0;
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u32 v;
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G(0, fxsave->cwd);
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G(1, fxsave->swd);
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G(2, fxsave->twd);
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fxsave->twd = twd_i387_to_fxsr(fxsave->twd);
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G(3, fxsave->rip);
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G(4, v);
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/* cs ignored */
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fxsave->fop = v>>16;
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G(5, fxsave->rdp);
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/* 6: ds ignored */
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if (err)
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return -1;
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to = (struct _fpxreg *)&fxsave->st_space[0];
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from = &buf->_st[0];
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for (i = 0; i < 8; i++, to++, from++) {
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if (__copy_from_user(to, from, sizeof(*from)))
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return -1;
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}
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return 0;
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}
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#define P(num, val) err |= __put_user(val, num + (u32 __user *)buf)
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static inline int convert_fxsr_to_user(struct _fpstate_ia32 __user *buf,
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struct i387_fxsave_struct *fxsave,
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struct pt_regs *regs,
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struct task_struct *tsk)
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{
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struct _fpreg __user *to;
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struct _fpxreg *from;
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int i, err = 0;
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u16 cs, ds;
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if (tsk == current) {
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/*
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* should be actually ds/cs at fpu exception time, but
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* that information is not available in 64bit mode.
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*/
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asm("movw %%ds,%0 " : "=r" (ds));
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asm("movw %%cs,%0 " : "=r" (cs));
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} else {
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/* ptrace. task has stopped. */
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ds = tsk->thread.ds;
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cs = regs->cs;
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}
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P(0, (u32)fxsave->cwd | 0xffff0000);
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P(1, (u32)fxsave->swd | 0xffff0000);
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P(2, twd_fxsr_to_i387(fxsave));
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P(3, (u32)fxsave->rip);
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P(4, cs | ((u32)fxsave->fop) << 16);
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P(5, fxsave->rdp);
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P(6, 0xffff0000 | ds);
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if (err)
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return -1;
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to = &buf->_st[0];
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from = (struct _fpxreg *) &fxsave->st_space[0];
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for (i = 0; i < 8; i++, to++, from++) {
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if (__copy_to_user(to, from, sizeof(*to)))
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return -1;
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}
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return 0;
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}
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int restore_i387_ia32(struct task_struct *tsk,
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struct _fpstate_ia32 __user *buf, int fsave)
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{
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clear_fpu(tsk);
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if (!fsave) {
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if (__copy_from_user(&tsk->thread.i387.fxsave,
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&buf->_fxsr_env[0],
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sizeof(struct i387_fxsave_struct)))
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return -1;
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tsk->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask;
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set_stopped_child_used_math(tsk);
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}
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return convert_fxsr_from_user(&tsk->thread.i387.fxsave, buf);
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}
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int save_i387_ia32(struct task_struct *tsk, struct _fpstate_ia32 __user *buf,
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struct pt_regs *regs, int fsave)
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{
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int err = 0;
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init_fpu(tsk);
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if (convert_fxsr_to_user(buf, &tsk->thread.i387.fxsave, regs, tsk))
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return -1;
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if (fsave)
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return 0;
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err |= __put_user(tsk->thread.i387.fxsave.swd, &buf->status);
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err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
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err |= __copy_to_user(&buf->_fxsr_env[0], &tsk->thread.i387.fxsave,
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sizeof(struct i387_fxsave_struct));
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return err ? -1 : 1;
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}
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@ -1,119 +0,0 @@
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/*
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* Copyright (C) 1994 Linus Torvalds
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* Copyright (C) 2002 Andi Kleen, SuSE Labs
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*
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* x86-64 rework 2002 Andi Kleen.
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* Does direct fxsave in and out of user space now for signal handlers.
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* All the FSAVE<->FXSAVE conversion code has been moved to the 32bit emulation,
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* the 64bit user space sees a FXSAVE frame directly.
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*/
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <asm/processor.h>
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#include <asm/i387.h>
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#include <asm/sigcontext.h>
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#include <asm/user.h>
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#include <asm/ptrace.h>
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#include <asm/uaccess.h>
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unsigned int mxcsr_feature_mask __read_mostly = 0xffffffff;
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void mxcsr_feature_mask_init(void)
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{
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unsigned int mask;
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clts();
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memset(¤t->thread.i387.fxsave, 0, sizeof(struct i387_fxsave_struct));
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asm volatile("fxsave %0" : : "m" (current->thread.i387.fxsave));
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mask = current->thread.i387.fxsave.mxcsr_mask;
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if (mask == 0) mask = 0x0000ffbf;
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mxcsr_feature_mask &= mask;
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stts();
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}
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/*
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* Called at bootup to set up the initial FPU state that is later cloned
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* into all processes.
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*/
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void __cpuinit fpu_init(void)
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{
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unsigned long oldcr0 = read_cr0();
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extern void __bad_fxsave_alignment(void);
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if (offsetof(struct task_struct, thread.i387.fxsave) & 15)
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__bad_fxsave_alignment();
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set_in_cr4(X86_CR4_OSFXSR);
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set_in_cr4(X86_CR4_OSXMMEXCPT);
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write_cr0(oldcr0 & ~((1UL<<3)|(1UL<<2))); /* clear TS and EM */
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mxcsr_feature_mask_init();
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/* clean state in init */
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current_thread_info()->status = 0;
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clear_used_math();
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}
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void init_fpu(struct task_struct *child)
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{
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if (tsk_used_math(child)) {
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if (child == current)
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unlazy_fpu(child);
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return;
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}
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memset(&child->thread.i387.fxsave, 0, sizeof(struct i387_fxsave_struct));
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child->thread.i387.fxsave.cwd = 0x37f;
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child->thread.i387.fxsave.mxcsr = 0x1f80;
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/* only the device not available exception or ptrace can call init_fpu */
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set_stopped_child_used_math(child);
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}
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/*
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* ptrace request handlers.
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*/
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int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *tsk)
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{
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init_fpu(tsk);
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return __copy_to_user(buf, &tsk->thread.i387.fxsave,
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sizeof(struct user_i387_struct)) ? -EFAULT : 0;
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}
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int set_fpregs(struct task_struct *tsk, struct user_i387_struct __user *buf)
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{
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if (__copy_from_user(&tsk->thread.i387.fxsave, buf,
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sizeof(struct user_i387_struct)))
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return -EFAULT;
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return 0;
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}
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/*
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* FPU state for core dumps.
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*/
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int dump_fpu( struct pt_regs *regs, struct user_i387_struct *fpu )
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{
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struct task_struct *tsk = current;
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if (!used_math())
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return 0;
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unlazy_fpu(tsk);
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memcpy(fpu, &tsk->thread.i387.fxsave, sizeof(struct user_i387_struct));
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return 1;
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}
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int dump_task_fpu(struct task_struct *tsk, struct user_i387_struct *fpu)
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{
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int fpvalid = !!tsk_used_math(tsk);
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if (fpvalid) {
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if (tsk == current)
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unlazy_fpu(tsk);
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memcpy(fpu, &tsk->thread.i387.fxsave, sizeof(struct user_i387_struct));
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}
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return fpvalid;
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}
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@ -1 +1,374 @@
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#include "i387_64.h"
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/*
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* Copyright (C) 1994 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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* x86-64 work by Andi Kleen 2002
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*/
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#ifndef _ASM_X86_I387_H
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#define _ASM_X86_I387_H
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <linux/regset.h>
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#include <asm/processor.h>
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#include <asm/sigcontext.h>
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#include <asm/user.h>
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#include <asm/uaccess.h>
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extern void fpu_init(void);
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extern unsigned int mxcsr_feature_mask;
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extern void mxcsr_feature_mask_init(void);
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extern void init_fpu(struct task_struct *child);
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extern asmlinkage void math_state_restore(void);
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extern user_regset_active_fn fpregs_active, xfpregs_active;
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extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
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extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
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#ifdef CONFIG_IA32_EMULATION
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struct _fpstate_ia32;
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extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
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extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
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#endif
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#ifdef CONFIG_X86_64
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/* Ignore delayed exceptions from user space */
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static inline void tolerant_fwait(void)
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{
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asm volatile("1: fwait\n"
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"2:\n"
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" .section __ex_table,\"a\"\n"
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" .align 8\n"
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" .quad 1b,2b\n"
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" .previous\n");
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}
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static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
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{
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int err;
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asm volatile("1: rex64/fxrstor (%[fx])\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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".section __ex_table,\"a\"\n"
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" .align 8\n"
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" .quad 1b,3b\n"
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".previous"
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: [err] "=r" (err)
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#if 0 /* See comment in __save_init_fpu() below. */
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: [fx] "r" (fx), "m" (*fx), "0" (0));
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#else
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: [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
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#endif
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if (unlikely(err))
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init_fpu(current);
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return err;
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}
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#define X87_FSW_ES (1 << 7) /* Exception Summary */
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/* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
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is pending. Clear the x87 state here by setting it to fixed
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values. The kernel data segment can be sometimes 0 and sometimes
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new user value. Both should be ok.
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Use the PDA as safe address because it should be already in L1. */
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static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
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{
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if (unlikely(fx->swd & X87_FSW_ES))
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asm volatile("fnclex");
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alternative_input(ASM_NOP8 ASM_NOP2,
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" emms\n" /* clear stack tags */
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" fildl %%gs:0", /* load to clear state */
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X86_FEATURE_FXSAVE_LEAK);
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}
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static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
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{
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int err;
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asm volatile("1: rex64/fxsave (%[fx])\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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".section __ex_table,\"a\"\n"
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" .align 8\n"
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" .quad 1b,3b\n"
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".previous"
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: [err] "=r" (err), "=m" (*fx)
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#if 0 /* See comment in __fxsave_clear() below. */
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: [fx] "r" (fx), "0" (0));
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#else
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: [fx] "cdaSDb" (fx), "0" (0));
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#endif
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if (unlikely(err) && __clear_user(fx, sizeof(struct i387_fxsave_struct)))
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err = -EFAULT;
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/* No need to clear here because the caller clears USED_MATH */
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return err;
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}
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static inline void __save_init_fpu(struct task_struct *tsk)
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{
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/* Using "rex64; fxsave %0" is broken because, if the memory operand
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uses any extended registers for addressing, a second REX prefix
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will be generated (to the assembler, rex64 followed by semicolon
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is a separate instruction), and hence the 64-bitness is lost. */
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#if 0
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/* Using "fxsaveq %0" would be the ideal choice, but is only supported
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starting with gas 2.16. */
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__asm__ __volatile__("fxsaveq %0"
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: "=m" (tsk->thread.i387.fxsave));
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#elif 0
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/* Using, as a workaround, the properly prefixed form below isn't
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accepted by any binutils version so far released, complaining that
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the same type of prefix is used twice if an extended register is
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needed for addressing (fix submitted to mainline 2005-11-21). */
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__asm__ __volatile__("rex64/fxsave %0"
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: "=m" (tsk->thread.i387.fxsave));
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||||
#else
|
||||
/* This, however, we can work around by forcing the compiler to select
|
||||
an addressing mode that doesn't require extended registers. */
|
||||
__asm__ __volatile__("rex64/fxsave %P2(%1)"
|
||||
: "=m" (tsk->thread.i387.fxsave)
|
||||
: "cdaSDb" (tsk),
|
||||
"i" (offsetof(__typeof__(*tsk),
|
||||
thread.i387.fxsave)));
|
||||
#endif
|
||||
clear_fpu_state(&tsk->thread.i387.fxsave);
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
}
|
||||
|
||||
/*
|
||||
* Signal frame handlers.
|
||||
*/
|
||||
|
||||
static inline int save_i387(struct _fpstate __user *buf)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
int err = 0;
|
||||
|
||||
BUILD_BUG_ON(sizeof(struct user_i387_struct) !=
|
||||
sizeof(tsk->thread.i387.fxsave));
|
||||
|
||||
if ((unsigned long)buf % 16)
|
||||
printk("save_i387: bad fpstate %p\n", buf);
|
||||
|
||||
if (!used_math())
|
||||
return 0;
|
||||
clear_used_math(); /* trigger finit */
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) {
|
||||
err = save_i387_checking((struct i387_fxsave_struct __user *)buf);
|
||||
if (err) return err;
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
stts();
|
||||
} else {
|
||||
if (__copy_to_user(buf, &tsk->thread.i387.fxsave,
|
||||
sizeof(struct i387_fxsave_struct)))
|
||||
return -1;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* This restores directly out of user space. Exceptions are handled.
|
||||
*/
|
||||
static inline int restore_i387(struct _fpstate __user *buf)
|
||||
{
|
||||
set_used_math();
|
||||
if (!(task_thread_info(current)->status & TS_USEDFPU)) {
|
||||
clts();
|
||||
task_thread_info(current)->status |= TS_USEDFPU;
|
||||
}
|
||||
return restore_fpu_checking((__force struct i387_fxsave_struct *)buf);
|
||||
}
|
||||
|
||||
#else /* CONFIG_X86_32 */
|
||||
|
||||
static inline void tolerant_fwait(void)
|
||||
{
|
||||
asm volatile("fnclex ; fwait");
|
||||
}
|
||||
|
||||
static inline void restore_fpu(struct task_struct *tsk)
|
||||
{
|
||||
/*
|
||||
* The "nop" is needed to make the instructions the same
|
||||
* length.
|
||||
*/
|
||||
alternative_input(
|
||||
"nop ; frstor %1",
|
||||
"fxrstor %1",
|
||||
X86_FEATURE_FXSR,
|
||||
"m" ((tsk)->thread.i387.fxsave));
|
||||
}
|
||||
|
||||
/* We need a safe address that is cheap to find and that is already
|
||||
in L1 during context switch. The best choices are unfortunately
|
||||
different for UP and SMP */
|
||||
#ifdef CONFIG_SMP
|
||||
#define safe_address (__per_cpu_offset[0])
|
||||
#else
|
||||
#define safe_address (kstat_cpu(0).cpustat.user)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These must be called with preempt disabled
|
||||
*/
|
||||
static inline void __save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
/* Use more nops than strictly needed in case the compiler
|
||||
varies code */
|
||||
alternative_input(
|
||||
"fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
|
||||
"fxsave %[fx]\n"
|
||||
"bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
|
||||
X86_FEATURE_FXSR,
|
||||
[fx] "m" (tsk->thread.i387.fxsave),
|
||||
[fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory");
|
||||
/* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
|
||||
is pending. Clear the x87 state here by setting it to fixed
|
||||
values. safe_address is a random variable that should be in L1 */
|
||||
alternative_input(
|
||||
GENERIC_NOP8 GENERIC_NOP2,
|
||||
"emms\n\t" /* clear stack tags */
|
||||
"fildl %[addr]", /* set F?P to defined value */
|
||||
X86_FEATURE_FXSAVE_LEAK,
|
||||
[addr] "m" (safe_address));
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
}
|
||||
|
||||
/*
|
||||
* Signal frame handlers...
|
||||
*/
|
||||
extern int save_i387(struct _fpstate __user *buf);
|
||||
extern int restore_i387(struct _fpstate __user *buf);
|
||||
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
static inline void __unlazy_fpu(struct task_struct *tsk)
|
||||
{
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) {
|
||||
__save_init_fpu(tsk);
|
||||
stts();
|
||||
} else
|
||||
tsk->fpu_counter = 0;
|
||||
}
|
||||
|
||||
static inline void __clear_fpu(struct task_struct *tsk)
|
||||
{
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) {
|
||||
tolerant_fwait();
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
stts();
|
||||
}
|
||||
}
|
||||
|
||||
static inline void kernel_fpu_begin(void)
|
||||
{
|
||||
struct thread_info *me = current_thread_info();
|
||||
preempt_disable();
|
||||
if (me->status & TS_USEDFPU)
|
||||
__save_init_fpu(me->task);
|
||||
else
|
||||
clts();
|
||||
}
|
||||
|
||||
static inline void kernel_fpu_end(void)
|
||||
{
|
||||
stts();
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
|
||||
static inline void save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
__save_init_fpu(tsk);
|
||||
stts();
|
||||
}
|
||||
|
||||
#define unlazy_fpu __unlazy_fpu
|
||||
#define clear_fpu __clear_fpu
|
||||
|
||||
#else /* CONFIG_X86_32 */
|
||||
|
||||
/*
|
||||
* These disable preemption on their own and are safe
|
||||
*/
|
||||
static inline void save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
preempt_disable();
|
||||
__save_init_fpu(tsk);
|
||||
stts();
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void unlazy_fpu(struct task_struct *tsk)
|
||||
{
|
||||
preempt_disable();
|
||||
__unlazy_fpu(tsk);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void clear_fpu(struct task_struct *tsk)
|
||||
{
|
||||
preempt_disable();
|
||||
__clear_fpu(tsk);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
/*
|
||||
* ptrace request handlers...
|
||||
*/
|
||||
extern int get_fpregs(struct user_i387_struct __user *buf,
|
||||
struct task_struct *tsk);
|
||||
extern int set_fpregs(struct task_struct *tsk,
|
||||
struct user_i387_struct __user *buf);
|
||||
|
||||
struct user_fxsr_struct;
|
||||
extern int get_fpxregs(struct user_fxsr_struct __user *buf,
|
||||
struct task_struct *tsk);
|
||||
extern int set_fpxregs(struct task_struct *tsk,
|
||||
struct user_fxsr_struct __user *buf);
|
||||
|
||||
/*
|
||||
* i387 state interaction
|
||||
*/
|
||||
static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
|
||||
{
|
||||
if (cpu_has_fxsr) {
|
||||
return tsk->thread.i387.fxsave.cwd;
|
||||
} else {
|
||||
return (unsigned short)tsk->thread.i387.fsave.cwd;
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned short get_fpu_swd(struct task_struct *tsk)
|
||||
{
|
||||
if (cpu_has_fxsr) {
|
||||
return tsk->thread.i387.fxsave.swd;
|
||||
} else {
|
||||
return (unsigned short)tsk->thread.i387.fsave.swd;
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
|
||||
{
|
||||
if (cpu_has_xmm) {
|
||||
return tsk->thread.i387.fxsave.mxcsr;
|
||||
} else {
|
||||
return MXCSR_DEFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* _ASM_X86_I387_H */
|
||||
|
|
|
|||
|
|
@ -1,149 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 1994 Linus Torvalds
|
||||
*
|
||||
* Pentium III FXSR, SSE support
|
||||
* General FPU state handling cleanups
|
||||
* Gareth Hughes <gareth@valinux.com>, May 2000
|
||||
*/
|
||||
|
||||
#ifndef __ASM_I386_I387_H
|
||||
#define __ASM_I386_I387_H
|
||||
|
||||
#include <linux/sched.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/sigcontext.h>
|
||||
#include <asm/user.h>
|
||||
|
||||
extern void mxcsr_feature_mask_init(void);
|
||||
extern void init_fpu(struct task_struct *);
|
||||
|
||||
/*
|
||||
* FPU lazy state save handling...
|
||||
*/
|
||||
|
||||
/*
|
||||
* The "nop" is needed to make the instructions the same
|
||||
* length.
|
||||
*/
|
||||
#define restore_fpu(tsk) \
|
||||
alternative_input( \
|
||||
"nop ; frstor %1", \
|
||||
"fxrstor %1", \
|
||||
X86_FEATURE_FXSR, \
|
||||
"m" ((tsk)->thread.i387.fxsave))
|
||||
|
||||
extern void kernel_fpu_begin(void);
|
||||
#define kernel_fpu_end() do { stts(); preempt_enable(); } while(0)
|
||||
|
||||
/* We need a safe address that is cheap to find and that is already
|
||||
in L1 during context switch. The best choices are unfortunately
|
||||
different for UP and SMP */
|
||||
#ifdef CONFIG_SMP
|
||||
#define safe_address (__per_cpu_offset[0])
|
||||
#else
|
||||
#define safe_address (kstat_cpu(0).cpustat.user)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These must be called with preempt disabled
|
||||
*/
|
||||
static inline void __save_init_fpu( struct task_struct *tsk )
|
||||
{
|
||||
/* Use more nops than strictly needed in case the compiler
|
||||
varies code */
|
||||
alternative_input(
|
||||
"fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
|
||||
"fxsave %[fx]\n"
|
||||
"bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
|
||||
X86_FEATURE_FXSR,
|
||||
[fx] "m" (tsk->thread.i387.fxsave),
|
||||
[fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory");
|
||||
/* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
|
||||
is pending. Clear the x87 state here by setting it to fixed
|
||||
values. safe_address is a random variable that should be in L1 */
|
||||
alternative_input(
|
||||
GENERIC_NOP8 GENERIC_NOP2,
|
||||
"emms\n\t" /* clear stack tags */
|
||||
"fildl %[addr]", /* set F?P to defined value */
|
||||
X86_FEATURE_FXSAVE_LEAK,
|
||||
[addr] "m" (safe_address));
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
}
|
||||
|
||||
#define __unlazy_fpu( tsk ) do { \
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) { \
|
||||
__save_init_fpu(tsk); \
|
||||
stts(); \
|
||||
} else \
|
||||
tsk->fpu_counter = 0; \
|
||||
} while (0)
|
||||
|
||||
#define __clear_fpu( tsk ) \
|
||||
do { \
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) { \
|
||||
asm volatile("fnclex ; fwait"); \
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU; \
|
||||
stts(); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
|
||||
/*
|
||||
* These disable preemption on their own and are safe
|
||||
*/
|
||||
static inline void save_init_fpu( struct task_struct *tsk )
|
||||
{
|
||||
preempt_disable();
|
||||
__save_init_fpu(tsk);
|
||||
stts();
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
#define unlazy_fpu( tsk ) do { \
|
||||
preempt_disable(); \
|
||||
__unlazy_fpu(tsk); \
|
||||
preempt_enable(); \
|
||||
} while (0)
|
||||
|
||||
#define clear_fpu( tsk ) do { \
|
||||
preempt_disable(); \
|
||||
__clear_fpu( tsk ); \
|
||||
preempt_enable(); \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* FPU state interaction...
|
||||
*/
|
||||
extern unsigned short get_fpu_cwd( struct task_struct *tsk );
|
||||
extern unsigned short get_fpu_swd( struct task_struct *tsk );
|
||||
extern unsigned short get_fpu_mxcsr( struct task_struct *tsk );
|
||||
extern asmlinkage void math_state_restore(void);
|
||||
|
||||
/*
|
||||
* Signal frame handlers...
|
||||
*/
|
||||
extern int save_i387( struct _fpstate __user *buf );
|
||||
extern int restore_i387( struct _fpstate __user *buf );
|
||||
|
||||
/*
|
||||
* ptrace request handers...
|
||||
*/
|
||||
extern int get_fpregs( struct user_i387_struct __user *buf,
|
||||
struct task_struct *tsk );
|
||||
extern int set_fpregs( struct task_struct *tsk,
|
||||
struct user_i387_struct __user *buf );
|
||||
|
||||
extern int get_fpxregs( struct user_fxsr_struct __user *buf,
|
||||
struct task_struct *tsk );
|
||||
extern int set_fpxregs( struct task_struct *tsk,
|
||||
struct user_fxsr_struct __user *buf );
|
||||
|
||||
/*
|
||||
* FPU state for core dumps...
|
||||
*/
|
||||
extern int dump_fpu( struct pt_regs *regs,
|
||||
struct user_i387_struct *fpu );
|
||||
|
||||
#endif /* __ASM_I386_I387_H */
|
||||
|
|
@ -1,374 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 1994 Linus Torvalds
|
||||
*
|
||||
* Pentium III FXSR, SSE support
|
||||
* General FPU state handling cleanups
|
||||
* Gareth Hughes <gareth@valinux.com>, May 2000
|
||||
* x86-64 work by Andi Kleen 2002
|
||||
*/
|
||||
|
||||
#ifndef _ASM_X86_I387_H
|
||||
#define _ASM_X86_I387_H
|
||||
|
||||
#include <linux/sched.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
#include <linux/regset.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/sigcontext.h>
|
||||
#include <asm/user.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
||||
extern void fpu_init(void);
|
||||
extern unsigned int mxcsr_feature_mask;
|
||||
extern void mxcsr_feature_mask_init(void);
|
||||
extern void init_fpu(struct task_struct *child);
|
||||
extern asmlinkage void math_state_restore(void);
|
||||
|
||||
extern user_regset_active_fn fpregs_active, xfpregs_active;
|
||||
extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
|
||||
extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
|
||||
|
||||
#ifdef CONFIG_IA32_EMULATION
|
||||
struct _fpstate_ia32;
|
||||
extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
|
||||
extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
|
||||
/* Ignore delayed exceptions from user space */
|
||||
static inline void tolerant_fwait(void)
|
||||
{
|
||||
asm volatile("1: fwait\n"
|
||||
"2:\n"
|
||||
" .section __ex_table,\"a\"\n"
|
||||
" .align 8\n"
|
||||
" .quad 1b,2b\n"
|
||||
" .previous\n");
|
||||
}
|
||||
|
||||
static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
|
||||
{
|
||||
int err;
|
||||
|
||||
asm volatile("1: rex64/fxrstor (%[fx])\n\t"
|
||||
"2:\n"
|
||||
".section .fixup,\"ax\"\n"
|
||||
"3: movl $-1,%[err]\n"
|
||||
" jmp 2b\n"
|
||||
".previous\n"
|
||||
".section __ex_table,\"a\"\n"
|
||||
" .align 8\n"
|
||||
" .quad 1b,3b\n"
|
||||
".previous"
|
||||
: [err] "=r" (err)
|
||||
#if 0 /* See comment in __save_init_fpu() below. */
|
||||
: [fx] "r" (fx), "m" (*fx), "0" (0));
|
||||
#else
|
||||
: [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
|
||||
#endif
|
||||
if (unlikely(err))
|
||||
init_fpu(current);
|
||||
return err;
|
||||
}
|
||||
|
||||
#define X87_FSW_ES (1 << 7) /* Exception Summary */
|
||||
|
||||
/* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
|
||||
is pending. Clear the x87 state here by setting it to fixed
|
||||
values. The kernel data segment can be sometimes 0 and sometimes
|
||||
new user value. Both should be ok.
|
||||
Use the PDA as safe address because it should be already in L1. */
|
||||
static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
|
||||
{
|
||||
if (unlikely(fx->swd & X87_FSW_ES))
|
||||
asm volatile("fnclex");
|
||||
alternative_input(ASM_NOP8 ASM_NOP2,
|
||||
" emms\n" /* clear stack tags */
|
||||
" fildl %%gs:0", /* load to clear state */
|
||||
X86_FEATURE_FXSAVE_LEAK);
|
||||
}
|
||||
|
||||
static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
|
||||
{
|
||||
int err;
|
||||
|
||||
asm volatile("1: rex64/fxsave (%[fx])\n\t"
|
||||
"2:\n"
|
||||
".section .fixup,\"ax\"\n"
|
||||
"3: movl $-1,%[err]\n"
|
||||
" jmp 2b\n"
|
||||
".previous\n"
|
||||
".section __ex_table,\"a\"\n"
|
||||
" .align 8\n"
|
||||
" .quad 1b,3b\n"
|
||||
".previous"
|
||||
: [err] "=r" (err), "=m" (*fx)
|
||||
#if 0 /* See comment in __fxsave_clear() below. */
|
||||
: [fx] "r" (fx), "0" (0));
|
||||
#else
|
||||
: [fx] "cdaSDb" (fx), "0" (0));
|
||||
#endif
|
||||
if (unlikely(err) && __clear_user(fx, sizeof(struct i387_fxsave_struct)))
|
||||
err = -EFAULT;
|
||||
/* No need to clear here because the caller clears USED_MATH */
|
||||
return err;
|
||||
}
|
||||
|
||||
static inline void __save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
/* Using "rex64; fxsave %0" is broken because, if the memory operand
|
||||
uses any extended registers for addressing, a second REX prefix
|
||||
will be generated (to the assembler, rex64 followed by semicolon
|
||||
is a separate instruction), and hence the 64-bitness is lost. */
|
||||
#if 0
|
||||
/* Using "fxsaveq %0" would be the ideal choice, but is only supported
|
||||
starting with gas 2.16. */
|
||||
__asm__ __volatile__("fxsaveq %0"
|
||||
: "=m" (tsk->thread.i387.fxsave));
|
||||
#elif 0
|
||||
/* Using, as a workaround, the properly prefixed form below isn't
|
||||
accepted by any binutils version so far released, complaining that
|
||||
the same type of prefix is used twice if an extended register is
|
||||
needed for addressing (fix submitted to mainline 2005-11-21). */
|
||||
__asm__ __volatile__("rex64/fxsave %0"
|
||||
: "=m" (tsk->thread.i387.fxsave));
|
||||
#else
|
||||
/* This, however, we can work around by forcing the compiler to select
|
||||
an addressing mode that doesn't require extended registers. */
|
||||
__asm__ __volatile__("rex64/fxsave %P2(%1)"
|
||||
: "=m" (tsk->thread.i387.fxsave)
|
||||
: "cdaSDb" (tsk),
|
||||
"i" (offsetof(__typeof__(*tsk),
|
||||
thread.i387.fxsave)));
|
||||
#endif
|
||||
clear_fpu_state(&tsk->thread.i387.fxsave);
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
}
|
||||
|
||||
/*
|
||||
* Signal frame handlers.
|
||||
*/
|
||||
|
||||
static inline int save_i387(struct _fpstate __user *buf)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
int err = 0;
|
||||
|
||||
BUILD_BUG_ON(sizeof(struct user_i387_struct) !=
|
||||
sizeof(tsk->thread.i387.fxsave));
|
||||
|
||||
if ((unsigned long)buf % 16)
|
||||
printk("save_i387: bad fpstate %p\n", buf);
|
||||
|
||||
if (!used_math())
|
||||
return 0;
|
||||
clear_used_math(); /* trigger finit */
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) {
|
||||
err = save_i387_checking((struct i387_fxsave_struct __user *)buf);
|
||||
if (err) return err;
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
stts();
|
||||
} else {
|
||||
if (__copy_to_user(buf, &tsk->thread.i387.fxsave,
|
||||
sizeof(struct i387_fxsave_struct)))
|
||||
return -1;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* This restores directly out of user space. Exceptions are handled.
|
||||
*/
|
||||
static inline int restore_i387(struct _fpstate __user *buf)
|
||||
{
|
||||
set_used_math();
|
||||
if (!(task_thread_info(current)->status & TS_USEDFPU)) {
|
||||
clts();
|
||||
task_thread_info(current)->status |= TS_USEDFPU;
|
||||
}
|
||||
return restore_fpu_checking((__force struct i387_fxsave_struct *)buf);
|
||||
}
|
||||
|
||||
#else /* CONFIG_X86_32 */
|
||||
|
||||
static inline void tolerant_fwait(void)
|
||||
{
|
||||
asm volatile("fnclex ; fwait");
|
||||
}
|
||||
|
||||
static inline void restore_fpu(struct task_struct *tsk)
|
||||
{
|
||||
/*
|
||||
* The "nop" is needed to make the instructions the same
|
||||
* length.
|
||||
*/
|
||||
alternative_input(
|
||||
"nop ; frstor %1",
|
||||
"fxrstor %1",
|
||||
X86_FEATURE_FXSR,
|
||||
"m" ((tsk)->thread.i387.fxsave));
|
||||
}
|
||||
|
||||
/* We need a safe address that is cheap to find and that is already
|
||||
in L1 during context switch. The best choices are unfortunately
|
||||
different for UP and SMP */
|
||||
#ifdef CONFIG_SMP
|
||||
#define safe_address (__per_cpu_offset[0])
|
||||
#else
|
||||
#define safe_address (kstat_cpu(0).cpustat.user)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These must be called with preempt disabled
|
||||
*/
|
||||
static inline void __save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
/* Use more nops than strictly needed in case the compiler
|
||||
varies code */
|
||||
alternative_input(
|
||||
"fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
|
||||
"fxsave %[fx]\n"
|
||||
"bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
|
||||
X86_FEATURE_FXSR,
|
||||
[fx] "m" (tsk->thread.i387.fxsave),
|
||||
[fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory");
|
||||
/* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
|
||||
is pending. Clear the x87 state here by setting it to fixed
|
||||
values. safe_address is a random variable that should be in L1 */
|
||||
alternative_input(
|
||||
GENERIC_NOP8 GENERIC_NOP2,
|
||||
"emms\n\t" /* clear stack tags */
|
||||
"fildl %[addr]", /* set F?P to defined value */
|
||||
X86_FEATURE_FXSAVE_LEAK,
|
||||
[addr] "m" (safe_address));
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
}
|
||||
|
||||
/*
|
||||
* Signal frame handlers...
|
||||
*/
|
||||
extern int save_i387(struct _fpstate __user *buf);
|
||||
extern int restore_i387(struct _fpstate __user *buf);
|
||||
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
static inline void __unlazy_fpu(struct task_struct *tsk)
|
||||
{
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) {
|
||||
__save_init_fpu(tsk);
|
||||
stts();
|
||||
} else
|
||||
tsk->fpu_counter = 0;
|
||||
}
|
||||
|
||||
static inline void __clear_fpu(struct task_struct *tsk)
|
||||
{
|
||||
if (task_thread_info(tsk)->status & TS_USEDFPU) {
|
||||
tolerant_fwait();
|
||||
task_thread_info(tsk)->status &= ~TS_USEDFPU;
|
||||
stts();
|
||||
}
|
||||
}
|
||||
|
||||
static inline void kernel_fpu_begin(void)
|
||||
{
|
||||
struct thread_info *me = current_thread_info();
|
||||
preempt_disable();
|
||||
if (me->status & TS_USEDFPU)
|
||||
__save_init_fpu(me->task);
|
||||
else
|
||||
clts();
|
||||
}
|
||||
|
||||
static inline void kernel_fpu_end(void)
|
||||
{
|
||||
stts();
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
|
||||
static inline void save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
__save_init_fpu(tsk);
|
||||
stts();
|
||||
}
|
||||
|
||||
#define unlazy_fpu __unlazy_fpu
|
||||
#define clear_fpu __clear_fpu
|
||||
|
||||
#else /* CONFIG_X86_32 */
|
||||
|
||||
/*
|
||||
* These disable preemption on their own and are safe
|
||||
*/
|
||||
static inline void save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
preempt_disable();
|
||||
__save_init_fpu(tsk);
|
||||
stts();
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void unlazy_fpu(struct task_struct *tsk)
|
||||
{
|
||||
preempt_disable();
|
||||
__unlazy_fpu(tsk);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void clear_fpu(struct task_struct *tsk)
|
||||
{
|
||||
preempt_disable();
|
||||
__clear_fpu(tsk);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
/*
|
||||
* ptrace request handlers...
|
||||
*/
|
||||
extern int get_fpregs(struct user_i387_struct __user *buf,
|
||||
struct task_struct *tsk);
|
||||
extern int set_fpregs(struct task_struct *tsk,
|
||||
struct user_i387_struct __user *buf);
|
||||
|
||||
struct user_fxsr_struct;
|
||||
extern int get_fpxregs(struct user_fxsr_struct __user *buf,
|
||||
struct task_struct *tsk);
|
||||
extern int set_fpxregs(struct task_struct *tsk,
|
||||
struct user_fxsr_struct __user *buf);
|
||||
|
||||
/*
|
||||
* i387 state interaction
|
||||
*/
|
||||
static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
|
||||
{
|
||||
if (cpu_has_fxsr) {
|
||||
return tsk->thread.i387.fxsave.cwd;
|
||||
} else {
|
||||
return (unsigned short)tsk->thread.i387.fsave.cwd;
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned short get_fpu_swd(struct task_struct *tsk)
|
||||
{
|
||||
if (cpu_has_fxsr) {
|
||||
return tsk->thread.i387.fxsave.swd;
|
||||
} else {
|
||||
return (unsigned short)tsk->thread.i387.fsave.swd;
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
|
||||
{
|
||||
if (cpu_has_xmm) {
|
||||
return tsk->thread.i387.fxsave.mxcsr;
|
||||
} else {
|
||||
return MXCSR_DEFAULT;
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* _ASM_X86_I387_H */
|
||||
Loading…
Reference in a new issue