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x86/64: Adjust types of temporaries used by ffs()/fls()/fls64()

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The 64-bit special cases of the former two (the thrird one is
64-bit only anyway) don't need to use "long" temporaries, as the
result will always fit in a 32-bit variable, and the functions
return plain "int". This avoids a few REX prefixes, i.e.
minimally reduces code size.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/504DE550020000780009A258@nat28.tlf.novell.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Jan Beulich 2012-09-10 12:04:16 +01:00 committed by Ingo Molnar
parent 6eebdda35e
commit 1edfbb4153
1 changed files with 4 additions and 6 deletions
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10
arch/x86/include/asm/bitops.h
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@ -417,10 +417,9 @@ static inline int ffs(int x)
* We cannot do this on 32 bits because at the very least some * We cannot do this on 32 bits because at the very least some
* 486 CPUs did not behave this way. * 486 CPUs did not behave this way.
*/ */
long tmp = -1;
asm("bsfl %1,%0" asm("bsfl %1,%0"
: "=r" (r) : "=r" (r)
: "rm" (x), "0" (tmp)); : "rm" (x), "0" (-1));
#elif defined(CONFIG_X86_CMOV) #elif defined(CONFIG_X86_CMOV)
asm("bsfl %1,%0\n\t" asm("bsfl %1,%0\n\t"
"cmovzl %2,%0" "cmovzl %2,%0"
@ -459,10 +458,9 @@ static inline int fls(int x)
* We cannot do this on 32 bits because at the very least some * We cannot do this on 32 bits because at the very least some
* 486 CPUs did not behave this way. * 486 CPUs did not behave this way.
*/ */
long tmp = -1;
asm("bsrl %1,%0" asm("bsrl %1,%0"
: "=r" (r) : "=r" (r)
: "rm" (x), "0" (tmp)); : "rm" (x), "0" (-1));
#elif defined(CONFIG_X86_CMOV) #elif defined(CONFIG_X86_CMOV)
asm("bsrl %1,%0\n\t" asm("bsrl %1,%0\n\t"
"cmovzl %2,%0" "cmovzl %2,%0"
@ -490,13 +488,13 @@ static inline int fls(int x)
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
static __always_inline int fls64(__u64 x) static __always_inline int fls64(__u64 x)
{ {
long bitpos = -1; int bitpos = -1;
/* /*
* AMD64 says BSRQ won't clobber the dest reg if x==0; Intel64 says the * AMD64 says BSRQ won't clobber the dest reg if x==0; Intel64 says the
* dest reg is undefined if x==0, but their CPU architect says its * dest reg is undefined if x==0, but their CPU architect says its
* value is written to set it to the same as before. * value is written to set it to the same as before.
*/ */
asm("bsrq %1,%0" asm("bsrq %1,%q0"
: "+r" (bitpos) : "+r" (bitpos)
: "rm" (x)); : "rm" (x));
return bitpos + 1; return bitpos + 1;