__compute_return_epc() uses CFC1 instruction which might result in a
coprocessor unusable exception since the process can lose its fpu context by preemption. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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parent
d547c5cc21
commit
1d74f6bc85
2 changed files with 14 additions and 5 deletions
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@ -12,6 +12,7 @@
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#include <asm/branch.h>
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#include <asm/branch.h>
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#include <asm/cpu.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/cpu-features.h>
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#include <asm/fpu.h>
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#include <asm/inst.h>
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#include <asm/inst.h>
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#include <asm/ptrace.h>
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#include <asm/ptrace.h>
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#include <asm/uaccess.h>
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#include <asm/uaccess.h>
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@ -161,10 +162,13 @@ int __compute_return_epc(struct pt_regs *regs)
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* And now the FPA/cp1 branch instructions.
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* And now the FPA/cp1 branch instructions.
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*/
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*/
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case cop1_op:
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case cop1_op:
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if (!cpu_has_fpu)
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preempt_disable();
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fcr31 = current->thread.fpu.soft.fcr31;
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if (is_fpu_owner())
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else
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asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
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asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
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else
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fcr31 = current->thread.fpu.hard.fcr31;
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preempt_enable();
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bit = (insn.i_format.rt >> 2);
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bit = (insn.i_format.rt >> 2);
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bit += (bit != 0);
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bit += (bit != 0);
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bit += 23;
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bit += 23;
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@ -80,9 +80,14 @@ do { \
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#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
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#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
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static inline int __is_fpu_owner(void)
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{
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return test_thread_flag(TIF_USEDFPU);
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}
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static inline int is_fpu_owner(void)
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static inline int is_fpu_owner(void)
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{
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{
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return cpu_has_fpu && test_thread_flag(TIF_USEDFPU);
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return cpu_has_fpu && __is_fpu_owner();
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}
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}
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static inline void own_fpu(void)
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static inline void own_fpu(void)
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@ -127,7 +132,7 @@ static inline void restore_fp(struct task_struct *tsk)
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static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
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static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
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{
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{
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if (cpu_has_fpu) {
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if (cpu_has_fpu) {
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if ((tsk == current) && is_fpu_owner())
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if ((tsk == current) && __is_fpu_owner())
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_save_fp(current);
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_save_fp(current);
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return tsk->thread.fpu.hard.fpr;
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return tsk->thread.fpu.hard.fpr;
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}
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}
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