perf_counter: x86: Disallow interval of 1
On certain CPUs i have observed a stuck PMU if interval was set to 1 and NMIs were used. The PMU had PMC0 set in MSR_CORE_PERF_GLOBAL_STATUS, but it was not possible to ack it via MSR_CORE_PERF_GLOBAL_OVF_CTRL, and the NMI loop got stuck infinitely. [ Impact: fix rare hangs during high perfcounter load ] Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -473,6 +473,11 @@ x86_perf_counter_set_period(struct perf_counter *counter,
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left += period;
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atomic64_set(&hwc->period_left, left);
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}
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/*
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* Quirk: certain CPUs dont like it if just 1 event is left:
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*/
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if (unlikely(left < 2))
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left = 2;
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per_cpu(prev_left[idx], smp_processor_id()) = left;
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