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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 3543/1: [Fwd: PXA270 bootparams address not set]
  [ARM] Trivial typo fixes
This commit is contained in:
Linus Torvalds 2006-06-05 16:22:26 -07:00
commit 1b41526975
4 changed files with 4 additions and 3 deletions
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2
arch/arm/Kconfig.debug
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@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART
help help
Choice for UART for kernel low-level using S3C2410 UARTS, Choice for UART for kernel low-level using S3C2410 UARTS,
should be between zero and two. The port must have been should be between zero and two. The port must have been
initalised by the boot-loader before use. initialised by the boot-loader before use.
The uncompressor code port configuration is now handled The uncompressor code port configuration is now handled
by CONFIG_S3C2410_LOWLEVEL_UART_PORT. by CONFIG_S3C2410_LOWLEVEL_UART_PORT.

2
arch/arm/mach-ixp4xx/Kconfig
View file

@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI
2) If > 64MB of memory space is required, the IXP4xx can be 2) If > 64MB of memory space is required, the IXP4xx can be
configured to use indirect registers to access PCI This allows configured to use indirect registers to access PCI This allows
for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
The disadvantadge of this is that every PCI access requires The disadvantage of this is that every PCI access requires
three local register accesses plus a spinlock, but in some three local register accesses plus a spinlock, but in some
cases the performance hit is acceptable. In addition, you cannot cases the performance hit is acceptable. In addition, you cannot
mmap() PCI devices in this case due to the indirect nature mmap() PCI devices in this case due to the indirect nature

1
arch/arm/mach-pxa/mainstone.c
View file

@ -493,6 +493,7 @@ static void __init mainstone_map_io(void)
MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
/* Maintainer: MontaVista Software Inc. */ /* Maintainer: MontaVista Software Inc. */
.phys_io = 0x40000000, .phys_io = 0x40000000,
.boot_params = 0xa0000100, /* BLOB boot parameter setting */
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = mainstone_map_io, .map_io = mainstone_map_io,
.init_irq = mainstone_init_irq, .init_irq = mainstone_init_irq,

2
arch/arm/mach-s3c2410/Kconfig
View file

@ -170,7 +170,7 @@ config S3C2410_PM_DEBUG
depends on ARCH_S3C2410 && PM depends on ARCH_S3C2410 && PM
help help
Say Y here if you want verbose debugging from the PM Suspend and Say Y here if you want verbose debugging from the PM Suspend and
Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt` Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
for more information. for more information.
config S3C2410_PM_CHECK config S3C2410_PM_CHECK