Merge branch 'tools' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-idle-2.6
* 'tools' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-idle-2.6: tools: create power/x86/x86_energy_perf_policy tools: create power/x86/turbostat
This commit is contained in:
Linus Torvalds
commit
1b3862798c
6 changed files with 1665 additions and 0 deletions
8
tools/power/x86/turbostat/Makefile
Normal file
8
tools/power/x86/turbostat/Makefile
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@ -0,0 +1,8 @@
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turbostat : turbostat.c
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clean :
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rm -f turbostat
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install :
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install turbostat /usr/bin/turbostat
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install turbostat.8 /usr/share/man/man8
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172
tools/power/x86/turbostat/turbostat.8
Normal file
172
tools/power/x86/turbostat/turbostat.8
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@ -0,0 +1,172 @@
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.TH TURBOSTAT 8
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.SH NAME
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turbostat \- Report processor frequency and idle statistics
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.SH SYNOPSIS
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.ft B
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.B turbostat
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.RB [ "\-v" ]
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.RB [ "\-M MSR#" ]
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.RB command
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.br
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.B turbostat
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.RB [ "\-v" ]
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.RB [ "\-M MSR#" ]
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.RB [ "\-i interval_sec" ]
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.SH DESCRIPTION
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\fBturbostat \fP reports processor topology, frequency
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and idle power state statistics on modern X86 processors.
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Either \fBcommand\fP is forked and statistics are printed
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upon its completion, or statistics are printed periodically.
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\fBturbostat \fP
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||||
requires that the processor
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supports an "invariant" TSC, plus the APERF and MPERF MSRs.
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\fBturbostat \fP will report idle cpu power state residency
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on processors that additionally support C-state residency counters.
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.SS Options
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The \fB-v\fP option increases verbosity.
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.PP
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The \fB-M MSR#\fP option dumps the specified MSR,
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in addition to the usual frequency and idle statistics.
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.PP
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The \fB-i interval_sec\fP option prints statistics every \fiinterval_sec\fP seconds.
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The default is 5 seconds.
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.PP
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The \fBcommand\fP parameter forks \fBcommand\fP and upon its exit,
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displays the statistics gathered since it was forked.
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.PP
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.SH FIELD DESCRIPTIONS
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.nf
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\fBpkg\fP processor package number.
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\fBcore\fP processor core number.
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\fBCPU\fP Linux CPU (logical processor) number.
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\fB%c0\fP percent of the interval that the CPU retired instructions.
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\fBGHz\fP average clock rate while the CPU was in c0 state.
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\fBTSC\fP average GHz that the TSC ran during the entire interval.
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\fB%c1, %c3, %c6\fP show the percentage residency in hardware core idle states.
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\fB%pc3, %pc6\fP percentage residency in hardware package idle states.
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.fi
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.PP
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.SH EXAMPLE
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Without any parameters, turbostat prints out counters ever 5 seconds.
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(override interval with "-i sec" option, or specify a command
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for turbostat to fork).
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The first row of statistics reflect the average for the entire system.
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Subsequent rows show per-CPU statistics.
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.nf
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[root@x980]# ./turbostat
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core CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6
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0.04 1.62 3.38 0.11 0.00 99.85 0.00 95.07
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0 0 0.04 1.62 3.38 0.06 0.00 99.90 0.00 95.07
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0 6 0.02 1.62 3.38 0.08 0.00 99.90 0.00 95.07
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1 2 0.10 1.62 3.38 0.29 0.00 99.61 0.00 95.07
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1 8 0.11 1.62 3.38 0.28 0.00 99.61 0.00 95.07
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2 4 0.01 1.62 3.38 0.01 0.00 99.98 0.00 95.07
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||||
2 10 0.01 1.61 3.38 0.02 0.00 99.98 0.00 95.07
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8 1 0.07 1.62 3.38 0.15 0.00 99.78 0.00 95.07
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8 7 0.03 1.62 3.38 0.19 0.00 99.78 0.00 95.07
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9 3 0.01 1.62 3.38 0.02 0.00 99.98 0.00 95.07
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9 9 0.01 1.62 3.38 0.02 0.00 99.98 0.00 95.07
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10 5 0.01 1.62 3.38 0.13 0.00 99.86 0.00 95.07
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10 11 0.08 1.62 3.38 0.05 0.00 99.86 0.00 95.07
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.fi
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.SH VERBOSE EXAMPLE
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The "-v" option adds verbosity to the output:
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.nf
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GenuineIntel 11 CPUID levels; family:model:stepping 0x6:2c:2 (6:44:2)
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12 * 133 = 1600 MHz max efficiency
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25 * 133 = 3333 MHz TSC frequency
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26 * 133 = 3467 MHz max turbo 4 active cores
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26 * 133 = 3467 MHz max turbo 3 active cores
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27 * 133 = 3600 MHz max turbo 2 active cores
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27 * 133 = 3600 MHz max turbo 1 active cores
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.fi
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The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
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available at the minimum package voltage. The \fBTSC frequency\fP is the nominal
|
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maximum frequency of the processor if turbo-mode were not available. This frequency
|
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should be sustainable on all CPUs indefinitely, given nominal power and cooling.
|
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The remaining rows show what maximum turbo frequency is possible
|
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depending on the number of idle cores. Note that this information is
|
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not available on all processors.
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.SH FORK EXAMPLE
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If turbostat is invoked with a command, it will fork that command
|
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and output the statistics gathered when the command exits.
|
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eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
|
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until ^C while the other CPUs are mostly idle:
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|
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.nf
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[root@x980 lenb]# ./turbostat cat /dev/zero > /dev/null
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^Ccore CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6
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8.49 3.63 3.38 16.23 0.66 74.63 0.00 0.00
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0 0 1.22 3.62 3.38 32.18 0.00 66.60 0.00 0.00
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0 6 0.40 3.61 3.38 33.00 0.00 66.60 0.00 0.00
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1 2 0.11 3.14 3.38 0.19 3.95 95.75 0.00 0.00
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1 8 0.05 2.88 3.38 0.25 3.95 95.75 0.00 0.00
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2 4 0.00 3.13 3.38 0.02 0.00 99.98 0.00 0.00
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2 10 0.00 3.09 3.38 0.02 0.00 99.98 0.00 0.00
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8 1 0.04 3.50 3.38 14.43 0.00 85.54 0.00 0.00
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||||
8 7 0.03 2.98 3.38 14.43 0.00 85.54 0.00 0.00
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||||
9 3 0.00 3.16 3.38 100.00 0.00 0.00 0.00 0.00
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||||
9 9 99.93 3.63 3.38 0.06 0.00 0.00 0.00 0.00
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10 5 0.01 2.82 3.38 0.08 0.00 99.91 0.00 0.00
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||||
10 11 0.02 3.36 3.38 0.06 0.00 99.91 0.00 0.00
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||||
6.950866 sec
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.fi
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Above the cycle soaker drives cpu9 up 3.6 Ghz turbo limit
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while the other processors are generally in various states of idle.
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Note that cpu3 is an HT sibling sharing core9
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with cpu9, and thus it is unable to get to an idle state
|
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deeper than c1 while cpu9 is busy.
|
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|
||||
Note that turbostat reports average GHz of 3.61, while
|
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the arithmetic average of the GHz column above is 3.24.
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This is a weighted average, where the weight is %c0. ie. it is the total number of
|
||||
un-halted cycles elapsed per time divided by the number of CPUs.
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.SH NOTES
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||||
|
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.B "turbostat "
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||||
must be run as root.
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.B "turbostat "
|
||||
reads hardware counters, but doesn't write them.
|
||||
So it will not interfere with the OS or other programs, including
|
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multiple invocations of itself.
|
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|
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\fBturbostat \fP
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may work poorly on Linux-2.6.20 through 2.6.29,
|
||||
as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF
|
||||
in those kernels.
|
||||
|
||||
The APERF, MPERF MSRs are defined to count non-halted cycles.
|
||||
Although it is not guaranteed by the architecture, turbostat assumes
|
||||
that they count at TSC rate, which is true on all processors tested to date.
|
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|
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.SH REFERENCES
|
||||
"Intel® Turbo Boost Technology
|
||||
in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
|
||||
http://download.intel.com/design/processor/applnots/320354.pdf
|
||||
|
||||
"Intel® 64 and IA-32 Architectures Software Developer's Manual
|
||||
Volume 3B: System Programming Guide"
|
||||
http://www.intel.com/products/processor/manuals/
|
||||
|
||||
.SH FILES
|
||||
.ta
|
||||
.nf
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||||
/dev/cpu/*/msr
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.fi
|
||||
|
||||
.SH "SEE ALSO"
|
||||
msr(4), vmstat(8)
|
||||
.PP
|
||||
.SH AUTHORS
|
||||
.nf
|
||||
Written by Len Brown <len.brown@intel.com>
|
||||
1048
tools/power/x86/turbostat/turbostat.c
Normal file
1048
tools/power/x86/turbostat/turbostat.c
Normal file
File diff suppressed because it is too large
Load diff
8
tools/power/x86/x86_energy_perf_policy/Makefile
Normal file
8
tools/power/x86/x86_energy_perf_policy/Makefile
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@ -0,0 +1,8 @@
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x86_energy_perf_policy : x86_energy_perf_policy.c
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|
||||
clean :
|
||||
rm -f x86_energy_perf_policy
|
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|
||||
install :
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||||
install x86_energy_perf_policy /usr/bin/
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||||
install x86_energy_perf_policy.8 /usr/share/man/man8/
|
||||
104
tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8
Normal file
104
tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8
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|||
.\" This page Copyright (C) 2010 Len Brown <len.brown@intel.com>
|
||||
.\" Distributed under the GPL, Copyleft 1994.
|
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.TH X86_ENERGY_PERF_POLICY 8
|
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.SH NAME
|
||||
x86_energy_perf_policy \- read or write MSR_IA32_ENERGY_PERF_BIAS
|
||||
.SH SYNOPSIS
|
||||
.ft B
|
||||
.B x86_energy_perf_policy
|
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.RB [ "\-c cpu" ]
|
||||
.RB [ "\-v" ]
|
||||
.RB "\-r"
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.br
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||||
.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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||||
.RB [ "\-v" ]
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||||
.RB 'performance'
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.br
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||||
.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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||||
.RB [ "\-v" ]
|
||||
.RB 'normal'
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.br
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||||
.B x86_energy_perf_policy
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.RB [ "\-c cpu" ]
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||||
.RB [ "\-v" ]
|
||||
.RB 'powersave'
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||||
.br
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||||
.B x86_energy_perf_policy
|
||||
.RB [ "\-c cpu" ]
|
||||
.RB [ "\-v" ]
|
||||
.RB n
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||||
.br
|
||||
.SH DESCRIPTION
|
||||
\fBx86_energy_perf_policy\fP
|
||||
allows software to convey
|
||||
its policy for the relative importance of performance
|
||||
versus energy savings to the processor.
|
||||
|
||||
The processor uses this information in model-specific ways
|
||||
when it must select trade-offs between performance and
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energy efficiency.
|
||||
|
||||
This policy hint does not supersede Processor Performance states
|
||||
(P-states) or CPU Idle power states (C-states), but allows
|
||||
software to have influence where it would otherwise be unable
|
||||
to express a preference.
|
||||
|
||||
For example, this setting may tell the hardware how
|
||||
aggressively or conservatively to control frequency
|
||||
in the "turbo range" above the explicitly OS-controlled
|
||||
P-state frequency range. It may also tell the hardware
|
||||
how aggressively is should enter the OS requested C-states.
|
||||
|
||||
Support for this feature is indicated by CPUID.06H.ECX.bit3
|
||||
per the Intel Architectures Software Developer's Manual.
|
||||
|
||||
.SS Options
|
||||
\fB-c\fP limits operation to a single CPU.
|
||||
The default is to operate on all CPUs.
|
||||
Note that MSR_IA32_ENERGY_PERF_BIAS is defined per
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logical processor, but that the initial implementations
|
||||
of the MSR were shared among all processors in each package.
|
||||
.PP
|
||||
\fB-v\fP increases verbosity. By default
|
||||
x86_energy_perf_policy is silent.
|
||||
.PP
|
||||
\fB-r\fP is for "read-only" mode - the unchanged state
|
||||
is read and displayed.
|
||||
.PP
|
||||
.I performance
|
||||
Set a policy where performance is paramount.
|
||||
The processor will be unwilling to sacrifice any performance
|
||||
for the sake of energy saving. This is the hardware default.
|
||||
.PP
|
||||
.I normal
|
||||
Set a policy with a normal balance between performance and energy efficiency.
|
||||
The processor will tolerate minor performance compromise
|
||||
for potentially significant energy savings.
|
||||
This reasonable default for most desktops and servers.
|
||||
.PP
|
||||
.I powersave
|
||||
Set a policy where the processor can accept
|
||||
a measurable performance hit to maximize energy efficiency.
|
||||
.PP
|
||||
.I n
|
||||
Set MSR_IA32_ENERGY_PERF_BIAS to the specified number.
|
||||
The range of valid numbers is 0-15, where 0 is maximum
|
||||
performance and 15 is maximum energy efficiency.
|
||||
|
||||
.SH NOTES
|
||||
.B "x86_energy_perf_policy "
|
||||
runs only as root.
|
||||
.SH FILES
|
||||
.ta
|
||||
.nf
|
||||
/dev/cpu/*/msr
|
||||
.fi
|
||||
|
||||
.SH "SEE ALSO"
|
||||
msr(4)
|
||||
.PP
|
||||
.SH AUTHORS
|
||||
.nf
|
||||
Written by Len Brown <len.brown@intel.com>
|
||||
325
tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
Normal file
325
tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
Normal file
|
|
@ -0,0 +1,325 @@
|
|||
/*
|
||||
* x86_energy_perf_policy -- set the energy versus performance
|
||||
* policy preference bias on recent X86 processors.
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2010, Intel Corporation.
|
||||
* Len Brown <len.brown@intel.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/resource.h>
|
||||
#include <fcntl.h>
|
||||
#include <signal.h>
|
||||
#include <sys/time.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
unsigned int verbose; /* set with -v */
|
||||
unsigned int read_only; /* set with -r */
|
||||
char *progname;
|
||||
unsigned long long new_bias;
|
||||
int cpu = -1;
|
||||
|
||||
/*
|
||||
* Usage:
|
||||
*
|
||||
* -c cpu: limit action to a single CPU (default is all CPUs)
|
||||
* -v: verbose output (can invoke more than once)
|
||||
* -r: read-only, don't change any settings
|
||||
*
|
||||
* performance
|
||||
* Performance is paramount.
|
||||
* Unwilling to sacrafice any performance
|
||||
* for the sake of energy saving. (hardware default)
|
||||
*
|
||||
* normal
|
||||
* Can tolerate minor performance compromise
|
||||
* for potentially significant energy savings.
|
||||
* (reasonable default for most desktops and servers)
|
||||
*
|
||||
* powersave
|
||||
* Can tolerate significant performance hit
|
||||
* to maximize energy savings.
|
||||
*
|
||||
* n
|
||||
* a numerical value to write to the underlying MSR.
|
||||
*/
|
||||
void usage(void)
|
||||
{
|
||||
printf("%s: [-c cpu] [-v] "
|
||||
"(-r | 'performance' | 'normal' | 'powersave' | n)\n",
|
||||
progname);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0
|
||||
|
||||
#define BIAS_PERFORMANCE 0
|
||||
#define BIAS_BALANCE 6
|
||||
#define BIAS_POWERSAVE 15
|
||||
|
||||
void cmdline(int argc, char **argv)
|
||||
{
|
||||
int opt;
|
||||
|
||||
progname = argv[0];
|
||||
|
||||
while ((opt = getopt(argc, argv, "+rvc:")) != -1) {
|
||||
switch (opt) {
|
||||
case 'c':
|
||||
cpu = atoi(optarg);
|
||||
break;
|
||||
case 'r':
|
||||
read_only = 1;
|
||||
break;
|
||||
case 'v':
|
||||
verbose++;
|
||||
break;
|
||||
default:
|
||||
usage();
|
||||
}
|
||||
}
|
||||
/* if -r, then should be no additional optind */
|
||||
if (read_only && (argc > optind))
|
||||
usage();
|
||||
|
||||
/*
|
||||
* if no -r , then must be one additional optind
|
||||
*/
|
||||
if (!read_only) {
|
||||
|
||||
if (argc != optind + 1) {
|
||||
printf("must supply -r or policy param\n");
|
||||
usage();
|
||||
}
|
||||
|
||||
if (!strcmp("performance", argv[optind])) {
|
||||
new_bias = BIAS_PERFORMANCE;
|
||||
} else if (!strcmp("normal", argv[optind])) {
|
||||
new_bias = BIAS_BALANCE;
|
||||
} else if (!strcmp("powersave", argv[optind])) {
|
||||
new_bias = BIAS_POWERSAVE;
|
||||
} else {
|
||||
char *endptr;
|
||||
|
||||
new_bias = strtoull(argv[optind], &endptr, 0);
|
||||
if (endptr == argv[optind] ||
|
||||
new_bias > BIAS_POWERSAVE) {
|
||||
fprintf(stderr, "invalid value: %s\n",
|
||||
argv[optind]);
|
||||
usage();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* validate_cpuid()
|
||||
* returns on success, quietly exits on failure (make verbose with -v)
|
||||
*/
|
||||
void validate_cpuid(void)
|
||||
{
|
||||
unsigned int eax, ebx, ecx, edx, max_level;
|
||||
char brand[16];
|
||||
unsigned int fms, family, model, stepping;
|
||||
|
||||
eax = ebx = ecx = edx = 0;
|
||||
|
||||
asm("cpuid" : "=a" (max_level), "=b" (ebx), "=c" (ecx),
|
||||
"=d" (edx) : "a" (0));
|
||||
|
||||
if (ebx != 0x756e6547 || edx != 0x49656e69 || ecx != 0x6c65746e) {
|
||||
if (verbose)
|
||||
fprintf(stderr, "%.4s%.4s%.4s != GenuineIntel",
|
||||
(char *)&ebx, (char *)&edx, (char *)&ecx);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
asm("cpuid" : "=a" (fms), "=c" (ecx), "=d" (edx) : "a" (1) : "ebx");
|
||||
family = (fms >> 8) & 0xf;
|
||||
model = (fms >> 4) & 0xf;
|
||||
stepping = fms & 0xf;
|
||||
if (family == 6 || family == 0xf)
|
||||
model += ((fms >> 16) & 0xf) << 4;
|
||||
|
||||
if (verbose > 1)
|
||||
printf("CPUID %s %d levels family:model:stepping "
|
||||
"0x%x:%x:%x (%d:%d:%d)\n", brand, max_level,
|
||||
family, model, stepping, family, model, stepping);
|
||||
|
||||
if (!(edx & (1 << 5))) {
|
||||
if (verbose)
|
||||
printf("CPUID: no MSR\n");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
/*
|
||||
* Support for MSR_IA32_ENERGY_PERF_BIAS
|
||||
* is indicated by CPUID.06H.ECX.bit3
|
||||
*/
|
||||
asm("cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (6));
|
||||
if (verbose)
|
||||
printf("CPUID.06H.ECX: 0x%x\n", ecx);
|
||||
if (!(ecx & (1 << 3))) {
|
||||
if (verbose)
|
||||
printf("CPUID: No MSR_IA32_ENERGY_PERF_BIAS\n");
|
||||
exit(1);
|
||||
}
|
||||
return; /* success */
|
||||
}
|
||||
|
||||
unsigned long long get_msr(int cpu, int offset)
|
||||
{
|
||||
unsigned long long msr;
|
||||
char msr_path[32];
|
||||
int retval;
|
||||
int fd;
|
||||
|
||||
sprintf(msr_path, "/dev/cpu/%d/msr", cpu);
|
||||
fd = open(msr_path, O_RDONLY);
|
||||
if (fd < 0) {
|
||||
printf("Try \"# modprobe msr\"\n");
|
||||
perror(msr_path);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
retval = pread(fd, &msr, sizeof msr, offset);
|
||||
|
||||
if (retval != sizeof msr) {
|
||||
printf("pread cpu%d 0x%x = %d\n", cpu, offset, retval);
|
||||
exit(-2);
|
||||
}
|
||||
close(fd);
|
||||
return msr;
|
||||
}
|
||||
|
||||
unsigned long long put_msr(int cpu, unsigned long long new_msr, int offset)
|
||||
{
|
||||
unsigned long long old_msr;
|
||||
char msr_path[32];
|
||||
int retval;
|
||||
int fd;
|
||||
|
||||
sprintf(msr_path, "/dev/cpu/%d/msr", cpu);
|
||||
fd = open(msr_path, O_RDWR);
|
||||
if (fd < 0) {
|
||||
perror(msr_path);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
retval = pread(fd, &old_msr, sizeof old_msr, offset);
|
||||
if (retval != sizeof old_msr) {
|
||||
perror("pwrite");
|
||||
printf("pread cpu%d 0x%x = %d\n", cpu, offset, retval);
|
||||
exit(-2);
|
||||
}
|
||||
|
||||
retval = pwrite(fd, &new_msr, sizeof new_msr, offset);
|
||||
if (retval != sizeof new_msr) {
|
||||
perror("pwrite");
|
||||
printf("pwrite cpu%d 0x%x = %d\n", cpu, offset, retval);
|
||||
exit(-2);
|
||||
}
|
||||
|
||||
close(fd);
|
||||
|
||||
return old_msr;
|
||||
}
|
||||
|
||||
void print_msr(int cpu)
|
||||
{
|
||||
printf("cpu%d: 0x%016llx\n",
|
||||
cpu, get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS));
|
||||
}
|
||||
|
||||
void update_msr(int cpu)
|
||||
{
|
||||
unsigned long long previous_msr;
|
||||
|
||||
previous_msr = put_msr(cpu, new_bias, MSR_IA32_ENERGY_PERF_BIAS);
|
||||
|
||||
if (verbose)
|
||||
printf("cpu%d msr0x%x 0x%016llx -> 0x%016llx\n",
|
||||
cpu, MSR_IA32_ENERGY_PERF_BIAS, previous_msr, new_bias);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
char *proc_stat = "/proc/stat";
|
||||
/*
|
||||
* run func() on every cpu in /dev/cpu
|
||||
*/
|
||||
void for_every_cpu(void (func)(int))
|
||||
{
|
||||
FILE *fp;
|
||||
int retval;
|
||||
|
||||
fp = fopen(proc_stat, "r");
|
||||
if (fp == NULL) {
|
||||
perror(proc_stat);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
|
||||
if (retval != 0) {
|
||||
perror("/proc/stat format");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
while (1) {
|
||||
int cpu;
|
||||
|
||||
retval = fscanf(fp,
|
||||
"cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n",
|
||||
&cpu);
|
||||
if (retval != 1)
|
||||
return;
|
||||
|
||||
func(cpu);
|
||||
}
|
||||
fclose(fp);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
cmdline(argc, argv);
|
||||
|
||||
if (verbose > 1)
|
||||
printf("x86_energy_perf_policy Nov 24, 2010"
|
||||
" - Len Brown <lenb@kernel.org>\n");
|
||||
if (verbose > 1 && !read_only)
|
||||
printf("new_bias %lld\n", new_bias);
|
||||
|
||||
validate_cpuid();
|
||||
|
||||
if (cpu != -1) {
|
||||
if (read_only)
|
||||
print_msr(cpu);
|
||||
else
|
||||
update_msr(cpu);
|
||||
} else {
|
||||
if (read_only)
|
||||
for_every_cpu(print_msr);
|
||||
else
|
||||
for_every_cpu(update_msr);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
Loading…
Reference in a new issue