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kgdb: always use icache flush for sw breakpoints

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On the ppc 4xx architecture the instruction cache must be flushed as
well as the data cache.  This patch just makes it generic for all
architectures where CACHE_FLUSH_IS_SAFE is set to 1.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Jason Wessel 2008-04-01 16:55:28 -05:00 committed by Ingo Molnar
parent 56fb709329
commit 1a9a3e76dd
1 changed files with 2 additions and 2 deletions
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4
kernel/kgdb.c
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@ -591,9 +591,9 @@ static void kgdb_flush_swbreak_addr(unsigned long addr)
if (current->mm && current->mm->mmap_cache) {
flush_cache_range(current->mm->mmap_cache,
addr, addr + BREAK_INSTR_SIZE);
} else {
flush_icache_range(addr, addr + BREAK_INSTR_SIZE);
}
/* Force flush instruction cache if it was outside the mm */
flush_icache_range(addr, addr + BREAK_INSTR_SIZE);
}
/*