davinci: am18x/da850/omap-l138 evm: setup NAND flash timing
Setup the NAND flash timings for DA850 EVM Before configuring the timing values, throughput calculation using dd command yielded 469 kB/s write and 966 kB/s read speed. After the timing configuration, the throughput was measured to be 2.4 MB/s write and 5 MB/s read. [Mukul Bhatnagar: actual calculation of timing values from the NAND datasheet] Signed-off-by: Sekhar Nori <nsekhar@ti.com> Cc: Mukul Bhatnagar <mbhatnagar@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
parent
217f13662f
commit
18a8505cc1
1 changed files with 12 additions and 0 deletions
|
@ -36,6 +36,7 @@
|
|||
#include <mach/da8xx.h>
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/aemif.h>
|
||||
|
||||
#define DA850_EVM_PHY_MASK 0x1
|
||||
#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
|
||||
|
@ -143,12 +144,23 @@ static struct mtd_partition da850_evm_nandflash_partition[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct davinci_aemif_timing da850_evm_nandflash_timing = {
|
||||
.wsetup = 24,
|
||||
.wstrobe = 21,
|
||||
.whold = 14,
|
||||
.rsetup = 19,
|
||||
.rstrobe = 50,
|
||||
.rhold = 0,
|
||||
.ta = 20,
|
||||
};
|
||||
|
||||
static struct davinci_nand_pdata da850_evm_nandflash_data = {
|
||||
.parts = da850_evm_nandflash_partition,
|
||||
.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
|
||||
.ecc_mode = NAND_ECC_HW,
|
||||
.ecc_bits = 4,
|
||||
.options = NAND_USE_FLASH_BBT,
|
||||
.timing = &da850_evm_nandflash_timing,
|
||||
};
|
||||
|
||||
static struct resource da850_evm_nandflash_resource[] = {
|
||||
|
|
Loading…
Reference in a new issue