ASoC: davinci-mcasp: Active slots depend on active serializers
Active slots count depends on the number of channels in the stream and the number of active serializers. Each serializer will handle at most the number of channels specified via 'tdm-slots' parameter in DT. There are two possible scenarios: - Single serializer: channel count fits in the max slots supported by McASP serializers, active slots is same as channel count - Multiple serializers: channel count is bigger than max slots supported by a serializer. Channel count determines how many serializers are needed at their max slot count configuration Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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1 changed files with 22 additions and 5 deletions
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@ -629,13 +629,29 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
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return 0;
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}
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static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream)
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static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream,
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int channels)
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{
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int i, active_slots;
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int total_slots;
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int active_serializers;
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u32 mask = 0;
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u32 busel = 0;
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active_slots = mcasp->tdm_slots;
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total_slots = mcasp->tdm_slots;
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/*
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* If more than one serializer is needed, then use them with
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* their specified tdm_slots count. Otherwise, one serializer
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* can cope with the transaction using as many slots as channels
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* in the stream, requires channels symmetry
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*/
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active_serializers = (channels + total_slots - 1) / total_slots;
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if (active_serializers == 1)
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active_slots = channels;
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else
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active_slots = total_slots;
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for (i = 0; i < active_slots; i++)
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mask |= (1 << i);
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@ -647,12 +663,12 @@ static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream)
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mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, mask);
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mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, busel | TXORD);
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mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG,
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FSXMOD(active_slots), FSXMOD(0x1FF));
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FSXMOD(total_slots), FSXMOD(0x1FF));
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mcasp_set_reg(mcasp, DAVINCI_MCASP_RXTDM_REG, mask);
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mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD);
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mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG,
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FSRMOD(active_slots), FSRMOD(0x1FF));
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FSRMOD(total_slots), FSRMOD(0x1FF));
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return 0;
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}
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@ -766,7 +782,8 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
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if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE)
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ret = mcasp_dit_hw_param(mcasp, params_rate(params));
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else
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ret = mcasp_i2s_hw_param(mcasp, substream->stream);
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ret = mcasp_i2s_hw_param(mcasp, substream->stream,
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channels);
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if (ret)
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return ret;
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