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ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support

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The Tamonten Evaluation Carrier is an evaluation board for the Tamonten
SOM. More information is available here:

	http://www.avionic-design.de/en/products/nvidia-tegra-tamonten-system-en/nvidia-tegra-tamonten-evboard-en.html

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Thierry Reding 2012-09-20 17:06:09 +02:00 committed by Stephen Warren
parent 731fb450ae
commit 175f16fa38
2 changed files with 54 additions and 0 deletions
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53
arch/arm/boot/dts/tegra20-tec.dts Normal file
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@ -0,0 +1,53 @@
/dts-v1/;
/include/ "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Tamonten Evaluation Carrier";
compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
i2c@7000c000 {
clock-frequency = <400000>;
status = "okay";
wm8903: wm8903@1a {
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
interrupts = <187 0x04>;
gpio-controller;
#gpio-cells = <2>;
micdet-cfg = <0>;
micdet-delay = <100>;
gpio-cfg = <0xffffffff
0xffffffff
0
0xffffffff
0xffffffff>;
};
};
sound {
compatible = "ad,tegra-audio-wm8903-tec",
"nvidia,tegra-audio-wm8903";
nvidia,model = "Avionic Design TEC";
nvidia,audio-routing =
"Headphone Jack", "HPOUTR",
"Headphone Jack", "HPOUTL",
"Int Spk", "ROP",
"Int Spk", "RON",
"Int Spk", "LOP",
"Int Spk", "LON",
"Mic Jack", "MICBIAS",
"IN1L", "Mic Jack";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
};
};

1
arch/arm/mach-tegra/Makefile.boot
View file

@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-medcom-wide.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-plutux.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-tec.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-whistler.dtb