MPSC serial driver tx locking
The MPSC serial driver assumes that interrupt is always on to pick up the DMA transmit ops that aren't submitted while the DMA engine is active. However when irqs are off for a period of time such as operations under kernel crash dump console messages do not show up due to additional DMA ops are being dropped. This makes console writes to process through all the tx DMAs queued up before submitting a new request. Also, the current locking mechanism does not protect the hardware registers and ring buffer when a printk is done during the serial write operations. The additional per port transmit lock provides a finer granular locking and protects registers being clobbered while printks are nested within UART writes. Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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1 changed files with 24 additions and 1 deletions
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@ -183,6 +183,7 @@ struct mpsc_port_info {
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u8 *txb_p; /* Phys addr of txb */
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u8 *txb_p; /* Phys addr of txb */
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int txr_head; /* Where new data goes */
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int txr_head; /* Where new data goes */
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int txr_tail; /* Where sent data comes off */
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int txr_tail; /* Where sent data comes off */
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spinlock_t tx_lock; /* transmit lock */
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/* Mirrored values of regs we can't read (if 'mirror_regs' set) */
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/* Mirrored values of regs we can't read (if 'mirror_regs' set) */
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u32 MPSC_MPCR_m;
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u32 MPSC_MPCR_m;
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@ -1212,6 +1213,9 @@ mpsc_tx_intr(struct mpsc_port_info *pi)
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{
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{
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struct mpsc_tx_desc *txre;
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struct mpsc_tx_desc *txre;
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int rc = 0;
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int rc = 0;
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unsigned long iflags;
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spin_lock_irqsave(&pi->tx_lock, iflags);
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if (!mpsc_sdma_tx_active(pi)) {
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if (!mpsc_sdma_tx_active(pi)) {
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txre = (struct mpsc_tx_desc *)(pi->txr +
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txre = (struct mpsc_tx_desc *)(pi->txr +
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@ -1248,6 +1252,7 @@ mpsc_tx_intr(struct mpsc_port_info *pi)
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mpsc_sdma_start_tx(pi); /* start next desc if ready */
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mpsc_sdma_start_tx(pi); /* start next desc if ready */
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}
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}
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spin_unlock_irqrestore(&pi->tx_lock, iflags);
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return rc;
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return rc;
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}
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}
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@ -1338,11 +1343,16 @@ static void
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mpsc_start_tx(struct uart_port *port)
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mpsc_start_tx(struct uart_port *port)
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{
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{
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struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
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struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
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unsigned long iflags;
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spin_lock_irqsave(&pi->tx_lock, iflags);
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mpsc_unfreeze(pi);
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mpsc_unfreeze(pi);
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mpsc_copy_tx_data(pi);
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mpsc_copy_tx_data(pi);
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mpsc_sdma_start_tx(pi);
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mpsc_sdma_start_tx(pi);
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spin_unlock_irqrestore(&pi->tx_lock, iflags);
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pr_debug("mpsc_start_tx[%d]\n", port->line);
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pr_debug("mpsc_start_tx[%d]\n", port->line);
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return;
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return;
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}
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}
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@ -1625,6 +1635,16 @@ mpsc_console_write(struct console *co, const char *s, uint count)
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struct mpsc_port_info *pi = &mpsc_ports[co->index];
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struct mpsc_port_info *pi = &mpsc_ports[co->index];
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u8 *bp, *dp, add_cr = 0;
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u8 *bp, *dp, add_cr = 0;
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int i;
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int i;
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unsigned long iflags;
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spin_lock_irqsave(&pi->tx_lock, iflags);
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while (pi->txr_head != pi->txr_tail) {
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while (mpsc_sdma_tx_active(pi))
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udelay(100);
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mpsc_sdma_intr_ack(pi);
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mpsc_tx_intr(pi);
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}
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while (mpsc_sdma_tx_active(pi))
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while (mpsc_sdma_tx_active(pi))
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udelay(100);
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udelay(100);
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@ -1668,6 +1688,7 @@ mpsc_console_write(struct console *co, const char *s, uint count)
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pi->txr_tail = (pi->txr_tail + 1) & (MPSC_TXR_ENTRIES - 1);
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pi->txr_tail = (pi->txr_tail + 1) & (MPSC_TXR_ENTRIES - 1);
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}
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}
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spin_unlock_irqrestore(&pi->tx_lock, iflags);
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return;
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return;
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}
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}
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@ -2005,7 +2026,8 @@ mpsc_drv_probe(struct platform_device *dev)
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if (!(rc = mpsc_drv_map_regs(pi, dev))) {
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if (!(rc = mpsc_drv_map_regs(pi, dev))) {
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mpsc_drv_get_platform_data(pi, dev, dev->id);
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mpsc_drv_get_platform_data(pi, dev, dev->id);
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if (!(rc = mpsc_make_ready(pi)))
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if (!(rc = mpsc_make_ready(pi))) {
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spin_lock_init(&pi->tx_lock);
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if (!(rc = uart_add_one_port(&mpsc_reg,
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if (!(rc = uart_add_one_port(&mpsc_reg,
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&pi->port)))
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&pi->port)))
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rc = 0;
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rc = 0;
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@ -2014,6 +2036,7 @@ mpsc_drv_probe(struct platform_device *dev)
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(struct uart_port *)pi);
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(struct uart_port *)pi);
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mpsc_drv_unmap_regs(pi);
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mpsc_drv_unmap_regs(pi);
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}
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}
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}
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else
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else
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mpsc_drv_unmap_regs(pi);
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mpsc_drv_unmap_regs(pi);
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}
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}
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