pinctrl: sunxi: Move Allwinner A31 special pins driver to a driver of its own
Move the pin description to a driver specific to be. This is one more step toward retiring pinctrl-sunxi-pins.h that used to define all the pins for all the Allwinner SoCs in a single header, that would have in turn result in having these structures in the final binary as many times as the header was included. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Maxime Ripard
parent
1c996176e7
commit
16c675f989
4 changed files with 123 additions and 75 deletions
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@ -6,3 +6,4 @@ obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun4i-a10.o
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obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun5i-a10s.o
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obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun5i-a13.o
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obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun6i-a31.o
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obj-$(CONFIG_PINCTRL_SUNXI) += pinctrl-sun6i-a31-r.o
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122
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
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122
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
Normal file
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@ -0,0 +1,122 @@
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/*
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* Allwinner A31 SoCs special pins pinctrl driver.
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*
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* Copyright (C) 2014 Boris Brezillon
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* Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* Copyright (C) 2014 Maxime Ripard
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-sunxi.h"
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static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */
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SUNXI_FUNCTION(0x3, "s_p2wi")), /* SCK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */
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SUNXI_FUNCTION(0x3, "s_p2wi")), /* SDA */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart")), /* TX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart")), /* RX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_ir")), /* RX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* MS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* CK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* DO */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* DI */
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "1wire")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "rtc")), /* CLKO */
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};
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static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
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.pins = sun6i_a31_r_pins,
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.npins = ARRAY_SIZE(sun6i_a31_r_pins),
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.pin_base = PL_BASE,
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};
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static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
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{
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return sunxi_pinctrl_init(pdev,
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&sun6i_a31_r_pinctrl_data);
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}
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static struct of_device_id sun6i_a31_r_pinctrl_match[] = {
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{ .compatible = "allwinner,sun6i-a31-r-pinctrl", },
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{}
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};
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MODULE_DEVICE_TABLE(of, sun6i_a31_r_pinctrl_match);
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static struct platform_driver sun6i_a31_r_pinctrl_driver = {
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.probe = sun6i_a31_r_pinctrl_probe,
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.driver = {
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.name = "sun6i-a31-r-pinctrl",
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.owner = THIS_MODULE,
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.of_match_table = sun6i_a31_r_pinctrl_match,
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},
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};
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module_platform_driver(sun6i_a31_r_pinctrl_driver);
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MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com");
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MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
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MODULE_DESCRIPTION("Allwinner A31 R_PIO pinctrl driver");
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MODULE_LICENSE("GPL");
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@ -15,74 +15,6 @@
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#include "pinctrl-sunxi.h"
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static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */
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SUNXI_FUNCTION(0x3, "s_p2wi")), /* SCK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */
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SUNXI_FUNCTION(0x3, "s_p2wi")), /* SDA */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart")), /* TX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart")), /* RX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_ir")), /* RX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* MS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* CK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* DO */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag")), /* DI */
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "1wire")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out")),
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SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "rtc")), /* CLKO */
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};
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static const struct sunxi_desc_pin sun7i_a20_pins[] = {
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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@ -1098,12 +1030,6 @@ static const struct sunxi_desc_pin sun7i_a20_pins[] = {
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SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
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};
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static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
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.pins = sun6i_a31_r_pins,
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.npins = ARRAY_SIZE(sun6i_a31_r_pins),
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.pin_base = PL_BASE,
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};
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static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_data = {
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.pins = sun7i_a20_pins,
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.npins = ARRAY_SIZE(sun7i_a20_pins),
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@ -674,7 +674,6 @@ static void sunxi_pinctrl_irq_handler(unsigned irq, struct irq_desc *desc)
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}
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static struct of_device_id sunxi_pinctrl_match[] = {
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{ .compatible = "allwinner,sun6i-a31-r-pinctrl", .data = (void *)&sun6i_a31_r_pinctrl_data },
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{ .compatible = "allwinner,sun7i-a20-pinctrl", .data = (void *)&sun7i_a20_pinctrl_data },
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{}
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};
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