PCI: quirk to disable e100 interrupt if RESET failed to

Without this quirk, e100 can be pulling on a shared
interrupt line when another device (eg. USB) loads,
causing the interrupt to scream and get disabled.

http://bugzilla.kernel.org/show_bug.cgi?id=5918

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Len Brown <len.brown@intel.com>
This commit is contained in:
Bjorn Helgaas 2006-04-05 08:47:00 -04:00 committed by Len Brown
parent b4e54de8d3
commit 16a7474423

View file

@ -1511,6 +1511,63 @@ static void __devinit quirk_netmos(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos);
static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
{
u16 command;
u32 bar;
u8 __iomem *csr;
u8 cmd_hi;
switch (dev->device) {
/* PCI IDs taken from drivers/net/e100.c */
case 0x1029:
case 0x1030 ... 0x1034:
case 0x1038 ... 0x103E:
case 0x1050 ... 0x1057:
case 0x1059:
case 0x1064 ... 0x106B:
case 0x1091 ... 0x1095:
case 0x1209:
case 0x1229:
case 0x2449:
case 0x2459:
case 0x245D:
case 0x27DC:
break;
default:
return;
}
/*
* Some firmware hands off the e100 with interrupts enabled,
* which can cause a flood of interrupts if packets are
* received before the driver attaches to the device. So
* disable all e100 interrupts here. The driver will
* re-enable them when it's ready.
*/
pci_read_config_word(dev, PCI_COMMAND, &command);
pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar);
if (!(command & PCI_COMMAND_MEMORY) || !bar)
return;
csr = ioremap(bar, 8);
if (!csr) {
printk(KERN_WARNING "PCI: Can't map %s e100 registers\n",
pci_name(dev));
return;
}
cmd_hi = readb(csr + 3);
if (cmd_hi == 0) {
printk(KERN_WARNING "PCI: Firmware left %s e100 interrupts "
"enabled, disabling\n", pci_name(dev));
writeb(1, csr + 3);
}
iounmap(csr);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_e100_interrupt);
static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
{