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mvebu fixes for v3.13 (incremental #2)

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- allow building and booting DT and non-DT plat-orion SoCs
  - catch proper return value for kirkwood_pm_init()
  - properly check return of of_iomap to solve boot hangs (mirabox, others)
  - remove a compile warning on Armada 370 with non-SMP.
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Merge tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu into fixes

mvebu fixes for v3.13 (incremental #2)

 - allow building and booting DT and non-DT plat-orion SoCs
 - catch proper return value for kirkwood_pm_init()
 - properly check return of of_iomap to solve boot hangs (mirabox, others)
 - remove a compile warning on Armada 370 with non-SMP.

* tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: fix compilation warning on Armada 370 (i.e. non-SMP)
  ARM: mvebu: Fix kernel hang in mvebu_soc_id_init() when of_iomap failed
  ARM: kirkwood: kirkwood_pm_init() should return void
  ARM: orion: provide C-style interrupt handler for MULTI_IRQ_HANDLER

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-01-31 14:59:28 -08:00
commit 167eeb4700
4 changed files with 52 additions and 5 deletions
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4
arch/arm/mach-kirkwood/pm.c
View file

@ -18,6 +18,7 @@
#include <linux/suspend.h>
#include <linux/io.h>
#include <mach/bridge-regs.h>
#include "common.h"
static void __iomem *ddr_operation_base;
@ -65,9 +66,8 @@ static const struct platform_suspend_ops kirkwood_suspend_ops = {
.valid = kirkwood_pm_valid_standby,
};
int __init kirkwood_pm_init(void)
void __init kirkwood_pm_init(void)
{
ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4);
suspend_set_ops(&kirkwood_suspend_ops);
return 0;
}

2
arch/arm/mach-mvebu/mvebu-soc-id.c
View file

@ -88,7 +88,7 @@ static int __init mvebu_soc_id_init(void)
}
pci_base = of_iomap(child, 0);
if (IS_ERR(pci_base)) {
if (pci_base == NULL) {
pr_err("cannot map registers\n");
ret = -ENOMEM;
goto res_ioremap;

47
arch/arm/plat-orion/irq.c
View file

@ -15,8 +15,51 @@
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <asm/exception.h>
#include <plat/irq.h>
#include <plat/orion-gpio.h>
#include <mach/bridge-regs.h>
#ifdef CONFIG_MULTI_IRQ_HANDLER
/*
* Compiling with both non-DT and DT support enabled, will
* break asm irq handler used by non-DT boards. Therefore,
* we provide a C-style irq handler even for non-DT boards,
* if MULTI_IRQ_HANDLER is set.
*
* Notes:
* - this is prepared for Kirkwood and Dove only, update
* accordingly if you add Orion5x or MV78x00.
* - Orion5x uses different macro names and has only one
* set of CAUSE/MASK registers.
* - MV78x00 uses the same macro names but has a third
* set of CAUSE/MASK registers.
*
*/
static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
asmlinkage void
__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
{
u32 stat;
stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
if (stat) {
unsigned int hwirq = __fls(stat);
handle_IRQ(hwirq, regs);
return;
}
stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
if (stat) {
unsigned int hwirq = 32 + __fls(stat);
handle_IRQ(hwirq, regs);
return;
}
}
#endif
void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
{
@ -35,6 +78,10 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
ct->chip.irq_unmask = irq_gc_mask_set_bit;
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
#ifdef CONFIG_MULTI_IRQ_HANDLER
set_handle_irq(orion_legacy_handle_irq);
#endif
}
#ifdef CONFIG_OF

4
drivers/irqchip/irq-armada-370-xp.c
View file

@ -59,8 +59,6 @@
#define PCI_MSI_DOORBELL_END (32)
#define PCI_MSI_DOORBELL_MASK 0xFFFF0000
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
static void __iomem *per_cpu_int_base;
static void __iomem *main_int_base;
static struct irq_domain *armada_370_xp_mpic_domain;
@ -239,6 +237,8 @@ static inline int armada_370_xp_msi_init(struct device_node *node,
#endif
#ifdef CONFIG_SMP
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
static int armada_xp_set_affinity(struct irq_data *d,
const struct cpumask *mask_val, bool force)
{