b43: N-PHY: implement very basic TX power control management
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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40277cabfe
commit
161d540c8e
2 changed files with 153 additions and 8 deletions
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@ -67,6 +67,8 @@ enum b43_nphy_rf_sequence {
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B43_RFSEQ_UPDATE_GAINU,
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};
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static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev,
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bool enable);
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static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
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u8 *events, u8 *delays, u8 length);
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static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
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@ -145,9 +147,153 @@ static void b43_chantab_phy_upload(struct b43_wldev *dev,
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b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlEnable */
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static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
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{
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struct b43_phy_n *nphy = dev->phy.n;
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u8 i;
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u16 tmp;
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if (nphy->hang_avoid)
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b43_nphy_stay_in_carrier_search(dev, 1);
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nphy->txpwrctrl = enable;
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if (!enable) {
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if (dev->phy.rev >= 3)
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; /* TODO */
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6840);
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for (i = 0; i < 84; i++)
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6C40);
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for (i = 0; i < 84; i++)
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
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tmp = B43_NPHY_TXPCTL_CMD_COEFF | B43_NPHY_TXPCTL_CMD_HWPCTLEN;
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if (dev->phy.rev >= 3)
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tmp |= B43_NPHY_TXPCTL_CMD_PCTLEN;
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b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD, ~tmp);
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if (dev->phy.rev >= 3) {
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
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} else {
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
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}
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if (dev->phy.rev == 2)
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b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
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~B43_NPHY_BPHY_CTL3_SCALE, 0x53);
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else if (dev->phy.rev < 2)
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b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
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~B43_NPHY_BPHY_CTL3_SCALE, 0x5A);
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if (dev->phy.rev < 2 && 0)
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; /* TODO */
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} else {
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b43err(dev->wl, "enabling tx pwr ctrl not implemented yet\n");
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}
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if (nphy->hang_avoid)
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b43_nphy_stay_in_carrier_search(dev, 0);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrFix */
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static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
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{
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//TODO
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struct b43_phy_n *nphy = dev->phy.n;
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struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
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u8 txpi[2], bbmult, i;
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u16 tmp, radio_gain, dac_gain;
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u16 freq = dev->phy.channel_freq;
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u32 txgain;
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/* u32 gaintbl; rev3+ */
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if (nphy->hang_avoid)
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b43_nphy_stay_in_carrier_search(dev, 1);
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if (dev->phy.rev >= 3) {
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txpi[0] = 40;
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txpi[1] = 40;
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} else if (sprom->revision < 4) {
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txpi[0] = 72;
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txpi[1] = 72;
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} else {
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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txpi[0] = sprom->txpid2g[0];
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txpi[1] = sprom->txpid2g[1];
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} else if (freq >= 4900 && freq < 5100) {
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txpi[0] = sprom->txpid5gl[0];
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txpi[1] = sprom->txpid5gl[1];
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} else if (freq >= 5100 && freq < 5500) {
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txpi[0] = sprom->txpid5g[0];
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txpi[1] = sprom->txpid5g[1];
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} else if (freq >= 5500) {
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txpi[0] = sprom->txpid5gh[0];
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txpi[1] = sprom->txpid5gh[1];
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} else {
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txpi[0] = 91;
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txpi[1] = 91;
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}
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}
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/*
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for (i = 0; i < 2; i++) {
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nphy->txpwrindex[i].index_internal = txpi[i];
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nphy->txpwrindex[i].index_internal_save = txpi[i];
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}
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*/
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for (i = 0; i < 2; i++) {
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if (dev->phy.rev >= 3) {
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/* TODO */
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radio_gain = (txgain >> 16) & 0x1FFFF;
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} else {
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txgain = b43_ntab_tx_gain_rev0_1_2[txpi[i]];
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radio_gain = (txgain >> 16) & 0x1FFF;
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}
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dac_gain = (txgain >> 8) & 0x3F;
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bbmult = txgain & 0xFF;
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if (dev->phy.rev >= 3) {
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if (i == 0)
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
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else
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
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} else {
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
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}
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if (i == 0)
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b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN1, dac_gain);
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else
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b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN2, dac_gain);
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D10 + i);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, radio_gain);
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
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tmp = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
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if (i == 0)
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tmp = (tmp & 0x00FF) | (bbmult << 8);
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else
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tmp = (tmp & 0xFF00) | bbmult;
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b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
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b43_phy_write(dev, B43_NPHY_TABLE_DATALO, tmp);
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if (0)
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; /* TODO */
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}
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b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT);
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if (nphy->hang_avoid)
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b43_nphy_stay_in_carrier_search(dev, 0);
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}
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@ -2351,7 +2497,7 @@ static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
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struct nphy_txgains target;
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const u32 *table = NULL;
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if (nphy->txpwrctrl == 0) {
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if (!nphy->txpwrctrl) {
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int i;
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if (nphy->hang_avoid)
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@ -3260,9 +3406,8 @@ int b43_phy_initn(struct b43_wldev *dev)
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b43_nphy_bphy_init(dev);
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tx_pwr_state = nphy->txpwrctrl;
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/* TODO N PHY TX power control with argument 0
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(turning off power control) */
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/* TODO Fix the TX Power Settings */
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b43_nphy_tx_power_ctrl(dev, false);
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b43_nphy_tx_power_fix(dev);
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/* TODO N PHY TX Power Control Idle TSSI */
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/* TODO N PHY TX Power Control Setup */
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@ -3333,7 +3478,7 @@ int b43_phy_initn(struct b43_wldev *dev)
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}
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b43_nphy_tx_pwr_ctrl_coef_setup(dev);
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/* TODO N PHY TX Power Control Enable with argument tx_pwr_state */
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b43_nphy_tx_power_ctrl(dev, tx_pwr_state);
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b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
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b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
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if (phy->rev >= 3 && phy->rev <= 6)
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@ -3384,7 +3529,7 @@ static void b43_nphy_channel_setup(struct b43_wldev *dev,
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b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
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}
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if (nphy->txpwrctrl)
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if (!nphy->txpwrctrl)
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b43_nphy_tx_power_fix(dev);
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if (dev->phy.rev < 3)
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@ -782,7 +782,7 @@ struct b43_phy_n {
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u16 mphase_txcal_numcmds;
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u16 mphase_txcal_bestcoeffs[11];
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u8 txpwrctrl;
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bool txpwrctrl;
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u16 txcal_bbmult;
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u16 txiqlocal_bestc[11];
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bool txiqlocal_coeffsvalid;
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