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ARM: proc: add Cortex-A5 proc info

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This patch adds processor info for ARM Ltd. Cortex A5,
which has SCU initialisation procedure identical to A9.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Pawel Moll 2011-05-20 14:39:29 +01:00 committed by Will Deacon
parent dc939cd835
commit 15eb169bfe
1 changed files with 11 additions and 0 deletions
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11
arch/arm/mm/proc-v7.S
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@ -278,6 +278,7 @@ cpu_resume_l1_flags:
* It is assumed that: * It is assumed that:
* - cache type register is implemented * - cache type register is implemented
*/ */
__v7_ca5mp_setup:
__v7_ca9mp_setup: __v7_ca9mp_setup:
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
ALT_SMP(mrc p15, 0, r0, c1, c0, 1) ALT_SMP(mrc p15, 0, r0, c1, c0, 1)
@ -443,6 +444,16 @@ __v7_setup_stack:
.long v7_cache_fns .long v7_cache_fns
.endm .endm
/*
* ARM Ltd. Cortex A5 processor.
*/
.type __v7_ca5mp_proc_info, #object
__v7_ca5mp_proc_info:
.long 0x410fc050
.long 0xff0ffff0
__v7_proc __v7_ca5mp_setup
.size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
/* /*
* ARM Ltd. Cortex A9 processor. * ARM Ltd. Cortex A9 processor.
*/ */