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[PATCH] x86_64: Support constant TSC feature in future AMD CPUs.

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Based on the documentation recently posted by Richard Brunner.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Andi Kleen 2006-01-11 22:42:02 +01:00 committed by Linus Torvalds
parent 2765130b02
commit 130951ccb1
1 changed files with 6 additions and 0 deletions
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6
arch/x86_64/kernel/setup.c
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@ -910,6 +910,10 @@ static int __init init_amd(struct cpuinfo_x86 *c)
} }
display_cacheinfo(c); display_cacheinfo(c);
/* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
if (c->x86_power & (1<<8))
set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
if (c->extended_cpuid_level >= 0x80000008) { if (c->extended_cpuid_level >= 0x80000008) {
c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1; c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
if (c->x86_max_cores & (c->x86_max_cores - 1)) if (c->x86_max_cores & (c->x86_max_cores - 1))
@ -1268,6 +1272,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
"ttp", /* thermal trip */ "ttp", /* thermal trip */
"tm", "tm",
"stc" "stc"
"?",
"constant_tsc",
}; };