ARM: 8237/1: fix flush_pfn_alias
L1_CACHE_BYTES could be larger than real L1 cache line size. In that case, flush_pfn_alias() would omit to flush last bytes as much as L1_CACHE_BYTES - real cache line size. So fix end address to "to + PAGE_SIZE - 1". The bottom bits of the address is LINELEN. that is ignored by mcrr. Signed-off-by: Jungseung Lee <js07.lee@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -33,7 +33,7 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
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asm( "mcrr p15, 0, %1, %0, c14\n"
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" mcr p15, 0, %2, c7, c10, 4"
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:
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: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
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: "r" (to), "r" (to + PAGE_SIZE - 1), "r" (zero)
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: "cc");
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}
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