[POWERPC] Consolidate some of kernel/misc*.S
There were some common functions (mainly i/o). Also some small white space cleanups and remove a couple of small unused functions. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
parent
a240da35a1
commit
127efeb286
4 changed files with 209 additions and 334 deletions
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@ -50,7 +50,8 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
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extra-$(CONFIG_8xx) := head_8xx.o
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extra-y += vmlinux.lds
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obj-y += time.o prom.o traps.o setup-common.o udbg.o
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obj-y += time.o prom.o traps.o setup-common.o \
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udbg.o misc.o
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obj-$(CONFIG_PPC32) += entry_32.o setup_32.o misc_32.o
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obj-$(CONFIG_PPC64) += misc_64.o dma_64.o iommu.o
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obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
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203
arch/powerpc/kernel/misc.S
Normal file
203
arch/powerpc/kernel/misc.S
Normal file
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@ -0,0 +1,203 @@
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/*
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* This file contains miscellaneous low-level functions.
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
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* and Paul Mackerras.
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*
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* Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
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* PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/ppc_asm.h>
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.text
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#ifdef CONFIG_PPC64
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#define IN_SYNC twi 0,r5,0; isync
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#define EIEIO_32
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#define SYNC_64 sync
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#else /* CONFIG_PPC32 */
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#define IN_SYNC
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#define EIEIO_32 eieio
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#define SYNC_64
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#endif
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/*
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* Returns (address we are running at) - (address we were linked at)
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* for use before the text and data are mapped to KERNELBASE.
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*/
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_GLOBAL(reloc_offset)
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mflr r0
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bl 1f
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1: mflr r3
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LOAD_REG_IMMEDIATE(r4,1b)
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subf r3,r4,r3
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mtlr r0
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blr
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/*
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* add_reloc_offset(x) returns x + reloc_offset().
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*/
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_GLOBAL(add_reloc_offset)
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mflr r0
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bl 1f
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1: mflr r5
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LOAD_REG_IMMEDIATE(r4,1b)
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subf r5,r4,r5
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add r3,r3,r5
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mtlr r0
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blr
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/*
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* I/O string operations
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*
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* insb(port, buf, len)
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* outsb(port, buf, len)
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* insw(port, buf, len)
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* outsw(port, buf, len)
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* insl(port, buf, len)
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* outsl(port, buf, len)
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* insw_ns(port, buf, len)
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* outsw_ns(port, buf, len)
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* insl_ns(port, buf, len)
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* outsl_ns(port, buf, len)
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*
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* The *_ns versions don't do byte-swapping.
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*/
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_GLOBAL(_insb)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,1
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blelr-
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00: lbz r5,0(r3)
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eieio
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stbu r5,1(r4)
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bdnz 00b
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IN_SYNC
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blr
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_GLOBAL(_outsb)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,1
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blelr-
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00: lbzu r5,1(r4)
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stb r5,0(r3)
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EIEIO_32
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bdnz 00b
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SYNC_64
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blr
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_GLOBAL(_insw)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhbrx r5,0,r3
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eieio
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sthu r5,2(r4)
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bdnz 00b
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IN_SYNC
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blr
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_GLOBAL(_outsw)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhzu r5,2(r4)
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EIEIO_32
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sthbrx r5,0,r3
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bdnz 00b
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SYNC_64
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blr
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_GLOBAL(_insl)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwbrx r5,0,r3
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eieio
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stwu r5,4(r4)
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bdnz 00b
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IN_SYNC
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blr
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_GLOBAL(_outsl)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwzu r5,4(r4)
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stwbrx r5,0,r3
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EIEIO_32
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bdnz 00b
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SYNC_64
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blr
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#ifdef CONFIG_PPC32
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_GLOBAL(__ide_mm_insw)
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#endif
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_GLOBAL(_insw_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhz r5,0(r3)
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eieio
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sthu r5,2(r4)
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bdnz 00b
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IN_SYNC
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blr
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#ifdef CONFIG_PPC32
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_GLOBAL(__ide_mm_outsw)
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#endif
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_GLOBAL(_outsw_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhzu r5,2(r4)
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sth r5,0(r3)
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EIEIO_32
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bdnz 00b
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SYNC_64
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blr
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#ifdef CONFIG_PPC32
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_GLOBAL(__ide_mm_insl)
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#endif
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_GLOBAL(_insl_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwz r5,0(r3)
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eieio
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stwu r5,4(r4)
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bdnz 00b
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IN_SYNC
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blr
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#ifdef CONFIG_PPC32
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_GLOBAL(__ide_mm_outsl)
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#endif
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_GLOBAL(_outsl_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwzu r5,4(r4)
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stw r5,0(r3)
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EIEIO_32
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bdnz 00b
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SYNC_64
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blr
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@ -60,32 +60,6 @@ _GLOBAL(mulhdu)
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addze r3,r3
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blr
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/*
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* Returns (address we're running at) - (address we were linked at)
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* for use before the text and data are mapped to KERNELBASE.
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*/
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_GLOBAL(reloc_offset)
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mflr r0
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bl 1f
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1: mflr r3
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LOAD_REG_IMMEDIATE(r4,1b)
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subf r3,r4,r3
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mtlr r0
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blr
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/*
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* add_reloc_offset(x) returns x + reloc_offset().
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*/
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_GLOBAL(add_reloc_offset)
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mflr r0
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bl 1f
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1: mflr r5
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LOAD_REG_IMMEDIATE(r4,1b)
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subf r5,r4,r5
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add r3,r3,r5
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mtlr r0
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blr
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/*
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* sub_reloc_offset(x) returns x - reloc_offset().
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*/
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@ -780,136 +754,6 @@ _GLOBAL(atomic_set_mask)
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bne- 10b
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blr
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/*
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* I/O string operations
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*
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* insb(port, buf, len)
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* outsb(port, buf, len)
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* insw(port, buf, len)
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* outsw(port, buf, len)
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* insl(port, buf, len)
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* outsl(port, buf, len)
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* insw_ns(port, buf, len)
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* outsw_ns(port, buf, len)
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* insl_ns(port, buf, len)
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* outsl_ns(port, buf, len)
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*
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* The *_ns versions don't do byte-swapping.
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*/
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_GLOBAL(_insb)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,1
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blelr-
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00: lbz r5,0(r3)
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eieio
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stbu r5,1(r4)
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bdnz 00b
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blr
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_GLOBAL(_outsb)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,1
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blelr-
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00: lbzu r5,1(r4)
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stb r5,0(r3)
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eieio
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bdnz 00b
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blr
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_GLOBAL(_insw)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhbrx r5,0,r3
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eieio
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sthu r5,2(r4)
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bdnz 00b
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blr
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_GLOBAL(_outsw)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhzu r5,2(r4)
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eieio
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sthbrx r5,0,r3
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bdnz 00b
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blr
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_GLOBAL(_insl)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwbrx r5,0,r3
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eieio
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stwu r5,4(r4)
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bdnz 00b
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blr
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_GLOBAL(_outsl)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwzu r5,4(r4)
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stwbrx r5,0,r3
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eieio
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bdnz 00b
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blr
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_GLOBAL(__ide_mm_insw)
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_GLOBAL(_insw_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhz r5,0(r3)
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eieio
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sthu r5,2(r4)
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bdnz 00b
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blr
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_GLOBAL(__ide_mm_outsw)
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_GLOBAL(_outsw_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,2
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blelr-
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00: lhzu r5,2(r4)
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sth r5,0(r3)
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eieio
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bdnz 00b
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blr
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_GLOBAL(__ide_mm_insl)
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_GLOBAL(_insl_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwz r5,0(r3)
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eieio
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stwu r5,4(r4)
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bdnz 00b
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blr
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_GLOBAL(__ide_mm_outsl)
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_GLOBAL(_outsl_ns)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,4
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blelr-
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00: lwzu r5,4(r4)
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stw r5,0(r3)
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eieio
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bdnz 00b
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blr
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/*
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* Extended precision shifts.
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*
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@ -1,14 +1,12 @@
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/*
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* arch/powerpc/kernel/misc64.S
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*
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* This file contains miscellaneous low-level functions.
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
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* and Paul Mackerras.
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* Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
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* PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
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*
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* PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
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*
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* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
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* as published by the Free Software Foundation; either version
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@ -30,41 +28,10 @@
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.text
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/*
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* Returns (address we are running at) - (address we were linked at)
|
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* for use before the text and data are mapped to KERNELBASE.
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*/
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_GLOBAL(reloc_offset)
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mflr r0
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bl 1f
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1: mflr r3
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LOAD_REG_IMMEDIATE(r4,1b)
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subf r3,r4,r3
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mtlr r0
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blr
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/*
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* add_reloc_offset(x) returns x + reloc_offset().
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*/
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_GLOBAL(add_reloc_offset)
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mflr r0
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bl 1f
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1: mflr r5
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LOAD_REG_IMMEDIATE(r4,1b)
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subf r5,r4,r5
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add r3,r3,r5
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mtlr r0
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blr
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_GLOBAL(get_msr)
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mfmsr r3
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blr
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_GLOBAL(get_dar)
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mfdar r3
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blr
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_GLOBAL(get_srr0)
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mfsrr0 r3
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blr
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|
@ -72,10 +39,6 @@ _GLOBAL(get_srr0)
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_GLOBAL(get_srr1)
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mfsrr1 r3
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blr
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_GLOBAL(get_sp)
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mr r3,r1
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blr
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|
||||
#ifdef CONFIG_IRQSTACKS
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||||
_GLOBAL(call_do_softirq)
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|
@ -281,144 +244,6 @@ _GLOBAL(__flush_dcache_icache)
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bdnz 1b
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||||
isync
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||||
blr
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||||
|
||||
/*
|
||||
* I/O string operations
|
||||
*
|
||||
* insb(port, buf, len)
|
||||
* outsb(port, buf, len)
|
||||
* insw(port, buf, len)
|
||||
* outsw(port, buf, len)
|
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* insl(port, buf, len)
|
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* outsl(port, buf, len)
|
||||
* insw_ns(port, buf, len)
|
||||
* outsw_ns(port, buf, len)
|
||||
* insl_ns(port, buf, len)
|
||||
* outsl_ns(port, buf, len)
|
||||
*
|
||||
* The *_ns versions don't do byte-swapping.
|
||||
*/
|
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_GLOBAL(_insb)
|
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cmpwi 0,r5,0
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mtctr r5
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||||
subi r4,r4,1
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blelr-
|
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00: lbz r5,0(r3)
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eieio
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stbu r5,1(r4)
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bdnz 00b
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twi 0,r5,0
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isync
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blr
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_GLOBAL(_outsb)
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cmpwi 0,r5,0
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mtctr r5
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subi r4,r4,1
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blelr-
|
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00: lbzu r5,1(r4)
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stb r5,0(r3)
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bdnz 00b
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||||
sync
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||||
blr
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|
||||
_GLOBAL(_insw)
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cmpwi 0,r5,0
|
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mtctr r5
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||||
subi r4,r4,2
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||||
blelr-
|
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00: lhbrx r5,0,r3
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eieio
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sthu r5,2(r4)
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||||
bdnz 00b
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||||
twi 0,r5,0
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||||
isync
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blr
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|
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_GLOBAL(_outsw)
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cmpwi 0,r5,0
|
||||
mtctr r5
|
||||
subi r4,r4,2
|
||||
blelr-
|
||||
00: lhzu r5,2(r4)
|
||||
sthbrx r5,0,r3
|
||||
bdnz 00b
|
||||
sync
|
||||
blr
|
||||
|
||||
_GLOBAL(_insl)
|
||||
cmpwi 0,r5,0
|
||||
mtctr r5
|
||||
subi r4,r4,4
|
||||
blelr-
|
||||
00: lwbrx r5,0,r3
|
||||
eieio
|
||||
stwu r5,4(r4)
|
||||
bdnz 00b
|
||||
twi 0,r5,0
|
||||
isync
|
||||
blr
|
||||
|
||||
_GLOBAL(_outsl)
|
||||
cmpwi 0,r5,0
|
||||
mtctr r5
|
||||
subi r4,r4,4
|
||||
blelr-
|
||||
00: lwzu r5,4(r4)
|
||||
stwbrx r5,0,r3
|
||||
bdnz 00b
|
||||
sync
|
||||
blr
|
||||
|
||||
/* _GLOBAL(ide_insw) now in drivers/ide/ide-iops.c */
|
||||
_GLOBAL(_insw_ns)
|
||||
cmpwi 0,r5,0
|
||||
mtctr r5
|
||||
subi r4,r4,2
|
||||
blelr-
|
||||
00: lhz r5,0(r3)
|
||||
eieio
|
||||
sthu r5,2(r4)
|
||||
bdnz 00b
|
||||
twi 0,r5,0
|
||||
isync
|
||||
blr
|
||||
|
||||
/* _GLOBAL(ide_outsw) now in drivers/ide/ide-iops.c */
|
||||
_GLOBAL(_outsw_ns)
|
||||
cmpwi 0,r5,0
|
||||
mtctr r5
|
||||
subi r4,r4,2
|
||||
blelr-
|
||||
00: lhzu r5,2(r4)
|
||||
sth r5,0(r3)
|
||||
bdnz 00b
|
||||
sync
|
||||
blr
|
||||
|
||||
_GLOBAL(_insl_ns)
|
||||
cmpwi 0,r5,0
|
||||
mtctr r5
|
||||
subi r4,r4,4
|
||||
blelr-
|
||||
00: lwz r5,0(r3)
|
||||
eieio
|
||||
stwu r5,4(r4)
|
||||
bdnz 00b
|
||||
twi 0,r5,0
|
||||
isync
|
||||
blr
|
||||
|
||||
_GLOBAL(_outsl_ns)
|
||||
cmpwi 0,r5,0
|
||||
mtctr r5
|
||||
subi r4,r4,4
|
||||
blelr-
|
||||
00: lwzu r5,4(r4)
|
||||
stw r5,0(r3)
|
||||
bdnz 00b
|
||||
sync
|
||||
blr
|
||||
|
||||
/*
|
||||
* identify_cpu and calls setup_cpu
|
||||
|
@ -563,6 +388,7 @@ _GLOBAL(real_writeb)
|
|||
blr
|
||||
#endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ_PMAC64
|
||||
/*
|
||||
* SCOM access functions for 970 (FX only for now)
|
||||
*
|
||||
|
@ -631,6 +457,7 @@ _GLOBAL(scom970_write)
|
|||
/* restore interrupts */
|
||||
mtmsrd r5,1
|
||||
blr
|
||||
#endif /* CONFIG_CPU_FREQ_PMAC64 */
|
||||
|
||||
|
||||
/*
|
||||
|
|
Loading…
Reference in a new issue