[S390] atomic ops: add effecient atomic64 support for 31 bit
Use compare double and swap to implement efficient atomic64 ops for 31 bit. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Heiko Carstens
Martin Schwidefsky
parent
6ac2a4ddd1
commit
1275105851
2 changed files with 130 additions and 41 deletions
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@ -95,7 +95,6 @@ config S390
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select HAVE_ARCH_TRACEHOOK
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select INIT_ALL_POSSIBLE
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select HAVE_PERF_COUNTERS
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select GENERIC_ATOMIC64 if !64BIT
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config SCHED_OMIT_FRAME_POINTER
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bool
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@ -1,29 +1,21 @@
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#ifndef __ARCH_S390_ATOMIC__
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#define __ARCH_S390_ATOMIC__
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/*
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* Copyright 1999,2009 IBM Corp.
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Denis Joseph Barrow,
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* Arnd Bergmann <arndb@de.ibm.com>,
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*
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* Atomic operations that C can't guarantee us.
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* Useful for resource counting etc.
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* s390 uses 'Compare And Swap' for atomicity in SMP enviroment.
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*
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*/
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#include <linux/compiler.h>
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#include <linux/types.h>
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/*
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* include/asm-s390/atomic.h
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*
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* S390 version
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* Copyright (C) 1999-2005 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
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* Denis Joseph Barrow,
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* Arnd Bergmann (arndb@de.ibm.com)
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*
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* Derived from "include/asm-i386/bitops.h"
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* Copyright (C) 1992, Linus Torvalds
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*
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*/
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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* S390 uses 'Compare And Swap' for atomicity in SMP enviroment
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*/
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#define ATOMIC_INIT(i) { (i) }
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#ifdef __KERNEL__
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@ -146,9 +138,10 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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#undef __CS_LOOP
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#ifdef __s390x__
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#define ATOMIC64_INIT(i) { (i) }
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#ifdef CONFIG_64BIT
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#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
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#define __CSG_LOOP(ptr, op_val, op_string) ({ \
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@ -202,21 +195,11 @@ static __inline__ long long atomic64_add_return(long long i, atomic64_t * v)
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{
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return __CSG_LOOP(v, i, "agr");
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}
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#define atomic64_add(_i, _v) atomic64_add_return(_i, _v)
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#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0)
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#define atomic64_inc(_v) atomic64_add_return(1, _v)
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#define atomic64_inc_return(_v) atomic64_add_return(1, _v)
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#define atomic64_inc_and_test(_v) (atomic64_add_return(1, _v) == 0)
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static __inline__ long long atomic64_sub_return(long long i, atomic64_t * v)
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{
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return __CSG_LOOP(v, i, "sgr");
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}
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#define atomic64_sub(_i, _v) atomic64_sub_return(_i, _v)
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#define atomic64_sub_and_test(_i, _v) (atomic64_sub_return(_i, _v) == 0)
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#define atomic64_dec(_v) atomic64_sub_return(1, _v)
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#define atomic64_dec_return(_v) atomic64_sub_return(1, _v)
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#define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0)
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static __inline__ void atomic64_clear_mask(unsigned long mask, atomic64_t * v)
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{
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@ -249,6 +232,111 @@ static __inline__ long long atomic64_cmpxchg(atomic64_t *v,
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return old;
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}
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#undef __CSG_LOOP
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#else /* CONFIG_64BIT */
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typedef struct {
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long long counter;
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} atomic64_t;
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static inline long long atomic64_read(const atomic64_t *v)
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{
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register_pair rp;
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asm volatile(
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" lm %0,%N0,0(%1)"
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: "=&d" (rp)
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: "a" (&v->counter), "m" (v->counter)
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);
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return rp.pair;
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}
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static inline void atomic64_set(atomic64_t *v, long long i)
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{
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register_pair rp = {.pair = i};
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asm volatile(
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" stm %1,%N1,0(%2)"
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: "=m" (v->counter)
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: "d" (rp), "a" (&v->counter)
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);
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}
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static inline long long atomic64_xchg(atomic64_t *v, long long new)
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{
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register_pair rp_new = {.pair = new};
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register_pair rp_old;
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asm volatile(
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" lm %0,%N0,0(%2)\n"
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"0: cds %0,%3,0(%2)\n"
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" jl 0b\n"
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: "=&d" (rp_old), "+m" (v->counter)
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: "a" (&v->counter), "d" (rp_new)
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: "cc");
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return rp_old.pair;
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}
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static inline long long atomic64_cmpxchg(atomic64_t *v,
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long long old, long long new)
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{
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register_pair rp_old = {.pair = old};
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register_pair rp_new = {.pair = new};
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asm volatile(
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" cds %0,%3,0(%2)"
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: "+&d" (rp_old), "+m" (v->counter)
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: "a" (&v->counter), "d" (rp_new)
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: "cc");
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return rp_old.pair;
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}
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static inline long long atomic64_add_return(long long i, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old + i;
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} while (atomic64_cmpxchg(v, old, new) != old);
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return new;
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}
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static inline long long atomic64_sub_return(long long i, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old - i;
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} while (atomic64_cmpxchg(v, old, new) != old);
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return new;
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}
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static inline void atomic64_set_mask(unsigned long long mask, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old | mask;
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} while (atomic64_cmpxchg(v, old, new) != old);
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}
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static inline void atomic64_clear_mask(unsigned long long mask, atomic64_t *v)
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{
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long long old, new;
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do {
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old = atomic64_read(v);
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new = old & mask;
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} while (atomic64_cmpxchg(v, old, new) != old);
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}
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#endif /* CONFIG_64BIT */
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static __inline__ int atomic64_add_unless(atomic64_t *v,
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long long a, long long u)
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{
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@ -265,15 +353,17 @@ static __inline__ int atomic64_add_unless(atomic64_t *v,
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return c != u;
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}
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
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#undef __CSG_LOOP
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#else /* __s390x__ */
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#include <asm-generic/atomic64.h>
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#endif /* __s390x__ */
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#define atomic64_add(_i, _v) atomic64_add_return(_i, _v)
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#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0)
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#define atomic64_inc(_v) atomic64_add_return(1, _v)
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#define atomic64_inc_return(_v) atomic64_add_return(1, _v)
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#define atomic64_inc_and_test(_v) (atomic64_add_return(1, _v) == 0)
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#define atomic64_sub(_i, _v) atomic64_sub_return(_i, _v)
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#define atomic64_sub_and_test(_i, _v) (atomic64_sub_return(_i, _v) == 0)
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#define atomic64_dec(_v) atomic64_sub_return(1, _v)
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#define atomic64_dec_return(_v) atomic64_sub_return(1, _v)
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#define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
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#define smp_mb__before_atomic_dec() smp_mb()
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#define smp_mb__after_atomic_dec() smp_mb()
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