[PATCH] USB: EHCI port tweaks
One change may improve some S1 or S3 resume cases, and the other seems mostly to explain some strange state "lsusb" would show. Two fixes: - On resume, don't think about resuming any unpowered port, or resetting any port with OWNER set to the OHCI/UHCI companion. This will make some S1 and S3 resume scenarios work better. - PORT_CSC was not being cleared correctly in ehci_hub_status_data. This was visible at least through current versions of "lsusb", and might have caused some other hub related strangeness. The fix addresses all three write-to-clear bits, using the same approach that UHCI happens to use: a mask of bits that are cleared in most writes to that port status register. Original patch seems to have been from from William.Morrow@amd.com and this version (from David) finishes the write-to-clear changes. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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198b95170f
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3 changed files with 23 additions and 13 deletions
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@ -759,12 +759,16 @@ static int ehci_resume (struct usb_hcd *hcd)
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if (time_before (jiffies, ehci->next_statechange))
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msleep (100);
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/* If any port is suspended, we know we can/must resume the HC. */
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/* If any port is suspended (or owned by the companion),
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* we know we can/must resume the HC (and mustn't reset it).
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*/
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for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
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u32 status;
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port--;
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status = readl (&ehci->regs->port_status [port]);
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if (status & PORT_SUSPEND) {
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if (!(status & PORT_POWER))
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continue;
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if (status & (PORT_SUSPEND | PORT_OWNER)) {
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down (&hcd->self.root_hub->serialize);
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retval = ehci_hub_resume (hcd);
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up (&hcd->self.root_hub->serialize);
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@ -54,7 +54,7 @@ static int ehci_hub_suspend (struct usb_hcd *hcd)
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/* suspend any active/unsuspended ports, maybe allow wakeup */
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while (port--) {
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u32 __iomem *reg = &ehci->regs->port_status [port];
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u32 t1 = readl (reg);
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u32 t1 = readl (reg) & ~PORT_RWC_BITS;
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u32 t2 = t1;
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if ((t1 & PORT_PE) && !(t1 & PORT_OWNER))
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@ -115,7 +115,8 @@ static int ehci_hub_resume (struct usb_hcd *hcd)
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i = HCS_N_PORTS (ehci->hcs_params);
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while (i--) {
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temp = readl (&ehci->regs->port_status [i]);
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temp &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
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temp &= ~(PORT_RWC_BITS
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| PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
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if (temp & PORT_SUSPEND) {
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ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
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temp |= PORT_RESUME;
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@ -128,7 +129,7 @@ static int ehci_hub_resume (struct usb_hcd *hcd)
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temp = readl (&ehci->regs->port_status [i]);
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if ((temp & PORT_SUSPEND) == 0)
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continue;
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temp &= ~PORT_RESUME;
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temp &= ~(PORT_RWC_BITS | PORT_RESUME);
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writel (temp, &ehci->regs->port_status [i]);
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ehci_vdbg (ehci, "resumed port %d\n", i + 1);
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}
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@ -191,6 +192,7 @@ static int check_reset_complete (
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// what happens if HCS_N_CC(params) == 0 ?
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port_status |= PORT_OWNER;
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port_status &= ~PORT_RWC_BITS;
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writel (port_status, &ehci->regs->port_status [index]);
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} else
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@ -233,7 +235,8 @@ ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
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if (temp & PORT_OWNER) {
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/* don't report this in GetPortStatus */
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if (temp & PORT_CSC) {
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temp &= ~PORT_CSC;
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temp &= ~PORT_RWC_BITS;
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temp |= PORT_CSC;
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writel (temp, &ehci->regs->port_status [i]);
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}
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continue;
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@ -343,7 +346,7 @@ static int ehci_hub_control (
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&ehci->regs->port_status [wIndex]);
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break;
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case USB_PORT_FEAT_C_ENABLE:
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writel (temp | PORT_PEC,
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writel((temp & ~PORT_RWC_BITS) | PORT_PEC,
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&ehci->regs->port_status [wIndex]);
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break;
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case USB_PORT_FEAT_SUSPEND:
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@ -353,7 +356,8 @@ static int ehci_hub_control (
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if ((temp & PORT_PE) == 0)
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goto error;
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/* resume signaling for 20 msec */
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writel ((temp & ~PORT_WAKE_BITS) | PORT_RESUME,
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temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
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writel (temp | PORT_RESUME,
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&ehci->regs->port_status [wIndex]);
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ehci->reset_done [wIndex] = jiffies
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+ msecs_to_jiffies (20);
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@ -364,15 +368,15 @@ static int ehci_hub_control (
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break;
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case USB_PORT_FEAT_POWER:
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if (HCS_PPC (ehci->hcs_params))
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writel (temp & ~PORT_POWER,
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writel (temp & ~(PORT_RWC_BITS | PORT_POWER),
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&ehci->regs->port_status [wIndex]);
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break;
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case USB_PORT_FEAT_C_CONNECTION:
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writel (temp | PORT_CSC,
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writel((temp & ~PORT_RWC_BITS) | PORT_CSC,
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&ehci->regs->port_status [wIndex]);
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break;
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case USB_PORT_FEAT_C_OVER_CURRENT:
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writel (temp | PORT_OCC,
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writel((temp & ~PORT_RWC_BITS) | PORT_OCC,
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&ehci->regs->port_status [wIndex]);
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break;
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case USB_PORT_FEAT_C_RESET:
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@ -416,7 +420,7 @@ static int ehci_hub_control (
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/* stop resume signaling */
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temp = readl (&ehci->regs->port_status [wIndex]);
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writel (temp & ~PORT_RESUME,
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writel (temp & ~(PORT_RWC_BITS | PORT_RESUME),
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&ehci->regs->port_status [wIndex]);
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retval = handshake (
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&ehci->regs->port_status [wIndex],
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@ -437,7 +441,7 @@ static int ehci_hub_control (
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ehci->reset_done [wIndex] = 0;
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/* force reset to complete */
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writel (temp & ~PORT_RESET,
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writel (temp & ~(PORT_RWC_BITS | PORT_RESET),
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&ehci->regs->port_status [wIndex]);
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/* REVISIT: some hardware needs 550+ usec to clear
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* this bit; seems too long to spin routinely...
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@ -500,6 +504,7 @@ static int ehci_hub_control (
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if (temp & PORT_OWNER)
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break;
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temp &= ~PORT_RWC_BITS;
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switch (wValue) {
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case USB_PORT_FEAT_SUSPEND:
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if ((temp & PORT_PE) == 0
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@ -263,6 +263,7 @@ struct ehci_regs {
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#define PORT_PE (1<<2) /* port enable */
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#define PORT_CSC (1<<1) /* connect status change */
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#define PORT_CONNECT (1<<0) /* device connected */
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#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
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} __attribute__ ((packed));
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/* Appendix C, Debug port ... intended for use with special "debug devices"
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