[ARM] 4033/1: Add separate Avila board setup code
This patch adds support for the Gateworks Avila Network Platform in a separate set of setup files to the IXDP425. This is necessary now that a driver for the Avila CF card slot is available. It also adds support for a minor variant on the Avila board known as the Loft, which has a different number of maximum PCI devices. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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6e98a2f88e
commit
0f18597195
7 changed files with 291 additions and 2 deletions
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@ -17,7 +17,7 @@ config MACH_NSLU2
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NSLU2 NAS device. For more information on this platform,
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see http://www.nslu2-linux.org
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config ARCH_AVILA
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config MACH_AVILA
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bool "Avila"
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select PCI
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help
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@ -25,6 +25,14 @@ config ARCH_AVILA
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Avila Network Platform. For more information on this platform,
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see <file:Documentation/arm/IXP4xx>.
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config MACH_LOFT
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bool "Loft"
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depends on MACH_AVILA
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help
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Say 'Y' here if you want your kernel to support the Giant
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Shoulder Inc Loft board (a minor variation on the standard
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Gateworks Avila Network Platform).
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config ARCH_ADI_COYOTE
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bool "Coyote"
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select PCI
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@ -86,7 +94,7 @@ config MACH_NAS100D
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#
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config ARCH_IXDP4XX
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bool
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depends on ARCH_IXDP425 || ARCH_AVILA || MACH_IXDP465
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depends on ARCH_IXDP425 || MACH_IXDP465
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default y
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#
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@ -6,6 +6,7 @@ obj-pci-y :=
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obj-pci-n :=
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obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o
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obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
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obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
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obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
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obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
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@ -15,6 +16,7 @@ obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
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obj-y += common.o
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obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o
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obj-$(CONFIG_MACH_AVILA) += avila-setup.o
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obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
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obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
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obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
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78
arch/arm/mach-ixp4xx/avila-pci.c
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78
arch/arm/mach-ixp4xx/avila-pci.c
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@ -0,0 +1,78 @@
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/*
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* arch/arm/mach-ixp4xx/avila-pci.c
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*
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* Gateworks Avila board-level PCI initialization
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*
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* Author: Michael-Luke Jones <mlj28@cam.ac.uk>
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*
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* Based on ixdp-pci.c
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* Maintainer: Deepak Saxena <dsaxena@plexity.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <asm/mach/pci.h>
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#include <asm/irq.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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void __init avila_pci_preinit(void)
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{
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set_irq_type(IRQ_AVILA_PCI_INTA, IRQT_LOW);
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set_irq_type(IRQ_AVILA_PCI_INTB, IRQT_LOW);
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set_irq_type(IRQ_AVILA_PCI_INTC, IRQT_LOW);
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set_irq_type(IRQ_AVILA_PCI_INTD, IRQT_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init avila_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[AVILA_PCI_IRQ_LINES] = {
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IRQ_AVILA_PCI_INTA,
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IRQ_AVILA_PCI_INTB,
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IRQ_AVILA_PCI_INTC,
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IRQ_AVILA_PCI_INTD
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};
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int irq = -1;
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if (slot >= 1 &&
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slot <= (machine_is_loft() ? LOFT_PCI_MAX_DEV : AVILA_PCI_MAX_DEV) &&
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pin >= 1 && pin <= AVILA_PCI_IRQ_LINES) {
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irq = pci_irq_table[(slot + pin - 2) % 4];
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}
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return irq;
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}
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struct hw_pci avila_pci __initdata = {
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.nr_controllers = 1,
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.preinit = avila_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = avila_map_irq,
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};
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int __init avila_pci_init(void)
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{
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if (machine_is_avila() || machine_is_loft())
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pci_common_init(&avila_pci);
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return 0;
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}
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subsys_initcall(avila_pci_init);
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152
arch/arm/mach-ixp4xx/avila-setup.c
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152
arch/arm/mach-ixp4xx/avila-setup.c
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@ -0,0 +1,152 @@
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/*
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* arch/arm/mach-ixp4xx/avila-setup.c
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*
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* Gateworks Avila board-setup
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*
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* Author: Michael-Luke Jones <mlj28@cam.ac.uk>
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*
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* Based on ixdp-setup.c
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* Copyright (C) 2003-2005 MontaVista Software, Inc.
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*
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <linux/slab.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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static struct flash_platform_data avila_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource avila_flash_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device avila_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev = {
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.platform_data = &avila_flash_data,
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},
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.num_resources = 1,
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.resource = &avila_flash_resource,
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};
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static struct ixp4xx_i2c_pins avila_i2c_gpio_pins = {
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.sda_pin = AVILA_SDA_PIN,
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.scl_pin = AVILA_SCL_PIN,
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};
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static struct platform_device avila_i2c_controller = {
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.name = "IXP4XX-I2C",
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.id = 0,
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.dev = {
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.platform_data = &avila_i2c_gpio_pins,
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},
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.num_resources = 0
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};
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static struct resource avila_uart_resources[] = {
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{
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM
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},
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM
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}
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};
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static struct plat_serial8250_port avila_uart_data[] = {
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{
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ },
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};
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static struct platform_device avila_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = avila_uart_data,
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.num_resources = 2,
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.resource = avila_uart_resources
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};
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static struct platform_device *avila_devices[] __initdata = {
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&avila_i2c_controller,
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&avila_flash,
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&avila_uart
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};
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static void __init avila_init(void)
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{
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ixp4xx_sys_init();
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avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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avila_flash_resource.end =
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IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
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platform_add_devices(avila_devices, ARRAY_SIZE(avila_devices));
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}
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MACHINE_START(AVILA, "Gateworks Avila Network Platform")
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/* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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.map_io = ixp4xx_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.boot_params = 0x0100,
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.init_machine = avila_init,
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MACHINE_END
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/*
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* Loft is functionally equivalent to Avila except that it has a
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* different number for the maximum PCI devices. The MACHINE
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* structure below is identical to Avila except for the comment.
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*/
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#ifdef CONFIG_MACH_LOFT
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MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
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/* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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.map_io = ixp4xx_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.boot_params = 0x0100,
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.init_machine = avila_init,
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MACHINE_END
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#endif
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39
include/asm-arm/arch-ixp4xx/avila.h
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39
include/asm-arm/arch-ixp4xx/avila.h
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/*
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* include/asm-arm/arch-ixp4xx/avila.h
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*
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* Gateworks Avila platform specific definitions
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*
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* Author: Michael-Luke Jones <mlj28@cam.ac.uk>
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*
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* Based on ixdp425.h
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*
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* Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#define AVILA_SDA_PIN 7
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#define AVILA_SCL_PIN 6
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/*
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* AVILA PCI IRQs
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*/
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#define AVILA_PCI_MAX_DEV 4
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#define LOFT_PCI_MAX_DEV 6
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#define AVILA_PCI_IRQ_LINES 4
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/* PCI controller GPIO to IRQ pin mappings */
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#define AVILA_PCI_INTA_PIN 11
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#define AVILA_PCI_INTB_PIN 10
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#define AVILA_PCI_INTC_PIN 9
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#define AVILA_PCI_INTD_PIN 8
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@ -42,6 +42,7 @@ extern unsigned int processor_id;
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/* Platform specific details */
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#include "ixdp425.h"
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#include "avila.h"
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#include "coyote.h"
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#include "prpmc1100.h"
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#include "nslu2.h"
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@ -78,6 +78,15 @@
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#define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9
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#define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8
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/*
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* Gateworks Avila board IRQs
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*/
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#define IRQ_AVILA_PCI_INTA IRQ_IXP4XX_GPIO11
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#define IRQ_AVILA_PCI_INTB IRQ_IXP4XX_GPIO10
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#define IRQ_AVILA_PCI_INTC IRQ_IXP4XX_GPIO9
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#define IRQ_AVILA_PCI_INTD IRQ_IXP4XX_GPIO8
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/*
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* PrPMC1100 Board IRQs
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*/
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