[ARM] 4033/1: Add separate Avila board setup code

This patch adds support for the Gateworks Avila Network Platform in
a separate set of setup files to the IXDP425. This is necessary now
that a driver for the Avila CF card slot is available. It also adds
support for a minor variant on the Avila board known as the Loft,
which has a different number of maximum PCI devices.

Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Michael-Luke Jones 2006-12-16 23:04:05 +01:00 committed by Russell King
parent 6e98a2f88e
commit 0f18597195
7 changed files with 291 additions and 2 deletions

View file

@ -17,7 +17,7 @@ config MACH_NSLU2
NSLU2 NAS device. For more information on this platform,
see http://www.nslu2-linux.org
config ARCH_AVILA
config MACH_AVILA
bool "Avila"
select PCI
help
@ -25,6 +25,14 @@ config ARCH_AVILA
Avila Network Platform. For more information on this platform,
see <file:Documentation/arm/IXP4xx>.
config MACH_LOFT
bool "Loft"
depends on MACH_AVILA
help
Say 'Y' here if you want your kernel to support the Giant
Shoulder Inc Loft board (a minor variation on the standard
Gateworks Avila Network Platform).
config ARCH_ADI_COYOTE
bool "Coyote"
select PCI
@ -86,7 +94,7 @@ config MACH_NAS100D
#
config ARCH_IXDP4XX
bool
depends on ARCH_IXDP425 || ARCH_AVILA || MACH_IXDP465
depends on ARCH_IXDP425 || MACH_IXDP465
default y
#

View file

@ -6,6 +6,7 @@ obj-pci-y :=
obj-pci-n :=
obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o
obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
@ -15,6 +16,7 @@ obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
obj-y += common.o
obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o
obj-$(CONFIG_MACH_AVILA) += avila-setup.o
obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o

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@ -0,0 +1,78 @@
/*
* arch/arm/mach-ixp4xx/avila-pci.c
*
* Gateworks Avila board-level PCI initialization
*
* Author: Michael-Luke Jones <mlj28@cam.ac.uk>
*
* Based on ixdp-pci.c
* Copyright (C) 2002 Intel Corporation.
* Copyright (C) 2003-2004 MontaVista Software, Inc.
*
* Maintainer: Deepak Saxena <dsaxena@plexity.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <asm/mach/pci.h>
#include <asm/irq.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
void __init avila_pci_preinit(void)
{
set_irq_type(IRQ_AVILA_PCI_INTA, IRQT_LOW);
set_irq_type(IRQ_AVILA_PCI_INTB, IRQT_LOW);
set_irq_type(IRQ_AVILA_PCI_INTC, IRQT_LOW);
set_irq_type(IRQ_AVILA_PCI_INTD, IRQT_LOW);
ixp4xx_pci_preinit();
}
static int __init avila_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
static int pci_irq_table[AVILA_PCI_IRQ_LINES] = {
IRQ_AVILA_PCI_INTA,
IRQ_AVILA_PCI_INTB,
IRQ_AVILA_PCI_INTC,
IRQ_AVILA_PCI_INTD
};
int irq = -1;
if (slot >= 1 &&
slot <= (machine_is_loft() ? LOFT_PCI_MAX_DEV : AVILA_PCI_MAX_DEV) &&
pin >= 1 && pin <= AVILA_PCI_IRQ_LINES) {
irq = pci_irq_table[(slot + pin - 2) % 4];
}
return irq;
}
struct hw_pci avila_pci __initdata = {
.nr_controllers = 1,
.preinit = avila_pci_preinit,
.swizzle = pci_std_swizzle,
.setup = ixp4xx_setup,
.scan = ixp4xx_scan_bus,
.map_irq = avila_map_irq,
};
int __init avila_pci_init(void)
{
if (machine_is_avila() || machine_is_loft())
pci_common_init(&avila_pci);
return 0;
}
subsys_initcall(avila_pci_init);

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@ -0,0 +1,152 @@
/*
* arch/arm/mach-ixp4xx/avila-setup.c
*
* Gateworks Avila board-setup
*
* Author: Michael-Luke Jones <mlj28@cam.ac.uk>
*
* Based on ixdp-setup.c
* Copyright (C) 2003-2005 MontaVista Software, Inc.
*
* Author: Deepak Saxena <dsaxena@plexity.net>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/slab.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
static struct flash_platform_data avila_flash_data = {
.map_name = "cfi_probe",
.width = 2,
};
static struct resource avila_flash_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device avila_flash = {
.name = "IXP4XX-Flash",
.id = 0,
.dev = {
.platform_data = &avila_flash_data,
},
.num_resources = 1,
.resource = &avila_flash_resource,
};
static struct ixp4xx_i2c_pins avila_i2c_gpio_pins = {
.sda_pin = AVILA_SDA_PIN,
.scl_pin = AVILA_SCL_PIN,
};
static struct platform_device avila_i2c_controller = {
.name = "IXP4XX-I2C",
.id = 0,
.dev = {
.platform_data = &avila_i2c_gpio_pins,
},
.num_resources = 0
};
static struct resource avila_uart_resources[] = {
{
.start = IXP4XX_UART1_BASE_PHYS,
.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
.flags = IORESOURCE_MEM
},
{
.start = IXP4XX_UART2_BASE_PHYS,
.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
.flags = IORESOURCE_MEM
}
};
static struct plat_serial8250_port avila_uart_data[] = {
{
.mapbase = IXP4XX_UART1_BASE_PHYS,
.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
.irq = IRQ_IXP4XX_UART1,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = IXP4XX_UART_XTAL,
},
{
.mapbase = IXP4XX_UART2_BASE_PHYS,
.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
.irq = IRQ_IXP4XX_UART2,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = IXP4XX_UART_XTAL,
},
{ },
};
static struct platform_device avila_uart = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev.platform_data = avila_uart_data,
.num_resources = 2,
.resource = avila_uart_resources
};
static struct platform_device *avila_devices[] __initdata = {
&avila_i2c_controller,
&avila_flash,
&avila_uart
};
static void __init avila_init(void)
{
ixp4xx_sys_init();
avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
avila_flash_resource.end =
IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
platform_add_devices(avila_devices, ARRAY_SIZE(avila_devices));
}
MACHINE_START(AVILA, "Gateworks Avila Network Platform")
/* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
.init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer,
.boot_params = 0x0100,
.init_machine = avila_init,
MACHINE_END
/*
* Loft is functionally equivalent to Avila except that it has a
* different number for the maximum PCI devices. The MACHINE
* structure below is identical to Avila except for the comment.
*/
#ifdef CONFIG_MACH_LOFT
MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
/* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
.init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer,
.boot_params = 0x0100,
.init_machine = avila_init,
MACHINE_END
#endif

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@ -0,0 +1,39 @@
/*
* include/asm-arm/arch-ixp4xx/avila.h
*
* Gateworks Avila platform specific definitions
*
* Author: Michael-Luke Jones <mlj28@cam.ac.uk>
*
* Based on ixdp425.h
* Author: Deepak Saxena <dsaxena@plexity.net>
*
* Copyright 2004 (c) MontaVista, Software, Inc.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_HARDWARE_H__
#error "Do not include this directly, instead #include <asm/hardware.h>"
#endif
#define AVILA_SDA_PIN 7
#define AVILA_SCL_PIN 6
/*
* AVILA PCI IRQs
*/
#define AVILA_PCI_MAX_DEV 4
#define LOFT_PCI_MAX_DEV 6
#define AVILA_PCI_IRQ_LINES 4
/* PCI controller GPIO to IRQ pin mappings */
#define AVILA_PCI_INTA_PIN 11
#define AVILA_PCI_INTB_PIN 10
#define AVILA_PCI_INTC_PIN 9
#define AVILA_PCI_INTD_PIN 8

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@ -42,6 +42,7 @@ extern unsigned int processor_id;
/* Platform specific details */
#include "ixdp425.h"
#include "avila.h"
#include "coyote.h"
#include "prpmc1100.h"
#include "nslu2.h"

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@ -78,6 +78,15 @@
#define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9
#define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8
/*
* Gateworks Avila board IRQs
*/
#define IRQ_AVILA_PCI_INTA IRQ_IXP4XX_GPIO11
#define IRQ_AVILA_PCI_INTB IRQ_IXP4XX_GPIO10
#define IRQ_AVILA_PCI_INTC IRQ_IXP4XX_GPIO9
#define IRQ_AVILA_PCI_INTD IRQ_IXP4XX_GPIO8
/*
* PrPMC1100 Board IRQs
*/