Merge branch 'clps711x/cleanup' into next/cleanup
* clps711x/cleanup: ARM: clps711x: Cleanup IRQ handling ARM clps711x: Removed unused header mach/time.h ARM: clps711x: Added note about support EP731x CPU to Kconfig ARM: clps711x: Added missing register definitions ARM: clps711x: Used own subarch directory for store header file Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
0e896b1ddc
7 changed files with 57 additions and 77 deletions
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@ -373,12 +373,12 @@ config ARCH_HIGHBANK
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Support for the Calxeda Highbank SoC based boards.
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config ARCH_CLPS711X
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bool "Cirrus Logic CLPS711x/EP721x-based"
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bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
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select CPU_ARM720T
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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Support for Cirrus Logic 711x/721x based boards.
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Support for Cirrus Logic 711x/721x/731x based boards.
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config ARCH_CNS3XXX
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bool "Cavium Networks CNS3XXX family"
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@ -66,12 +66,6 @@ static void int1_mask(struct irq_data *d)
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static void int1_ack(struct irq_data *d)
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{
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u32 intmr1;
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intmr1 = clps_readl(INTMR1);
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intmr1 &= ~(1 << d->irq);
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clps_writel(intmr1, INTMR1);
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switch (d->irq) {
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case IRQ_CSINT: clps_writel(0, COEOI); break;
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case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
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@ -108,12 +102,6 @@ static void int2_mask(struct irq_data *d)
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static void int2_ack(struct irq_data *d)
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{
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u32 intmr2;
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intmr2 = clps_readl(INTMR2);
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intmr2 &= ~(1 << (d->irq - 16));
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clps_writel(intmr2, INTMR2);
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switch (d->irq) {
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case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
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}
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@ -1,8 +1,6 @@
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/*
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* arch/arm/include/asm/hardware/clps7111.h
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*
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* This file contains the hardware definitions of the CLPS7111 internal
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* registers.
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* This file contains the hardware definitions of the Cirrus Logic
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* ARM7 CLPS711X internal registers.
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*
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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@ -20,8 +18,8 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_HARDWARE_CLPS7111_H
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#define __ASM_HARDWARE_CLPS7111_H
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#ifndef __MACH_CLPS711X_H
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#define __MACH_CLPS711X_H
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#define CLPS711X_PHYS_BASE (0x80000000)
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@ -43,7 +41,7 @@
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#define INTSR1 (0x0240)
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#define INTMR1 (0x0280)
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#define LCDCON (0x02c0)
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#define TC1D (0x0300)
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#define TC1D (0x0300)
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#define TC2D (0x0340)
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#define RTCDR (0x0380)
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#define RTCMR (0x03c0)
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@ -89,6 +87,14 @@
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#define LEDFLSH (0x22c0)
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#define SDCONF (0x2300)
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#define SDRFPR (0x2340)
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#define UNIQID (0x2440)
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#define DAI64FS (0x2600)
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#define PLLW (0x2610)
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#define PLLR (0xa5a8)
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#define RANDID0 (0x2700)
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#define RANDID1 (0x2704)
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#define RANDID2 (0x2708)
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#define RANDID3 (0x270c)
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/* common bits: SYSCON1 / SYSCON2 */
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#define SYSCON_UARTEN (1 << 8)
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@ -136,6 +142,8 @@
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#define SYSFLG1_CTXFF (1 << 25)
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#define SYSFLG1_SSIBUSY (1 << 26)
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#define SYSFLG1_ID (1 << 29)
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#define SYSFLG1_VERID(x) (((x) >> 30) & 3)
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#define SYSFLG1_VERID_MASK (3 << 30)
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#define SYSFLG2_SSRXOF (1 << 0)
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#define SYSFLG2_RESVAL (1 << 1)
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@ -183,9 +191,12 @@
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#define UBRLCR_WRDLEN8 (3 << 17)
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#define UBRLCR_WRDLEN_MASK (3 << 17)
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#define SYNCIO_FRMLEN(x) (((x) & 0x3f) << 7)
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#define SYNCIO_CFGLEN(x) ((x) & 0x7f)
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#define SYNCIO_SMCKEN (1 << 13)
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#define SYNCIO_TXFRMEN (1 << 14)
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#define DAIR_RESERVED (0x0404)
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#define DAIR_DAIEN (1 << 16)
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#define DAIR_ECS (1 << 17)
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#define DAIR_LCTM (1 << 19)
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@ -212,11 +223,23 @@
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#define DAISR_LCNE (1 << 11)
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#define DAISR_FIFO (1 << 12)
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#define DAI64FS_I2SF64 (1 << 0)
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#define DAI64FS_AUDIOCLKEN (1 << 1)
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#define DAI64FS_AUDIOCLKSRC (1 << 2)
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#define DAI64FS_MCLK256EN (1 << 3)
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#define DAI64FS_LOOPBACK (1 << 5)
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#define SYSCON3_ADCCON (1 << 0)
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#define SYSCON3_CLKCTL0 (1 << 1)
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#define SYSCON3_CLKCTL1 (1 << 2)
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#define SYSCON3_DAISEL (1 << 3)
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#define SYSCON3_ADCCKNSEN (1 << 4)
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#define SYSCON3_VERSN(x) (((x) >> 5) & 7)
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#define SYSCON3_VERSN_MASK (7 << 5)
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#define SYSCON3_FASTWAKE (1 << 8)
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#define SYSCON3_DAIEN (1 << 9)
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#define SYSCON3_128FS SYSCON3_DAIEN
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#define SYSCON3_ENPD67 (1 << 10)
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#define SDCONF_ACTIVE (1 << 10)
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#define SDCONF_CLKCTL (1 << 9)
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@ -231,4 +254,25 @@
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#define SDCONF_CASLAT_2 (2)
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#define SDCONF_CASLAT_3 (3)
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#endif /* __ASM_HARDWARE_CLPS7111_H */
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#define MEMCFG_BUS_WIDTH_32 (1)
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#define MEMCFG_BUS_WIDTH_16 (0)
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#define MEMCFG_BUS_WIDTH_8 (3)
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#define MEMCFG_WAITSTATE_8_3 (0 << 2)
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#define MEMCFG_WAITSTATE_7_3 (1 << 2)
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#define MEMCFG_WAITSTATE_6_3 (2 << 2)
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#define MEMCFG_WAITSTATE_5_3 (3 << 2)
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#define MEMCFG_WAITSTATE_4_2 (4 << 2)
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#define MEMCFG_WAITSTATE_3_2 (5 << 2)
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#define MEMCFG_WAITSTATE_2_2 (6 << 2)
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#define MEMCFG_WAITSTATE_1_2 (7 << 2)
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#define MEMCFG_WAITSTATE_8_1 (8 << 2)
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#define MEMCFG_WAITSTATE_7_1 (9 << 2)
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#define MEMCFG_WAITSTATE_6_1 (10 << 2)
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#define MEMCFG_WAITSTATE_5_1 (11 << 2)
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#define MEMCFG_WAITSTATE_4_0 (12 << 2)
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#define MEMCFG_WAITSTATE_3_0 (13 << 2)
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#define MEMCFG_WAITSTATE_2_0 (14 << 2)
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#define MEMCFG_WAITSTATE_1_0 (15 << 2)
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#endif /* __MACH_CLPS711X_H */
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@ -22,7 +22,7 @@
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#ifndef __MACH_HARDWARE_H
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#define __MACH_HARDWARE_H
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#include <asm/hardware/clps7111.h>
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#include <mach/clps711x.h>
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#define CLPS711X_VIRT_BASE IOMEM(0xff000000)
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@ -35,7 +35,6 @@
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#define IRQ_SSEOTI 15
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#define INT1_IRQS (0x0000fff0)
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#define INT1_ACK_IRQS (0x00004f10)
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/*
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* Interrupts from INTSR2
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@ -47,7 +46,5 @@
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#define IRQ_URXINT2 (16+13) /* bit 13 */
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#define INT2_IRQS (0x30070000)
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#define INT2_ACK_IRQS (0x00010000)
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#define NR_IRQS 30
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#define NR_IRQS 30
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@ -1,49 +0,0 @@
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/*
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* arch/arm/mach-clps711x/include/mach/time.h
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*
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <asm/leds.h>
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#include <mach/hardware.h>
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extern void clps711x_setup_timer(void);
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t
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p720t_timer_interrupt(int irq, void *dev_id)
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{
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struct pt_regs *regs = get_irq_regs();
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do_leds();
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xtime_update(1);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(regs));
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#endif
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do_profile(regs);
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return IRQ_HANDLED;
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}
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/*
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* Set up timer interrupt, and return the current time in seconds.
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*/
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void __init time_init(void)
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{
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clps711x_setup_timer();
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timer_irq.handler = p720t_timer_interrupt;
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setup_irq(IRQ_TC2OI, &timer_irq);
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}
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@ -17,7 +17,7 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <asm/hardware/clps7111.h>
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#include <mach/clps711x.h>
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#ifdef CONFIG_DEBUG_CLPS711X_UART2
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#define SYSFLGx SYSFLG2
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