Merge branch 'drm-nouveau-fixes-3.10' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes
Multiple nouveau regression fixes, hdmi audio, s/r and dac load detection * 'drm-nouveau-fixes-3.10' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nv50/kms: use dac loadval from vbios, where it's available drm/nv50/disp: force dac power state during load detect drm/nv50-nv84/fifo: fix resume regression introduced by playlist race fix drm/nv84/disp: Fix HDMI audio regression
This commit is contained in:
commit
0e32fde96b
5 changed files with 22 additions and 6 deletions
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@ -50,12 +50,16 @@ nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval)
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{
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const u32 doff = (or * 0x800);
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int load = -EINVAL;
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nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000);
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nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
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nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval);
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mdelay(9);
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udelay(500);
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nv_wr32(priv, 0x61a00c + doff, 0x80000000);
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load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27;
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nv_wr32(priv, 0x61a00c + doff, 0x00000000);
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nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000);
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nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
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return load;
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}
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@ -55,6 +55,10 @@ nv84_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data)
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nv_wr32(priv, 0x616510 + hoff, 0x00000000);
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nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000001);
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nv_mask(priv, 0x6165d0 + hoff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
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nv_mask(priv, 0x616568 + hoff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
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nv_mask(priv, 0x616578 + hoff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
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/* ??? */
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nv_mask(priv, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
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nv_mask(priv, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
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@ -40,14 +40,13 @@
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* FIFO channel objects
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******************************************************************************/
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void
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nv50_fifo_playlist_update(struct nv50_fifo_priv *priv)
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static void
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nv50_fifo_playlist_update_locked(struct nv50_fifo_priv *priv)
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{
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struct nouveau_bar *bar = nouveau_bar(priv);
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struct nouveau_gpuobj *cur;
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int i, p;
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mutex_lock(&nv_subdev(priv)->mutex);
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cur = priv->playlist[priv->cur_playlist];
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priv->cur_playlist = !priv->cur_playlist;
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@ -61,6 +60,13 @@ nv50_fifo_playlist_update(struct nv50_fifo_priv *priv)
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nv_wr32(priv, 0x0032f4, cur->addr >> 12);
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nv_wr32(priv, 0x0032ec, p);
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nv_wr32(priv, 0x002500, 0x00000101);
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}
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void
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nv50_fifo_playlist_update(struct nv50_fifo_priv *priv)
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{
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mutex_lock(&nv_subdev(priv)->mutex);
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nv50_fifo_playlist_update_locked(priv);
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mutex_unlock(&nv_subdev(priv)->mutex);
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}
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@ -489,7 +495,7 @@ nv50_fifo_init(struct nouveau_object *object)
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for (i = 0; i < 128; i++)
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nv_wr32(priv, 0x002600 + (i * 4), 0x00000000);
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nv50_fifo_playlist_update(priv);
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nv50_fifo_playlist_update_locked(priv);
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nv_wr32(priv, 0x003200, 0x00000001);
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nv_wr32(priv, 0x003250, 0x00000001);
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@ -218,7 +218,7 @@ struct nv04_display_class {
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#define NV50_DISP_DAC_PWR_STATE 0x00000040
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#define NV50_DISP_DAC_PWR_STATE_ON 0x00000000
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#define NV50_DISP_DAC_PWR_STATE_OFF 0x00000040
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#define NV50_DISP_DAC_LOAD 0x0002000c
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#define NV50_DISP_DAC_LOAD 0x00020100
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#define NV50_DISP_DAC_LOAD_VALUE 0x00000007
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#define NV50_DISP_PIOR_MTHD 0x00030000
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@ -1554,7 +1554,9 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
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{
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struct nv50_disp *disp = nv50_disp(encoder->dev);
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int ret, or = nouveau_encoder(encoder)->or;
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u32 load = 0;
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u32 load = nouveau_drm(encoder->dev)->vbios.dactestval;
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if (load == 0)
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load = 340;
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ret = nv_exec(disp->core, NV50_DISP_DAC_LOAD + or, &load, sizeof(load));
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if (ret || load != 7)
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