b43: fix DMA on some bugged hardware
Some hardware with 64-bit DMA uses lower address word for setting routing (translation) bit. Add workaround for such boards. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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04023afcce
commit
0cc9772a6b
3 changed files with 84 additions and 36 deletions
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@ -594,6 +594,7 @@ struct b43_dma {
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struct b43_dmaring *rx_ring;
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u32 translation; /* Routing bits */
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bool translation_in_low; /* Should translation bit go into low addr? */
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bool parity; /* Check for parity */
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};
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@ -47,6 +47,38 @@
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* into separate slots. */
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#define TX_SLOTS_PER_FRAME 2
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static u32 b43_dma_address(struct b43_dma *dma, dma_addr_t dmaaddr,
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enum b43_addrtype addrtype)
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{
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u32 uninitialized_var(addr);
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switch (addrtype) {
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case B43_DMA_ADDR_LOW:
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addr = lower_32_bits(dmaaddr);
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if (dma->translation_in_low) {
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addr &= ~SSB_DMA_TRANSLATION_MASK;
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addr |= dma->translation;
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}
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break;
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case B43_DMA_ADDR_HIGH:
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addr = upper_32_bits(dmaaddr);
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if (!dma->translation_in_low) {
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addr &= ~SSB_DMA_TRANSLATION_MASK;
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addr |= dma->translation;
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}
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break;
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case B43_DMA_ADDR_EXT:
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if (dma->translation_in_low)
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addr = lower_32_bits(dmaaddr);
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else
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addr = upper_32_bits(dmaaddr);
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addr &= SSB_DMA_TRANSLATION_MASK;
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addr >>= SSB_DMA_TRANSLATION_SHIFT;
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break;
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}
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return addr;
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}
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/* 32bit DMA ops. */
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static
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@ -77,10 +109,9 @@ static void op32_fill_descriptor(struct b43_dmaring *ring,
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slot = (int)(&(desc->dma32) - descbase);
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B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots));
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addr = (u32) (dmaaddr & ~SSB_DMA_TRANSLATION_MASK);
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addrext = (u32) (dmaaddr & SSB_DMA_TRANSLATION_MASK)
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>> SSB_DMA_TRANSLATION_SHIFT;
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addr |= ring->dev->dma.translation;
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addr = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW);
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addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT);
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ctl = bufsize & B43_DMA32_DCTL_BYTECNT;
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if (slot == ring->nr_slots - 1)
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ctl |= B43_DMA32_DCTL_DTABLEEND;
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@ -170,11 +201,10 @@ static void op64_fill_descriptor(struct b43_dmaring *ring,
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slot = (int)(&(desc->dma64) - descbase);
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B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots));
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addrlo = (u32) (dmaaddr & 0xFFFFFFFF);
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addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
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addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
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>> SSB_DMA_TRANSLATION_SHIFT;
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addrhi |= ring->dev->dma.translation;
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addrlo = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW);
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addrhi = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_HIGH);
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addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT);
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if (slot == ring->nr_slots - 1)
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ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
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if (start)
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@ -658,41 +688,37 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
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int err = 0;
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u32 value;
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u32 addrext;
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u32 trans = ring->dev->dma.translation;
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bool parity = ring->dev->dma.parity;
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u32 addrlo;
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u32 addrhi;
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if (ring->tx) {
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if (ring->type == B43_DMA_64BIT) {
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u64 ringbase = (u64) (ring->dmabase);
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addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT);
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addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW);
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addrhi = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_HIGH);
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addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
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>> SSB_DMA_TRANSLATION_SHIFT;
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value = B43_DMA64_TXENABLE;
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value |= (addrext << B43_DMA64_TXADDREXT_SHIFT)
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& B43_DMA64_TXADDREXT_MASK;
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if (!parity)
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value |= B43_DMA64_TXPARITYDISABLE;
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b43_dma_write(ring, B43_DMA64_TXCTL, value);
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b43_dma_write(ring, B43_DMA64_TXRINGLO,
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(ringbase & 0xFFFFFFFF));
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b43_dma_write(ring, B43_DMA64_TXRINGHI,
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((ringbase >> 32) &
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~SSB_DMA_TRANSLATION_MASK)
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| trans);
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b43_dma_write(ring, B43_DMA64_TXRINGLO, addrlo);
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b43_dma_write(ring, B43_DMA64_TXRINGHI, addrhi);
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} else {
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u32 ringbase = (u32) (ring->dmabase);
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addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT);
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addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW);
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addrext = (ringbase & SSB_DMA_TRANSLATION_MASK)
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>> SSB_DMA_TRANSLATION_SHIFT;
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value = B43_DMA32_TXENABLE;
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value |= (addrext << B43_DMA32_TXADDREXT_SHIFT)
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& B43_DMA32_TXADDREXT_MASK;
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if (!parity)
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value |= B43_DMA32_TXPARITYDISABLE;
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b43_dma_write(ring, B43_DMA32_TXCTL, value);
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b43_dma_write(ring, B43_DMA32_TXRING,
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(ringbase & ~SSB_DMA_TRANSLATION_MASK)
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| trans);
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b43_dma_write(ring, B43_DMA32_TXRING, addrlo);
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}
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} else {
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err = alloc_initial_descbuffers(ring);
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@ -700,9 +726,10 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
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goto out;
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if (ring->type == B43_DMA_64BIT) {
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u64 ringbase = (u64) (ring->dmabase);
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addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT);
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addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW);
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addrhi = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_HIGH);
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addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
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>> SSB_DMA_TRANSLATION_SHIFT;
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value = (ring->frameoffset << B43_DMA64_RXFROFF_SHIFT);
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value |= B43_DMA64_RXENABLE;
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value |= (addrext << B43_DMA64_RXADDREXT_SHIFT)
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@ -710,19 +737,15 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
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if (!parity)
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value |= B43_DMA64_RXPARITYDISABLE;
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b43_dma_write(ring, B43_DMA64_RXCTL, value);
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b43_dma_write(ring, B43_DMA64_RXRINGLO,
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(ringbase & 0xFFFFFFFF));
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b43_dma_write(ring, B43_DMA64_RXRINGHI,
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((ringbase >> 32) &
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~SSB_DMA_TRANSLATION_MASK)
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| trans);
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b43_dma_write(ring, B43_DMA64_RXRINGLO, addrlo);
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b43_dma_write(ring, B43_DMA64_RXRINGHI, addrhi);
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b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
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sizeof(struct b43_dmadesc64));
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} else {
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u32 ringbase = (u32) (ring->dmabase);
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addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT);
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addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW);
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addrext = (ringbase & SSB_DMA_TRANSLATION_MASK)
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>> SSB_DMA_TRANSLATION_SHIFT;
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value = (ring->frameoffset << B43_DMA32_RXFROFF_SHIFT);
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value |= B43_DMA32_RXENABLE;
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value |= (addrext << B43_DMA32_RXADDREXT_SHIFT)
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@ -730,9 +753,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
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if (!parity)
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value |= B43_DMA32_RXPARITYDISABLE;
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b43_dma_write(ring, B43_DMA32_RXCTL, value);
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b43_dma_write(ring, B43_DMA32_RXRING,
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(ringbase & ~SSB_DMA_TRANSLATION_MASK)
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| trans);
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b43_dma_write(ring, B43_DMA32_RXRING, addrlo);
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b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots *
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sizeof(struct b43_dmadesc32));
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}
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@ -1061,6 +1082,25 @@ static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask)
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return 0;
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}
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/* Some hardware with 64-bit DMA seems to be bugged and looks for translation
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* bit in low address word instead of high one.
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*/
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static bool b43_dma_translation_in_low_word(struct b43_wldev *dev,
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enum b43_dmatype type)
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{
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if (type != B43_DMA_64BIT)
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return 1;
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#ifdef CONFIG_B43_SSB
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if (dev->dev->bus_type == B43_BUS_SSB &&
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dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI &&
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!(dev->dev->sdev->bus->host_pci->is_pcie &&
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ssb_read32(dev->dev->sdev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64))
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return 1;
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#endif
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return 0;
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}
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int b43_dma_init(struct b43_wldev *dev)
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{
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struct b43_dma *dma = &dev->dma;
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@ -1086,6 +1126,7 @@ int b43_dma_init(struct b43_wldev *dev)
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break;
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#endif
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}
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dma->translation_in_low = b43_dma_translation_in_low_word(dev, type);
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dma->parity = true;
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#ifdef CONFIG_B43_BCMA
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@ -215,6 +215,12 @@ enum b43_dmatype {
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B43_DMA_64BIT = 64,
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};
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enum b43_addrtype {
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B43_DMA_ADDR_LOW,
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B43_DMA_ADDR_HIGH,
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B43_DMA_ADDR_EXT,
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};
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struct b43_dmaring {
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/* Lowlevel DMA ops. */
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const struct b43_dma_ops *ops;
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