rt2x00: Revise irqmask locking for PCI devices
The PCI device irqmask is locked by a spin_lock. Currently spin_lock_irqsave is used everywhere. To reduce the locking overhead replace spin_lock_irqsave in hard irq context with spin_lock and in soft irq context with spin_lock_irq. Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
567108ebd3
commit
0aa13b2e06
4 changed files with 22 additions and 33 deletions
|
@ -1317,27 +1317,25 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev,
|
|||
static void rt2400pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
|
||||
struct rt2x00_field32 irq_field)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 reg;
|
||||
|
||||
/*
|
||||
* Enable a single interrupt. The interrupt mask register
|
||||
* access needs locking.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock_irq(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, CSR8, ®);
|
||||
rt2x00_set_field32(®, irq_field, 0);
|
||||
rt2x00pci_register_write(rt2x00dev, CSR8, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock_irq(&rt2x00dev->irqmask_lock);
|
||||
}
|
||||
|
||||
static void rt2400pci_txstatus_tasklet(unsigned long data)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
|
||||
u32 reg;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Handle all tx queues.
|
||||
|
@ -1349,7 +1347,7 @@ static void rt2400pci_txstatus_tasklet(unsigned long data)
|
|||
/*
|
||||
* Enable all TXDONE interrupts again.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock_irq(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, CSR8, ®);
|
||||
rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 0);
|
||||
|
@ -1357,7 +1355,7 @@ static void rt2400pci_txstatus_tasklet(unsigned long data)
|
|||
rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 0);
|
||||
rt2x00pci_register_write(rt2x00dev, CSR8, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock_irq(&rt2x00dev->irqmask_lock);
|
||||
}
|
||||
|
||||
static void rt2400pci_tbtt_tasklet(unsigned long data)
|
||||
|
@ -1378,7 +1376,6 @@ static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance)
|
|||
{
|
||||
struct rt2x00_dev *rt2x00dev = dev_instance;
|
||||
u32 reg, mask;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Get the interrupt sources & saved to local variable.
|
||||
|
@ -1420,13 +1417,13 @@ static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance)
|
|||
* Disable all interrupts for which a tasklet was scheduled right now,
|
||||
* the tasklet will reenable the appropriate interrupts.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, CSR8, ®);
|
||||
reg |= mask;
|
||||
rt2x00pci_register_write(rt2x00dev, CSR8, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock(&rt2x00dev->irqmask_lock);
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -1449,27 +1449,25 @@ static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev,
|
|||
static void rt2500pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
|
||||
struct rt2x00_field32 irq_field)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 reg;
|
||||
|
||||
/*
|
||||
* Enable a single interrupt. The interrupt mask register
|
||||
* access needs locking.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock_irq(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, CSR8, ®);
|
||||
rt2x00_set_field32(®, irq_field, 0);
|
||||
rt2x00pci_register_write(rt2x00dev, CSR8, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock_irq(&rt2x00dev->irqmask_lock);
|
||||
}
|
||||
|
||||
static void rt2500pci_txstatus_tasklet(unsigned long data)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
|
||||
u32 reg;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Handle all tx queues.
|
||||
|
@ -1481,7 +1479,7 @@ static void rt2500pci_txstatus_tasklet(unsigned long data)
|
|||
/*
|
||||
* Enable all TXDONE interrupts again.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock_irq(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, CSR8, ®);
|
||||
rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 0);
|
||||
|
@ -1489,7 +1487,7 @@ static void rt2500pci_txstatus_tasklet(unsigned long data)
|
|||
rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 0);
|
||||
rt2x00pci_register_write(rt2x00dev, CSR8, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock_irq(&rt2x00dev->irqmask_lock);
|
||||
}
|
||||
|
||||
static void rt2500pci_tbtt_tasklet(unsigned long data)
|
||||
|
@ -1510,7 +1508,6 @@ static irqreturn_t rt2500pci_interrupt(int irq, void *dev_instance)
|
|||
{
|
||||
struct rt2x00_dev *rt2x00dev = dev_instance;
|
||||
u32 reg, mask;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Get the interrupt sources & saved to local variable.
|
||||
|
@ -1552,13 +1549,13 @@ static irqreturn_t rt2500pci_interrupt(int irq, void *dev_instance)
|
|||
* Disable all interrupts for which a tasklet was scheduled right now,
|
||||
* the tasklet will reenable the appropriate interrupts.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, CSR8, ®);
|
||||
reg |= mask;
|
||||
rt2x00pci_register_write(rt2x00dev, CSR8, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock(&rt2x00dev->irqmask_lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
|
@ -765,18 +765,17 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
|
|||
static void rt2800pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
|
||||
struct rt2x00_field32 irq_field)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 reg;
|
||||
|
||||
/*
|
||||
* Enable a single interrupt. The interrupt mask register
|
||||
* access needs locking.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock_irq(&rt2x00dev->irqmask_lock);
|
||||
rt2800_register_read(rt2x00dev, INT_MASK_CSR, ®);
|
||||
rt2x00_set_field32(®, irq_field, 1);
|
||||
rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock_irq(&rt2x00dev->irqmask_lock);
|
||||
}
|
||||
|
||||
static void rt2800pci_txstatus_tasklet(unsigned long data)
|
||||
|
@ -862,7 +861,6 @@ static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
|
|||
{
|
||||
struct rt2x00_dev *rt2x00dev = dev_instance;
|
||||
u32 reg, mask;
|
||||
unsigned long flags;
|
||||
|
||||
/* Read status and ACK all interrupts */
|
||||
rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, ®);
|
||||
|
@ -905,11 +903,11 @@ static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
|
|||
* Disable all interrupts for which a tasklet was scheduled right now,
|
||||
* the tasklet will reenable the appropriate interrupts.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock(&rt2x00dev->irqmask_lock);
|
||||
rt2800_register_read(rt2x00dev, INT_MASK_CSR, ®);
|
||||
reg &= mask;
|
||||
rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock(&rt2x00dev->irqmask_lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
|
@ -2263,39 +2263,37 @@ static void rt61pci_wakeup(struct rt2x00_dev *rt2x00dev)
|
|||
static void rt61pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
|
||||
struct rt2x00_field32 irq_field)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 reg;
|
||||
|
||||
/*
|
||||
* Enable a single interrupt. The interrupt mask register
|
||||
* access needs locking.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock_irq(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®);
|
||||
rt2x00_set_field32(®, irq_field, 0);
|
||||
rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock_irq(&rt2x00dev->irqmask_lock);
|
||||
}
|
||||
|
||||
static void rt61pci_enable_mcu_interrupt(struct rt2x00_dev *rt2x00dev,
|
||||
struct rt2x00_field32 irq_field)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 reg;
|
||||
|
||||
/*
|
||||
* Enable a single MCU interrupt. The interrupt mask register
|
||||
* access needs locking.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock_irq(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, MCU_INT_MASK_CSR, ®);
|
||||
rt2x00_set_field32(®, irq_field, 0);
|
||||
rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock_irq(&rt2x00dev->irqmask_lock);
|
||||
}
|
||||
|
||||
static void rt61pci_txstatus_tasklet(unsigned long data)
|
||||
|
@ -2333,7 +2331,6 @@ static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
|
|||
struct rt2x00_dev *rt2x00dev = dev_instance;
|
||||
u32 reg_mcu, mask_mcu;
|
||||
u32 reg, mask;
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Get the interrupt sources & saved to local variable.
|
||||
|
@ -2378,7 +2375,7 @@ static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
|
|||
* Disable all interrupts for which a tasklet was scheduled right now,
|
||||
* the tasklet will reenable the appropriate interrupts.
|
||||
*/
|
||||
spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_lock(&rt2x00dev->irqmask_lock);
|
||||
|
||||
rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®);
|
||||
reg |= mask;
|
||||
|
@ -2388,7 +2385,7 @@ static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
|
|||
reg |= mask_mcu;
|
||||
rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
|
||||
|
||||
spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
|
||||
spin_unlock(&rt2x00dev->irqmask_lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue