Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Delete totally outdated Documentation/mips/time.README [MIPS] Kill duplicated setup_irq() for cp0 timer [MIPS] Sibyte: Finish conversion to modern time APIs. [MIPS] time: Helpers to compute clocksource/event shift and mult values. [MIPS] SMTC: Build fix. [MIPS] time: Delete dead code. [MIPS] MIPSsim: Strip defconfig file to the bones.
This commit is contained in:
Linus Torvalds
commit
0a4908e19f
23 changed files with 263 additions and 891 deletions
|
|
@ -4,5 +4,3 @@ AU1xxx_IDE.README
|
|||
- README for MIPS AU1XXX IDE driver.
|
||||
GT64120.README
|
||||
- README for dir with info on MIPS boards using GT-64120 or GT-64120A.
|
||||
time.README
|
||||
- README for MIPS time services.
|
||||
|
|
|
|||
|
|
@ -1,173 +0,0 @@
|
|||
README for MIPS time services
|
||||
|
||||
Jun Sun
|
||||
jsun@mvista.com or jsun@junsun.net
|
||||
|
||||
|
||||
ABOUT
|
||||
-----
|
||||
This file describes the new arch/mips/kernel/time.c, related files and the
|
||||
services they provide.
|
||||
|
||||
If you are short in patience and just want to know how to use time.c for a
|
||||
new board or convert an existing board, go to the last section.
|
||||
|
||||
|
||||
FILES, COMPATABILITY AND CONFIGS
|
||||
---------------------------------
|
||||
|
||||
The old arch/mips/kernel/time.c is renamed to old-time.c.
|
||||
|
||||
A new time.c is put there, together with include/asm-mips/time.h.
|
||||
|
||||
Two configs variables are introduced, CONFIG_OLD_TIME_C and CONFIG_NEW_TIME_C.
|
||||
So we allow boards using
|
||||
|
||||
1) old time.c (CONFIG_OLD_TIME_C)
|
||||
2) new time.c (CONFIG_NEW_TIME_C)
|
||||
3) neither (their own private time.c)
|
||||
|
||||
However, it is expected every board will move to the new time.c in the near
|
||||
future.
|
||||
|
||||
|
||||
WHAT THE NEW CODE PROVIDES?
|
||||
---------------------------
|
||||
|
||||
The new time code provide the following services:
|
||||
|
||||
a) Implements functions required by Linux common code:
|
||||
time_init
|
||||
|
||||
b) provides an abstraction of RTC and null RTC implementation as default.
|
||||
extern unsigned long (*rtc_get_time)(void);
|
||||
extern int (*rtc_set_time)(unsigned long);
|
||||
|
||||
c) high-level and low-level timer interrupt routines where the timer
|
||||
interrupt source may or may not be the CPU timer. The high-level
|
||||
routine is dispatched through do_IRQ() while the low-level is
|
||||
dispatched in assemably code (usually int-handler.S)
|
||||
|
||||
|
||||
WHAT THE NEW CODE REQUIRES?
|
||||
---------------------------
|
||||
|
||||
For the new code to work properly, each board implementation needs to supply
|
||||
the following functions or values:
|
||||
|
||||
a) board_time_init - a function pointer. Invoked at the beginnig of
|
||||
time_init(). It is optional.
|
||||
1. (optional) set up RTC routines
|
||||
2. (optional) calibrate and set the mips_hpt_frequency
|
||||
|
||||
b) plat_timer_setup - a function pointer. Invoked at the end of time_init()
|
||||
1. (optional) over-ride any decisions made in time_init()
|
||||
2. set up the irqaction for timer interrupt.
|
||||
3. enable the timer interrupt
|
||||
|
||||
c) (optional) board-specific RTC routines.
|
||||
|
||||
d) (optional) mips_hpt_frequency - It must be definied if the board
|
||||
is using CPU counter for timer interrupt.
|
||||
|
||||
|
||||
PORTING GUIDE
|
||||
-------------
|
||||
|
||||
Step 1: decide how you like to implement the time services.
|
||||
|
||||
a) does this board have a RTC? If yes, implement the two RTC funcs.
|
||||
|
||||
b) does the CPU have counter/compare registers?
|
||||
|
||||
If the answer is no, you need a timer to provide the timer interrupt
|
||||
at 100 HZ speed.
|
||||
|
||||
c) The following sub steps assume your CPU has counter register.
|
||||
Do you plan to use the CPU counter register as the timer interrupt
|
||||
or use an exnternal timer?
|
||||
|
||||
In order to use CPU counter register as the timer interrupt source, you
|
||||
must know the counter speed (mips_hpt_frequency). It is usually the
|
||||
same as the CPU speed or an integral divisor of it.
|
||||
|
||||
d) decide on whether you want to use high-level or low-level timer
|
||||
interrupt routines. The low-level one is presumably faster, but should
|
||||
not make too mcuh difference.
|
||||
|
||||
|
||||
Step 2: the machine setup() function
|
||||
|
||||
If you supply board_time_init(), set the function poointer.
|
||||
|
||||
|
||||
Step 3: implement rtc routines, board_time_init() and plat_timer_setup()
|
||||
if needed.
|
||||
|
||||
board_time_init() -
|
||||
a) (optional) set up RTC routines,
|
||||
b) (optional) calibrate and set the mips_hpt_frequency
|
||||
(only needed if you intended to use cpu counter as timer interrupt
|
||||
source)
|
||||
|
||||
plat_timer_setup() -
|
||||
a) (optional) over-write any choices made above by time_init().
|
||||
b) machine specific code should setup the timer irqaction.
|
||||
c) enable the timer interrupt
|
||||
|
||||
|
||||
If the RTC chip is a common chip, I suggest the routines are put under
|
||||
arch/mips/libs. For example, for DS1386 chip, one would create
|
||||
rtc-ds1386.c under arch/mips/lib directory. Add the following line to
|
||||
the arch/mips/lib/Makefile:
|
||||
|
||||
obj-$(CONFIG_DDB5476) += rtc-ds1386.o
|
||||
|
||||
Step 4: if you are using low-level timer interrupt, change your interrupt
|
||||
dispathcing code to check for timer interrupt and jump to
|
||||
ll_timer_interrupt() directly if one is detected.
|
||||
|
||||
Step 5: Modify arch/mips/config.in and add CONFIG_NEW_TIME_C to your machine.
|
||||
Modify the appropriate defconfig if applicable.
|
||||
|
||||
Final notes:
|
||||
|
||||
For some tricky cases, you may need to add your own wrapper functions
|
||||
for some of the functions in time.c.
|
||||
|
||||
For example, you may define your own timer interrupt routine, which does
|
||||
some of its own processing and then calls timer_interrupt().
|
||||
|
||||
You can also over-ride any of the built-in functions (RTC routines
|
||||
and/or timer interrupt routine).
|
||||
|
||||
|
||||
PORTING NOTES FOR SMP
|
||||
----------------------
|
||||
|
||||
If you have a SMP box, things are slightly more complicated.
|
||||
|
||||
The time service running every jiffy is logically divided into two parts:
|
||||
|
||||
1) the one for the whole system (defined in timer_interrupt())
|
||||
2) the one that should run for each CPU (defined in local_timer_interrupt())
|
||||
|
||||
You need to decide on your timer interrupt sources.
|
||||
|
||||
case 1) - whole system has only one timer interrupt delivered to one CPU
|
||||
|
||||
In this case, you set up timer interrupt as in UP systems. In addtion,
|
||||
you need to set emulate_local_timer_interrupt to 1 so that other
|
||||
CPUs get to call local_timer_interrupt().
|
||||
|
||||
THIS IS CURRENTLY NOT IMPLEMNETED. However, it is rather easy to write
|
||||
one should such a need arise. You simply make a IPI call.
|
||||
|
||||
case 2) - each CPU has a separate timer interrupt
|
||||
|
||||
In this case, you need to set up IRQ such that each of them will
|
||||
call local_timer_interrupt(). In addition, you need to arrange
|
||||
one and only one of them to call timer_interrupt().
|
||||
|
||||
You can also do the low-level version of those interrupt routines,
|
||||
following similar dispatching routes described above.
|
||||
|
|
@ -46,10 +46,3 @@ void __init plat_time_init(void)
|
|||
/* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
|
||||
mips_hpt_frequency = hz;
|
||||
}
|
||||
|
||||
void __init
|
||||
plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
/* Enable the timer interrupt */
|
||||
setup_irq(7, irq);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,71 +1,68 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.20
|
||||
# Tue Feb 20 21:47:35 2007
|
||||
# Linux kernel version: 2.6.23
|
||||
# Thu Oct 18 22:45:52 2007
|
||||
#
|
||||
CONFIG_MIPS=y
|
||||
|
||||
#
|
||||
# Machine selection
|
||||
#
|
||||
CONFIG_ZONE_DMA=y
|
||||
# CONFIG_MIPS_MTX1 is not set
|
||||
# CONFIG_MIPS_BOSPORUS is not set
|
||||
# CONFIG_MIPS_PB1000 is not set
|
||||
# CONFIG_MIPS_PB1100 is not set
|
||||
# CONFIG_MIPS_PB1500 is not set
|
||||
# CONFIG_MIPS_PB1550 is not set
|
||||
# CONFIG_MIPS_PB1200 is not set
|
||||
# CONFIG_MIPS_DB1000 is not set
|
||||
# CONFIG_MIPS_DB1100 is not set
|
||||
# CONFIG_MIPS_DB1500 is not set
|
||||
# CONFIG_MIPS_DB1550 is not set
|
||||
# CONFIG_MIPS_DB1200 is not set
|
||||
# CONFIG_MIPS_MIRAGE is not set
|
||||
# CONFIG_MACH_ALCHEMY is not set
|
||||
# CONFIG_BASLER_EXCITE is not set
|
||||
# CONFIG_BCM47XX is not set
|
||||
# CONFIG_MIPS_COBALT is not set
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_LASAT is not set
|
||||
# CONFIG_LEMOTE_FULONG is not set
|
||||
# CONFIG_MIPS_ATLAS is not set
|
||||
# CONFIG_MIPS_MALTA is not set
|
||||
# CONFIG_MIPS_SEAD is not set
|
||||
# CONFIG_WR_PPMC is not set
|
||||
CONFIG_MIPS_SIM=y
|
||||
# CONFIG_MOMENCO_JAGUAR_ATX is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_MARKEINS is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
# CONFIG_PMC_MSP is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
# CONFIG_QEMU is not set
|
||||
# CONFIG_MARKEINS is not set
|
||||
# CONFIG_SGI_IP22 is not set
|
||||
# CONFIG_SGI_IP27 is not set
|
||||
# CONFIG_SGI_IP32 is not set
|
||||
# CONFIG_SIBYTE_BIGSUR is not set
|
||||
# CONFIG_SIBYTE_SWARM is not set
|
||||
# CONFIG_SIBYTE_SENTOSA is not set
|
||||
# CONFIG_SIBYTE_RHONE is not set
|
||||
# CONFIG_SIBYTE_CARMEL is not set
|
||||
# CONFIG_SIBYTE_PTSWARM is not set
|
||||
# CONFIG_SIBYTE_LITTLESUR is not set
|
||||
# CONFIG_SIBYTE_CRHINE is not set
|
||||
# CONFIG_SIBYTE_CARMEL is not set
|
||||
# CONFIG_SIBYTE_CRHONE is not set
|
||||
# CONFIG_SIBYTE_RHONE is not set
|
||||
# CONFIG_SIBYTE_SWARM is not set
|
||||
# CONFIG_SIBYTE_LITTLESUR is not set
|
||||
# CONFIG_SIBYTE_SENTOSA is not set
|
||||
# CONFIG_SIBYTE_PTSWARM is not set
|
||||
# CONFIG_SIBYTE_BIGSUR is not set
|
||||
# CONFIG_SNI_RM is not set
|
||||
# CONFIG_TOSHIBA_JMR3927 is not set
|
||||
# CONFIG_TOSHIBA_RBTX4927 is not set
|
||||
# CONFIG_TOSHIBA_RBTX4938 is not set
|
||||
# CONFIG_WR_PPMC is not set
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
|
||||
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
|
||||
CONFIG_BOOT_RAW=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_DMA_NEED_PCI_MAP_STATE=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
# CONFIG_HOTPLUG_CPU is not set
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
# CONFIG_CPU_BIG_ENDIAN is not set
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
|
|
@ -76,6 +73,11 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
|
|||
#
|
||||
# CPU selection
|
||||
#
|
||||
# CONFIG_TICK_ONESHOT is not set
|
||||
# CONFIG_NO_HZ is not set
|
||||
# CONFIG_HIGH_RES_TIMERS is not set
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
# CONFIG_CPU_LOONGSON2 is not set
|
||||
CONFIG_CPU_MIPS32_R1=y
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
|
|
@ -115,8 +117,8 @@ CONFIG_CPU_HAS_PREFETCH=y
|
|||
CONFIG_MIPS_MT_DISABLED=y
|
||||
# CONFIG_MIPS_MT_SMP is not set
|
||||
# CONFIG_MIPS_MT_SMTC is not set
|
||||
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
|
||||
# CONFIG_MIPS_VPE_LOADER is not set
|
||||
# CONFIG_64BIT_PHYS_ADDR is not set
|
||||
CONFIG_CPU_HAS_LLSC=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
|
|
@ -130,50 +132,52 @@ CONFIG_FLATMEM_MANUAL=y
|
|||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
# CONFIG_HZ_48 is not set
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_100=y
|
||||
# CONFIG_HZ_128 is not set
|
||||
# CONFIG_HZ_250 is not set
|
||||
# CONFIG_HZ_256 is not set
|
||||
CONFIG_HZ_1000=y
|
||||
# CONFIG_HZ_1000 is not set
|
||||
# CONFIG_HZ_1024 is not set
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_HZ=1000
|
||||
CONFIG_HZ=100
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
# CONFIG_KEXEC is not set
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
# General setup
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SWAP=y
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_IPC_NS is not set
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_FAIR_GROUP_SCHED=y
|
||||
CONFIG_FAIR_USER_SCHED=y
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
# CONFIG_RELAY is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
|
|
@ -187,31 +191,29 @@ CONFIG_BUG=y
|
|||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_SLOB is not set
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
CONFIG_MODVERSIONS=y
|
||||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# Block layer
|
||||
#
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
|
|
@ -229,17 +231,10 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
#
|
||||
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
|
||||
#
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_MMU=y
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
# PCI Hotplug Support
|
||||
#
|
||||
|
||||
#
|
||||
# Executable file formats
|
||||
#
|
||||
|
|
@ -250,9 +245,8 @@ CONFIG_TRAD_SIGNALS=y
|
|||
#
|
||||
# Power management options
|
||||
#
|
||||
CONFIG_PM=y
|
||||
# CONFIG_PM_LEGACY is not set
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_SUSPEND_UP_POSSIBLE=y
|
||||
|
||||
#
|
||||
# Networking
|
||||
|
|
@ -262,75 +256,50 @@ CONFIG_NET=y
|
|||
#
|
||||
# Networking options
|
||||
#
|
||||
# CONFIG_NETDEBUG is not set
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM=y
|
||||
# CONFIG_XFRM_USER is not set
|
||||
# CONFIG_XFRM_SUB_POLICY is not set
|
||||
CONFIG_XFRM_MIGRATE=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_NET_KEY_MIGRATE=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_ASK_IP_FIB_HASH=y
|
||||
# CONFIG_IP_FIB_TRIE is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
CONFIG_IP_MULTIPLE_TABLES=y
|
||||
CONFIG_IP_ROUTE_MULTIPATH=y
|
||||
# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
|
||||
CONFIG_IP_ROUTE_VERBOSE=y
|
||||
# CONFIG_IP_MULTIPLE_TABLES is not set
|
||||
# CONFIG_IP_ROUTE_MULTIPATH is not set
|
||||
# CONFIG_IP_ROUTE_VERBOSE is not set
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_IP_PIMSM_V2=y
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
CONFIG_INET_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
CONFIG_TCP_MD5SIG=y
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
CONFIG_NETWORK_SECMARK=y
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# DCCP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_DCCP is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
CONFIG_IP_SCTP=m
|
||||
# CONFIG_SCTP_DBG_MSG is not set
|
||||
# CONFIG_SCTP_DBG_OBJCNT is not set
|
||||
# CONFIG_SCTP_HMAC_NONE is not set
|
||||
# CONFIG_SCTP_HMAC_SHA1 is not set
|
||||
CONFIG_SCTP_HMAC_MD5=y
|
||||
|
||||
#
|
||||
# TIPC Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
|
|
@ -347,44 +316,7 @@ CONFIG_SCTP_HMAC_MD5=y
|
|||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
CONFIG_NET_SCHED=y
|
||||
CONFIG_NET_SCH_FIFO=y
|
||||
CONFIG_NET_SCH_CLK_JIFFIES=y
|
||||
# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
|
||||
# CONFIG_NET_SCH_CLK_CPU is not set
|
||||
|
||||
#
|
||||
# Queueing/Scheduling
|
||||
#
|
||||
CONFIG_NET_SCH_CBQ=m
|
||||
CONFIG_NET_SCH_HTB=m
|
||||
CONFIG_NET_SCH_HFSC=m
|
||||
CONFIG_NET_SCH_PRIO=m
|
||||
CONFIG_NET_SCH_RED=m
|
||||
CONFIG_NET_SCH_SFQ=m
|
||||
CONFIG_NET_SCH_TEQL=m
|
||||
CONFIG_NET_SCH_TBF=m
|
||||
CONFIG_NET_SCH_GRED=m
|
||||
CONFIG_NET_SCH_DSMARK=m
|
||||
CONFIG_NET_SCH_NETEM=m
|
||||
CONFIG_NET_SCH_INGRESS=m
|
||||
|
||||
#
|
||||
# Classification
|
||||
#
|
||||
CONFIG_NET_CLS=y
|
||||
CONFIG_NET_CLS_BASIC=m
|
||||
CONFIG_NET_CLS_TCINDEX=m
|
||||
CONFIG_NET_CLS_ROUTE4=m
|
||||
CONFIG_NET_CLS_ROUTE=y
|
||||
# CONFIG_NET_CLS_FW is not set
|
||||
# CONFIG_NET_CLS_U32 is not set
|
||||
# CONFIG_NET_CLS_RSVP is not set
|
||||
# CONFIG_NET_CLS_RSVP6 is not set
|
||||
# CONFIG_NET_EMATCH is not set
|
||||
# CONFIG_NET_CLS_ACT is not set
|
||||
# CONFIG_NET_CLS_POLICE is not set
|
||||
CONFIG_NET_ESTIMATOR=y
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
|
|
@ -393,8 +325,17 @@ CONFIG_NET_ESTIMATOR=y
|
|||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
CONFIG_FIB_RULES=y
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
|
|
@ -403,52 +344,25 @@ CONFIG_FIB_RULES=y
|
|||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_DEBUG_DEVRES is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
#
|
||||
# CONFIG_MTD is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
# CONFIG_PNPACPI is not set
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
|
||||
CONFIG_BLK_DEV_NBD=y
|
||||
# CONFIG_BLK_DEV_RAM is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
|
||||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
|
|
@ -456,48 +370,29 @@ CONFIG_BLK_DEV_NBD=y
|
|||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
|
||||
#
|
||||
# Serial ATA (prod) and Parallel ATA (experimental) drivers
|
||||
#
|
||||
# CONFIG_ATA is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
# CONFIG_FUSION is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
|
||||
#
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NETDEVICES_MULTIQUEUE is not set
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
# CONFIG_VETH is not set
|
||||
# CONFIG_PHYLIB is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
# CONFIG_MII is not set
|
||||
# CONFIG_AX88796 is not set
|
||||
CONFIG_MIPS_SIM_NET=y
|
||||
# CONFIG_DM9000 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
|
||||
|
|
@ -513,49 +408,18 @@ CONFIG_MIPS_SIM_NET=y
|
|||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Telephony Support
|
||||
#
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
CONFIG_SERIO=y
|
||||
# CONFIG_SERIO_I8042 is not set
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
# CONFIG_SERIO_LIBPS2 is not set
|
||||
# CONFIG_SERIO_RAW is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
|
|
@ -581,31 +445,13 @@ CONFIG_SERIAL_CORE_CONSOLE=y
|
|||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
|
||||
#
|
||||
# Watchdog Cards
|
||||
#
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_GEN_RTC is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
# CONFIG_I2C is not set
|
||||
|
||||
#
|
||||
|
|
@ -613,118 +459,60 @@ CONFIG_LEGACY_PTY_COUNT=256
|
|||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
|
||||
#
|
||||
# Hardware Monitoring support
|
||||
# Sonics Silicon Backplane
|
||||
#
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_HWMON_VID is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
# CONFIG_SSB is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
#
|
||||
# CONFIG_DVB is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_DAB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_FIRMWARE_EDID is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# HID Devices
|
||||
#
|
||||
# CONFIG_HID is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
# CONFIG_USB_ARCH_HAS_HCD is not set
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
#
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# InfiniBand support
|
||||
#
|
||||
|
||||
#
|
||||
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
CONFIG_RTC_LIB=y
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
#
|
||||
|
||||
#
|
||||
# Auxiliary Display support
|
||||
#
|
||||
|
||||
#
|
||||
# Virtualization
|
||||
# Userspace I/O
|
||||
#
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT2_FS_XIP is not set
|
||||
# CONFIG_EXT2_FS is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
|
|
@ -732,6 +520,7 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
CONFIG_ROMFS_FS=y
|
||||
# CONFIG_INOTIFY is not set
|
||||
|
|
@ -760,10 +549,11 @@ CONFIG_ROMFS_FS=y
|
|||
CONFIG_PROC_FS=y
|
||||
# CONFIG_PROC_KCORE is not set
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
# CONFIG_SYSFS is not set
|
||||
# CONFIG_TMPFS is not set
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
|
|
@ -781,10 +571,7 @@ CONFIG_RAMFS=y
|
|||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
|
|
@ -796,6 +583,7 @@ CONFIG_LOCKD=y
|
|||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_SUNRPC_BIND34 is not set
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
|
|
@ -803,22 +591,14 @@ CONFIG_SUNRPC=y
|
|||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
#
|
||||
# CONFIG_DLM is not set
|
||||
|
||||
#
|
||||
# Profiling support
|
||||
|
|
@ -833,20 +613,22 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
|||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DEBUG_SHIRQ is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_DETECT_SOFTLOCKUP is not set
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
CONFIG_DEBUG_MUTEXES=y
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_LOCK_ALLOC is not set
|
||||
# CONFIG_PROVE_LOCKING is not set
|
||||
# CONFIG_LOCK_STAT is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
|
|
@ -854,7 +636,9 @@ CONFIG_DEBUG_INFO=y
|
|||
# CONFIG_DEBUG_VM is not set
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
CONFIG_FORCED_INLINING=y
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
CONFIG_CROSSCOMPILE=y
|
||||
CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp"
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
|
|
@ -865,60 +649,20 @@ CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp"
|
|||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=m
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
# CONFIG_CRYPTO_MD4 is not set
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
# CONFIG_CRYPTO_SHA1 is not set
|
||||
# CONFIG_CRYPTO_SHA256 is not set
|
||||
# CONFIG_CRYPTO_SHA512 is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
# CONFIG_CRYPTO_TGR192 is not set
|
||||
CONFIG_CRYPTO_GF128MUL=m
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_CBC=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_LRW=m
|
||||
# CONFIG_CRYPTO_DES is not set
|
||||
CONFIG_CRYPTO_FCRYPT=m
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_AES is not set
|
||||
# CONFIG_CRYPTO_CAST5 is not set
|
||||
# CONFIG_CRYPTO_CAST6 is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
# CONFIG_CRYPTO_KHAZAD is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
CONFIG_CRYPTO_CAMELLIA=m
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
# CONFIG_CRC32 is not set
|
||||
# CONFIG_CRC7 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
|
|
|
|||
|
|
@ -104,12 +104,6 @@ void __init plat_time_init(void)
|
|||
mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
|
||||
}
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
/* we are using the cpu counter for timer interrupts */
|
||||
setup_irq(CPU_IRQ_BASE + 7, irq);
|
||||
}
|
||||
|
||||
static void markeins_board_init(void);
|
||||
extern void markeins_irq_setup(void);
|
||||
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
#include <linux/interrupt.h>
|
||||
#include <linux/percpu.h>
|
||||
|
||||
#include <asm/smtc_ipi.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
static int mips_next_event(unsigned long delta,
|
||||
|
|
|
|||
|
|
@ -39,17 +39,6 @@
|
|||
|
||||
#include <irq.h>
|
||||
|
||||
/*
|
||||
* The integer part of the number of usecs per jiffy is taken from tick,
|
||||
* but the fractional part is not recorded, so we calculate it using the
|
||||
* initial value of HZ. This aids systems where tick isn't really an
|
||||
* integer (e.g. for HZ = 128).
|
||||
*/
|
||||
#define USECS_PER_JIFFY TICK_SIZE
|
||||
#define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ))
|
||||
|
||||
#define TICK_SIZE (tick_nsec / 1000)
|
||||
|
||||
/*
|
||||
* forward reference
|
||||
*/
|
||||
|
|
@ -182,25 +171,48 @@ struct clocksource clocksource_mips = {
|
|||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
static void __init init_mips_clocksource(void)
|
||||
void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
|
||||
{
|
||||
u64 temp;
|
||||
u32 shift;
|
||||
|
||||
/* Find a shift value */
|
||||
for (shift = 32; shift > 0; shift--) {
|
||||
temp = (u64) NSEC_PER_SEC << shift;
|
||||
do_div(temp, clock);
|
||||
if ((temp >> 32) == 0)
|
||||
break;
|
||||
}
|
||||
cs->shift = shift;
|
||||
cs->mult = (u32) temp;
|
||||
}
|
||||
|
||||
void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
|
||||
unsigned int clock)
|
||||
{
|
||||
u64 temp;
|
||||
u32 shift;
|
||||
|
||||
/* Find a shift value */
|
||||
for (shift = 32; shift > 0; shift--) {
|
||||
temp = (u64) NSEC_PER_SEC << shift;
|
||||
do_div(temp, clock);
|
||||
if ((temp >> 32) == 0)
|
||||
break;
|
||||
}
|
||||
cd->shift = shift;
|
||||
cd->mult = (u32) temp;
|
||||
}
|
||||
|
||||
static void __init init_mips_clocksource(void)
|
||||
{
|
||||
if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
|
||||
return;
|
||||
|
||||
/* Calclate a somewhat reasonable rating value */
|
||||
clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
|
||||
/* Find a shift value */
|
||||
for (shift = 32; shift > 0; shift--) {
|
||||
temp = (u64) NSEC_PER_SEC << shift;
|
||||
do_div(temp, mips_hpt_frequency);
|
||||
if ((temp >> 32) == 0)
|
||||
break;
|
||||
}
|
||||
clocksource_mips.shift = shift;
|
||||
clocksource_mips.mult = (u32)temp;
|
||||
|
||||
clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
|
||||
|
||||
clocksource_register(&clocksource_mips);
|
||||
}
|
||||
|
|
@ -213,54 +225,6 @@ void __init __weak plat_timer_setup(struct irqaction *irq)
|
|||
{
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
DEFINE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);
|
||||
|
||||
static void smtc_set_mode(enum clock_event_mode mode,
|
||||
struct clock_event_device *evt)
|
||||
{
|
||||
}
|
||||
|
||||
static void mips_broadcast(cpumask_t mask)
|
||||
{
|
||||
unsigned int cpu;
|
||||
|
||||
for_each_cpu_mask(cpu, mask)
|
||||
smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
|
||||
}
|
||||
|
||||
static void setup_smtc_dummy_clockevent_device(void)
|
||||
{
|
||||
//uint64_t mips_freq = mips_hpt_^frequency;
|
||||
unsigned int cpu = smp_processor_id();
|
||||
struct clock_event_device *cd;
|
||||
|
||||
cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
|
||||
|
||||
cd->name = "SMTC";
|
||||
cd->features = CLOCK_EVT_FEAT_DUMMY;
|
||||
|
||||
/* Calculate the min / max delta */
|
||||
cd->mult = 0; //div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
|
||||
cd->shift = 0; //32;
|
||||
cd->max_delta_ns = 0; //clockevent_delta2ns(0x7fffffff, cd);
|
||||
cd->min_delta_ns = 0; //clockevent_delta2ns(0x30, cd);
|
||||
|
||||
cd->rating = 200;
|
||||
cd->irq = 17; //-1;
|
||||
// if (cpu)
|
||||
// cd->cpumask = CPU_MASK_ALL; // cpumask_of_cpu(cpu);
|
||||
// else
|
||||
cd->cpumask = cpumask_of_cpu(cpu);
|
||||
|
||||
cd->set_mode = smtc_set_mode;
|
||||
|
||||
cd->broadcast = mips_broadcast;
|
||||
|
||||
clockevents_register_device(cd);
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init time_init(void)
|
||||
{
|
||||
plat_time_init();
|
||||
|
|
|
|||
|
|
@ -53,11 +53,6 @@ unsigned long bus_clock;
|
|||
unsigned int memsize;
|
||||
unsigned int highmemsize = 0;
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + 7, irq);
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
/* setup mips r4k timer */
|
||||
|
|
|
|||
|
|
@ -86,8 +86,5 @@ void __init plat_timer_setup(struct irqaction *irq)
|
|||
#ifdef CONFIG_IRQ_MSP_CIC
|
||||
/* we are using the vpe0 counter for timer interrupts */
|
||||
setup_irq(MSP_INT_VPE0_TIMER, irq);
|
||||
#else
|
||||
/* we are using the mips counter for timer interrupts */
|
||||
setup_irq(MSP_INT_TIMER, irq);
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -137,11 +137,6 @@ int rtc_mips_set_time(unsigned long tim)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
setup_irq(7, irq);
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
mips_hpt_frequency = cpu_clock_freq / 2;
|
||||
|
|
|
|||
|
|
@ -69,8 +69,9 @@ void bcm1480_smp_init(void)
|
|||
|
||||
void bcm1480_smp_finish(void)
|
||||
{
|
||||
extern void bcm1480_time_init(void);
|
||||
bcm1480_time_init();
|
||||
extern void sb1480_clockevent_init(void);
|
||||
|
||||
sb1480_clockevent_init();
|
||||
local_irq_enable();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -27,9 +27,8 @@
|
|||
*/
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/percpu.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/addrspace.h>
|
||||
|
|
@ -101,22 +100,33 @@ static void sibyte_set_mode(enum clock_event_mode mode,
|
|||
break;
|
||||
|
||||
case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
|
||||
case CLOCK_EVT_MODE_RESUME:
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
struct clock_event_device sibyte_hpt_clockevent = {
|
||||
.name = "bcm1480-counter",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC,
|
||||
.set_mode = sibyte_set_mode,
|
||||
.shift = 32,
|
||||
.irq = 0,
|
||||
};
|
||||
static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
void __iomem *timer_init;
|
||||
unsigned int cnt;
|
||||
int res;
|
||||
|
||||
timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
|
||||
cnt = __raw_readq(timer_init);
|
||||
cnt += delta;
|
||||
__raw_writeq(cnt, timer_init);
|
||||
res = ((long)(__raw_readq(timer_init) - cnt ) > 0) ? -ETIME : 0;
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent);
|
||||
|
||||
static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
|
||||
{
|
||||
struct clock_event_device *cd = &sibyte_hpt_clockevent;
|
||||
unsigned int cpu = smp_processor_id();
|
||||
struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu);
|
||||
|
||||
/* Reset the timer */
|
||||
__raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
|
||||
|
|
@ -140,26 +150,23 @@ static struct irqaction sibyte_counter_irqaction = {
|
|||
* called directly from irq_handler.S when IP[4] is set during an
|
||||
* interrupt
|
||||
*/
|
||||
static void __init sb1480_clockevent_init(void)
|
||||
void __cpuinit sb1480_clockevent_init(void)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu;
|
||||
struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu);
|
||||
|
||||
cd->name = "bcm1480-counter";
|
||||
cd->features = CLOCK_EVT_FEAT_PERIODIC |
|
||||
CLOCK_EVT_MODE_ONESHOT;
|
||||
cd->set_next_event = sibyte_next_event;
|
||||
cd->set_mode = sibyte_set_mode;
|
||||
cd->irq = irq;
|
||||
clockevent_set_clock(cd, BCM1480_HPT_VALUE);
|
||||
|
||||
setup_irq(irq, &sibyte_counter_irqaction);
|
||||
}
|
||||
|
||||
void bcm1480_timer_interrupt(void)
|
||||
{
|
||||
int cpu = smp_processor_id();
|
||||
int irq = K_BCM1480_INT_TIMER_0 + cpu;
|
||||
|
||||
/* Reset the timer */
|
||||
__raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
|
||||
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
|
||||
|
||||
ll_timer_interrupt(irq);
|
||||
}
|
||||
|
||||
static cycle_t bcm1480_hpt_read(void)
|
||||
{
|
||||
/* We assume this function is called xtime_lock held. */
|
||||
|
|
@ -168,9 +175,26 @@ static cycle_t bcm1480_hpt_read(void)
|
|||
return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count;
|
||||
}
|
||||
|
||||
struct clocksource bcm1480_clocksource = {
|
||||
.name = "MIPS",
|
||||
.rating = 200,
|
||||
.read = bcm1480_hpt_read,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.shift = 32,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
void __init sb1480_clocksource_init(void)
|
||||
{
|
||||
struct clocksource *cs = &bcm1480_clocksource;
|
||||
|
||||
clocksource_set_clock(cs, BCM1480_HPT_VALUE);
|
||||
clocksource_register(cs);
|
||||
}
|
||||
|
||||
void __init bcm1480_hpt_setup(void)
|
||||
{
|
||||
clocksource_mips.read = bcm1480_hpt_read;
|
||||
mips_hpt_frequency = BCM1480_HPT_VALUE;
|
||||
sb1480_clocksource_init();
|
||||
sb1480_clockevent_init();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -400,43 +400,11 @@ static void sb1250_kgdb_interrupt(void)
|
|||
|
||||
#endif /* CONFIG_KGDB */
|
||||
|
||||
static inline void sb1250_timer_interrupt(void)
|
||||
{
|
||||
int cpu = smp_processor_id();
|
||||
int irq = K_INT_TIMER_0 + cpu;
|
||||
|
||||
irq_enter();
|
||||
kstat_this_cpu.irqs[irq]++;
|
||||
|
||||
write_seqlock(&xtime_lock);
|
||||
|
||||
/* ACK interrupt */
|
||||
____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
|
||||
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
|
||||
|
||||
/*
|
||||
* call the generic timer interrupt handling
|
||||
*/
|
||||
do_timer(1);
|
||||
|
||||
write_sequnlock(&xtime_lock);
|
||||
|
||||
/*
|
||||
* In UP mode, we call local_timer_interrupt() to do profiling
|
||||
* and process accouting.
|
||||
*
|
||||
* In SMP mode, local_timer_interrupt() is invoked by appropriate
|
||||
* low-level local timer interrupt handler.
|
||||
*/
|
||||
local_timer_interrupt(irq);
|
||||
|
||||
irq_exit();
|
||||
}
|
||||
|
||||
extern void sb1250_mailbox_interrupt(void);
|
||||
|
||||
asmlinkage void plat_irq_dispatch(void)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
unsigned int pending;
|
||||
|
||||
/*
|
||||
|
|
@ -454,7 +422,7 @@ asmlinkage void plat_irq_dispatch(void)
|
|||
if (pending & CAUSEF_IP7) /* CPU performance counter interrupt */
|
||||
do_IRQ(MIPS_CPU_IRQ_BASE + 7);
|
||||
else if (pending & CAUSEF_IP4)
|
||||
sb1250_timer_interrupt();
|
||||
do_IRQ(K_INT_TIMER_0 + cpu); /* sb1250_timer_interrupt() */
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
else if (pending & CAUSEF_IP3)
|
||||
|
|
|
|||
|
|
@ -57,8 +57,9 @@ void sb1250_smp_init(void)
|
|||
|
||||
void sb1250_smp_finish(void)
|
||||
{
|
||||
extern void sb1250_time_init(void);
|
||||
sb1250_time_init();
|
||||
extern void sb1250_clockevent_init(void);
|
||||
|
||||
sb1250_clockevent_init();
|
||||
local_irq_enable();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -100,6 +100,7 @@ static void sibyte_set_mode(enum clock_event_mode mode,
|
|||
break;
|
||||
|
||||
case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
|
||||
case CLOCK_EVT_MODE_RESUME:
|
||||
;
|
||||
}
|
||||
}
|
||||
|
|
@ -144,79 +145,7 @@ static struct irqaction sibyte_irqaction = {
|
|||
.name = "timer",
|
||||
};
|
||||
|
||||
/*
|
||||
* The general purpose timer ticks at 1 Mhz independent if
|
||||
* the rest of the system
|
||||
*/
|
||||
static void sibyte_set_mode(enum clock_event_mode mode,
|
||||
struct clock_event_device *evt)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
void __iomem *timer_cfg, *timer_init;
|
||||
|
||||
timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
|
||||
timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
|
||||
|
||||
switch (mode) {
|
||||
case CLOCK_EVT_MODE_PERIODIC:
|
||||
__raw_writeq(0, timer_cfg);
|
||||
__raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, timer_init);
|
||||
__raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
|
||||
timer_cfg);
|
||||
break;
|
||||
|
||||
case CLOCK_EVT_MODE_ONESHOT:
|
||||
/* Stop the timer until we actually program a shot */
|
||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
__raw_writeq(0, timer_cfg);
|
||||
break;
|
||||
|
||||
case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
sibyte_next_event(unsigned long delta, struct clock_event_device *evt)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
void __iomem *timer_cfg, *timer_init;
|
||||
|
||||
timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
|
||||
timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
|
||||
|
||||
__raw_writeq(0, timer_cfg);
|
||||
__raw_writeq(delta, timer_init);
|
||||
__raw_writeq(M_SCD_TIMER_ENABLE, timer_cfg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct clock_event_device sibyte_hpt_clockevent = {
|
||||
.name = "sb1250-counter",
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC,
|
||||
.set_mode = sibyte_set_mode,
|
||||
.set_next_event = sibyte_next_event,
|
||||
.shift = 32,
|
||||
.irq = 0,
|
||||
};
|
||||
|
||||
static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
|
||||
{
|
||||
struct clock_event_device *cd = &sibyte_hpt_clockevent;
|
||||
|
||||
cd->event_handler(cd);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction sibyte_irqaction = {
|
||||
.handler = sibyte_counter_handler,
|
||||
.flags = IRQF_DISABLED | IRQF_PERCPU,
|
||||
.name = "timer",
|
||||
};
|
||||
|
||||
static void __init sb1250_clockevent_init(void)
|
||||
void __cpuinit sb1250_clockevent_init(void)
|
||||
{
|
||||
struct clock_event_device *cd = &sibyte_hpt_clockevent;
|
||||
unsigned int cpu = smp_processor_id();
|
||||
|
|
@ -249,12 +178,6 @@ static void __init sb1250_clockevent_init(void)
|
|||
clockevents_register_device(cd);
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
sb1250_clocksource_init();
|
||||
sb1250_clockevent_init();
|
||||
}
|
||||
|
||||
/*
|
||||
* The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
|
||||
* again.
|
||||
|
|
@ -267,3 +190,26 @@ static cycle_t sb1250_hpt_read(void)
|
|||
|
||||
return SB1250_HPT_VALUE - count;
|
||||
}
|
||||
|
||||
struct clocksource bcm1250_clocksource = {
|
||||
.name = "MIPS",
|
||||
.rating = 200,
|
||||
.read = sb1250_hpt_read,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.shift = 32,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
void __init sb1250_clocksource_init(void)
|
||||
{
|
||||
struct clocksource *cs = &bcm1250_clocksource;
|
||||
|
||||
clocksource_set_clock(cs, V_SCD_TIMER_FREQ);
|
||||
clocksource_register(cs);
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
sb1250_clocksource_init();
|
||||
sb1250_clockevent_init();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -69,31 +69,6 @@ const char *get_system_type(void)
|
|||
return "SiByte " SIBYTE_BOARD_NAME;
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
|
||||
/* Setup HPT */
|
||||
sb1250_hpt_setup();
|
||||
#endif
|
||||
}
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
/*
|
||||
* we don't set up irqaction, because we will deliver timer
|
||||
* interrupts through low-level (direct) meachanism.
|
||||
*/
|
||||
|
||||
/* We only need to setup the generic timer */
|
||||
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
|
||||
bcm1480_time_init();
|
||||
#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
|
||||
sb1250_time_init();
|
||||
#else
|
||||
#error invalid SiByte board configuration
|
||||
#endif
|
||||
}
|
||||
|
||||
int swarm_be_handler(struct pt_regs *regs, int is_fixup)
|
||||
{
|
||||
if (!is_fixup && (regs->cp0_cause & 4)) {
|
||||
|
|
|
|||
|
|
@ -121,15 +121,6 @@ void __init plat_time_init(void)
|
|||
setup_pit_timer();
|
||||
}
|
||||
|
||||
/*
|
||||
* R4k counter based timer interrupt. Works on RM200-225 and possibly
|
||||
* others but not on RM400
|
||||
*/
|
||||
static void __init sni_cpu_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
setup_irq(SNI_MIPS_IRQ_CPU_TIMER, irq);
|
||||
}
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
switch (sni_brd_type) {
|
||||
|
|
@ -139,15 +130,6 @@ void __init plat_timer_setup(struct irqaction *irq)
|
|||
case SNI_BRD_MINITOWER:
|
||||
sni_a20r_timer_setup(irq);
|
||||
break;
|
||||
|
||||
case SNI_BRD_PCI_TOWER:
|
||||
case SNI_BRD_RM200:
|
||||
case SNI_BRD_PCI_MTOWER:
|
||||
case SNI_BRD_PCI_DESKTOP:
|
||||
case SNI_BRD_PCI_TOWER_CPLUS:
|
||||
case SNI_BRD_PCI_MTOWER_CPLUS:
|
||||
sni_cpu_timer_setup(irq);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -72,22 +72,6 @@ void __init plat_time_init(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
setup_irq(TX4927_IRQ_CPU_TIMER, irq);
|
||||
|
||||
#ifdef CONFIG_TOSHIBA_RBTX4927
|
||||
{
|
||||
extern void toshiba_rbtx4927_timer_setup(struct irqaction
|
||||
*irq);
|
||||
toshiba_rbtx4927_timer_setup(irq);
|
||||
}
|
||||
#endif
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
#ifdef DEBUG
|
||||
void print_cp0(char *key, int num, char *name, u32 val)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -94,7 +94,6 @@
|
|||
#define TOSHIBA_RBTX4927_SETUP_EFWFU ( 1 << 3 )
|
||||
#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 )
|
||||
#define TOSHIBA_RBTX4927_SETUP_TIME_INIT ( 1 << 5 )
|
||||
#define TOSHIBA_RBTX4927_SETUP_TIMER_SETUP ( 1 << 6 )
|
||||
#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 )
|
||||
#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 )
|
||||
#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 )
|
||||
|
|
@ -108,7 +107,6 @@ static const u32 toshiba_rbtx4927_setup_debug_flag =
|
|||
(TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO |
|
||||
TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR |
|
||||
TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP |
|
||||
TOSHIBA_RBTX4927_SETUP_TIME_INIT | TOSHIBA_RBTX4927_SETUP_TIMER_SETUP
|
||||
| TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 |
|
||||
TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66);
|
||||
#endif
|
||||
|
|
@ -947,14 +945,6 @@ toshiba_rbtx4927_time_init(void)
|
|||
|
||||
}
|
||||
|
||||
void __init toshiba_rbtx4927_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
|
||||
"-\n");
|
||||
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
|
||||
"+\n");
|
||||
}
|
||||
|
||||
static int __init toshiba_rbtx4927_rtc_init(void)
|
||||
{
|
||||
static struct resource __initdata res = {
|
||||
|
|
|
|||
|
|
@ -43,8 +43,3 @@ plat_mem_setup(void)
|
|||
{
|
||||
toshiba_rbtx4938_setup();
|
||||
}
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
setup_irq(TX4938_IRQ_CPU_TIMER, irq);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -48,11 +48,6 @@ void __init plat_time_init(void)
|
|||
mips_hpt_frequency = tclock / 4;
|
||||
}
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
setup_irq(TIMER_IRQ, irq);
|
||||
}
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
vr41xx_calculate_clock_frequency();
|
||||
|
|
|
|||
|
|
@ -141,8 +141,6 @@ extern unsigned int sni_brd_type;
|
|||
#define A20R_PT_TIM0_ACK 0xbc050000
|
||||
#define A20R_PT_TIM1_ACK 0xbc060000
|
||||
|
||||
#define SNI_MIPS_IRQ_CPU_TIMER (MIPS_CPU_IRQ_BASE+7)
|
||||
|
||||
#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE
|
||||
#define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5)
|
||||
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/ptrace.h>
|
||||
#include <linux/rtc.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
extern spinlock_t rtc_lock;
|
||||
|
|
@ -83,4 +84,8 @@ static inline void mips_clockevent_init(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
|
||||
extern void clockevent_set_clock(struct clock_event_device *cd,
|
||||
unsigned int clock);
|
||||
|
||||
#endif /* _ASM_TIME_H */
|
||||
|
|
|
|||
Loading…
Reference in a new issue