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ntb: fix SKX NTB config space size register offsets

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The offsets for the SZ registers are wrong. Updated.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reported-by: Sandeep Mann <sandeep@purestorage.com>
Tested-by: Zachary Ross <zacharyx.ross@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
This commit is contained in:
Dave Jiang 2016-12-13 09:03:13 -07:00 committed by Jon Mason
parent 5c43c52d5f
commit 09e71a6f13
1 changed files with 4 additions and 4 deletions
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8
drivers/ntb/hw/intel/ntb_hw_intel.h
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@ -152,10 +152,10 @@
#define XEON_SPAD_COUNT 16
/* Intel Skylake Xeon hardware */
#define SKX_IMBAR1SZ_OFFSET 0x00d1
#define SKX_IMBAR2SZ_OFFSET 0x00d5
#define SKX_EMBAR1SZ_OFFSET 0x00d3
#define SKX_EMBAR2SZ_OFFSET 0x00d6
#define SKX_IMBAR1SZ_OFFSET 0x00d0
#define SKX_IMBAR2SZ_OFFSET 0x00d1
#define SKX_EMBAR1SZ_OFFSET 0x00d2
#define SKX_EMBAR2SZ_OFFSET 0x00d3
#define SKX_DEVCTRL_OFFSET 0x0098
#define SKX_DEVSTS_OFFSET 0x009a
#define SKX_UNCERRSTS_OFFSET 0x014c