x86, cpu: Make APERF/MPERF a normal table-driven flag
APERF/MPERF can be handled via the table like all the other scattered CPU flags. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: Thomas Renninger <trenn@suse.de> Cc: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <1270065406-1814-4-git-send-email-bp@amd64.org>
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1 changed files with 8 additions and 15 deletions
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@ -30,13 +30,14 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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const struct cpuid_bit *cb;
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static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
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{ X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
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{ X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
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{ X86_FEATURE_CPB, CR_EDX, 9, 0x80000007 },
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{ X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a },
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{ X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a },
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{ X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a },
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{ X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a },
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{ X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
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{ X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
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{ X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006 },
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{ X86_FEATURE_CPB, CR_EDX, 9, 0x80000007 },
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{ X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a },
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{ X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a },
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{ X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a },
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{ X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a },
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{ 0, 0, 0, 0 }
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};
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@ -54,14 +55,6 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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if (regs[cb->reg] & (1 << cb->bit))
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set_cpu_cap(c, cb->feature);
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}
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/*
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* common AMD/Intel features
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*/
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if (c->cpuid_level >= 6) {
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if (cpuid_ecx(6) & 0x1)
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set_cpu_cap(c, X86_FEATURE_APERFMPERF);
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}
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}
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/* leaf 0xb SMT level */
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