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[MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c.

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mips_cpu_irq_init() does clear_c0_status(ST0_IM) first, so
set_c0_status(ST0_IM) isn't necessary.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Yoichi Yuasa 2006-06-20 23:26:30 +09:00 committed by Ralf Baechle
parent 1500b9a0f4
commit 08aecfb9ea
1 changed files with 0 additions and 3 deletions
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3
arch/mips/gt64120/wrppmc/irq.c
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@ -62,9 +62,6 @@ void gt64120_init_pic(void)
void __init arch_init_irq(void)
{
/* enable all CPU interrupt bits. */
set_c0_status(ST0_IM); /* IE bit is still 0 */
/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
mips_cpu_irq_init(0);