Merge branch 'zynq/dt' into next/dt

* zynq/dt: (1054 commits)
  arm: zynq: dt: Set correct L2 ram latencies
  + v3.11-rc5

Conflicts:
	arch/arm/Makefile
This commit is contained in:
Kevin Hilman 2013-08-14 08:14:50 -07:00
commit 080e3da4f4
1462 changed files with 16062 additions and 101826 deletions

1
.gitignore vendored
View file

@ -29,6 +29,7 @@ modules.builtin
*.bz2 *.bz2
*.lzma *.lzma
*.xz *.xz
*.lz4
*.lzo *.lzo
*.patch *.patch
*.gcno *.gcno

View file

@ -0,0 +1,17 @@
What: /sys/module/xen_blkback/parameters/max_buffer_pages
Date: March 2013
KernelVersion: 3.11
Contact: Roger Pau Monné <roger.pau@citrix.com>
Description:
Maximum number of free pages to keep in each block
backend buffer.
What: /sys/module/xen_blkback/parameters/max_persistent_grants
Date: March 2013
KernelVersion: 3.11
Contact: Roger Pau Monné <roger.pau@citrix.com>
Description:
Maximum number of grants to map persistently in
blkback. If the frontend tries to use more than
max_persistent_grants, the LRU kicks in and starts
removing 5% of max_persistent_grants every 100ms.

View file

@ -0,0 +1,10 @@
What: /sys/module/xen_blkfront/parameters/max
Date: June 2013
KernelVersion: 3.11
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Description:
Maximum number of segments that the frontend will negotiate
with the backend for indirect descriptors. The default value
is 32 - higher value means more potential throughput but more
memory usage. The backend picks the minimum of the frontend
and its default backend value.

View file

@ -84,7 +84,7 @@ X!Iinclude/linux/kobject.h
<sect1><title>Kernel utility functions</title> <sect1><title>Kernel utility functions</title>
!Iinclude/linux/kernel.h !Iinclude/linux/kernel.h
!Ekernel/printk.c !Ekernel/printk/printk.c
!Ekernel/panic.c !Ekernel/panic.c
!Ekernel/sys.c !Ekernel/sys.c
!Ekernel/rcupdate.c !Ekernel/rcupdate.c

View file

@ -1,6 +1,6 @@
<?xml version="1.0"?> <?xml version="1.0"?>
<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" <!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.2//EN"
"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" [ "http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd" [
<!ENTITY % media-entities SYSTEM "./media-entities.tmpl"> %media-entities; <!ENTITY % media-entities SYSTEM "./media-entities.tmpl"> %media-entities;
<!ENTITY media-indices SYSTEM "./media-indices.tmpl"> <!ENTITY media-indices SYSTEM "./media-indices.tmpl">

View file

@ -46,29 +46,33 @@ you format your backing devices and cache device at the same time, you won't
have to manually attach: have to manually attach:
make-bcache -B /dev/sda /dev/sdb -C /dev/sdc make-bcache -B /dev/sda /dev/sdb -C /dev/sdc
To make bcache devices known to the kernel, echo them to /sys/fs/bcache/register: bcache-tools now ships udev rules, and bcache devices are known to the kernel
immediately. Without udev, you can manually register devices like this:
echo /dev/sdb > /sys/fs/bcache/register echo /dev/sdb > /sys/fs/bcache/register
echo /dev/sdc > /sys/fs/bcache/register echo /dev/sdc > /sys/fs/bcache/register
To register your bcache devices automatically, you could add something like Registering the backing device makes the bcache device show up in /dev; you can
this to an init script: now format it and use it as normal. But the first time using a new bcache
device, it'll be running in passthrough mode until you attach it to a cache.
See the section on attaching.
echo /dev/sd* > /sys/fs/bcache/register_quiet The devices show up as:
It'll look for bcache superblocks and ignore everything that doesn't have one. /dev/bcache<N>
Registering the backing device makes the bcache show up in /dev; you can now As well as (with udev):
format it and use it as normal. But the first time using a new bcache device,
it'll be running in passthrough mode until you attach it to a cache. See the
section on attaching.
The devices show up at /dev/bcacheN, and can be controlled via sysfs from /dev/bcache/by-uuid/<uuid>
/sys/block/bcacheN/bcache: /dev/bcache/by-label/<label>
To get started:
mkfs.ext4 /dev/bcache0 mkfs.ext4 /dev/bcache0
mount /dev/bcache0 /mnt mount /dev/bcache0 /mnt
You can control bcache devices through sysfs at /sys/block/bcache<N>/bcache .
Cache devices are managed as sets; multiple caches per set isn't supported yet Cache devices are managed as sets; multiple caches per set isn't supported yet
but will allow for mirroring of metadata and dirty data in the future. Your new but will allow for mirroring of metadata and dirty data in the future. Your new
cache set shows up as /sys/fs/bcache/<UUID> cache set shows up as /sys/fs/bcache/<UUID>
@ -80,11 +84,11 @@ must be attached to your cache set to enable caching. Attaching a backing
device to a cache set is done thusly, with the UUID of the cache set in device to a cache set is done thusly, with the UUID of the cache set in
/sys/fs/bcache: /sys/fs/bcache:
echo <UUID> > /sys/block/bcache0/bcache/attach echo <CSET-UUID> > /sys/block/bcache0/bcache/attach
This only has to be done once. The next time you reboot, just reregister all This only has to be done once. The next time you reboot, just reregister all
your bcache devices. If a backing device has data in a cache somewhere, the your bcache devices. If a backing device has data in a cache somewhere, the
/dev/bcache# device won't be created until the cache shows up - particularly /dev/bcache<N> device won't be created until the cache shows up - particularly
important if you have writeback caching turned on. important if you have writeback caching turned on.
If you're booting up and your cache device is gone and never coming back, you If you're booting up and your cache device is gone and never coming back, you
@ -191,6 +195,9 @@ want for getting the best possible numbers when benchmarking.
SYSFS - BACKING DEVICE: SYSFS - BACKING DEVICE:
Available at /sys/block/<bdev>/bcache, /sys/block/bcache*/bcache and
(if attached) /sys/fs/bcache/<cset-uuid>/bdev*
attach attach
Echo the UUID of a cache set to this file to enable caching. Echo the UUID of a cache set to this file to enable caching.
@ -300,6 +307,8 @@ cache_readaheads
SYSFS - CACHE SET: SYSFS - CACHE SET:
Available at /sys/fs/bcache/<cset-uuid>
average_key_size average_key_size
Average data per key in the btree. Average data per key in the btree.
@ -390,6 +399,8 @@ trigger_gc
SYSFS - CACHE DEVICE: SYSFS - CACHE DEVICE:
Available at /sys/block/<cdev>/bcache
block_size block_size
Minimum granularity of writes - should match hardware sector size. Minimum granularity of writes - should match hardware sector size.

View file

@ -267,8 +267,8 @@ Q: If i have some kernel code that needs to be aware of CPU arrival and
A: This is what you would need in your kernel code to receive notifications. A: This is what you would need in your kernel code to receive notifications.
#include <linux/cpu.h> #include <linux/cpu.h>
static int __cpuinit foobar_cpu_callback(struct notifier_block *nfb, static int foobar_cpu_callback(struct notifier_block *nfb,
unsigned long action, void *hcpu) unsigned long action, void *hcpu)
{ {
unsigned int cpu = (unsigned long)hcpu; unsigned int cpu = (unsigned long)hcpu;
@ -285,7 +285,7 @@ A: This is what you would need in your kernel code to receive notifications.
return NOTIFY_OK; return NOTIFY_OK;
} }
static struct notifier_block __cpuinitdata foobar_cpu_notifer = static struct notifier_block foobar_cpu_notifer =
{ {
.notifier_call = foobar_cpu_callback, .notifier_call = foobar_cpu_callback,
}; };

View file

@ -98,6 +98,7 @@ clocks and IDs.
fpm 83 fpm 83
mpll_osc_sel 84 mpll_osc_sel 84
mpll_sel 85 mpll_sel 85
spll_gate 86
Examples: Examples:

View file

@ -4,7 +4,7 @@
Required properties : Required properties :
- reg : Offset and length of the register set for the device - reg : Offset and length of the register set for the device
- compatible : Should be "marvell,mv64xxx-i2c" - compatible : Should be "marvell,mv64xxx-i2c" or "allwinner,sun4i-i2c"
- interrupts : The interrupt number - interrupts : The interrupt number
Optional properties : Optional properties :

View file

@ -31,9 +31,8 @@ Optional nodes:
Optional sub-node properties: Optional sub-node properties:
ti,warm-reset - maintain voltage during warm reset(boolean) ti,warm-reset - maintain voltage during warm reset(boolean)
ti,roof-floor - control voltage selection by pin(boolean) ti,roof-floor - control voltage selection by pin(boolean)
ti,sleep-mode - mode to adopt in pmic sleep 0 - off, 1 - auto, ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto,
2 - eco, 3 - forced pwm 2 - eco, 3 - forced pwm
ti,tstep - slope control 0 - Jump, 1 10mV/us, 2 5mV/us, 3 2.5mV/us
ti,smps-range - OTP has the wrong range set for the hardware so override ti,smps-range - OTP has the wrong range set for the hardware so override
0 - low range, 1 - high range. 0 - low range, 1 - high range.
@ -59,7 +58,6 @@ pmic {
ti,warm-reset; ti,warm-reset;
ti,roof-floor; ti,roof-floor;
ti,mode-sleep = <0>; ti,mode-sleep = <0>;
ti,tstep = <0>;
ti,smps-range = <1>; ti,smps-range = <1>;
}; };

View file

@ -26,6 +26,7 @@ est ESTeem Wireless Modems
fsl Freescale Semiconductor fsl Freescale Semiconductor
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
hisilicon Hisilicon Limited.
hp Hewlett Packard hp Hewlett Packard
ibm International Business Machines (IBM) ibm International Business Machines (IBM)
idt Integrated Device Technologies, Inc. idt Integrated Device Technologies, Inc.
@ -43,6 +44,7 @@ nxp NXP Semiconductors
onnn ON Semiconductor Corp. onnn ON Semiconductor Corp.
picochip Picochip Ltd picochip Picochip Ltd
powervr PowerVR (deprecated, use img) powervr PowerVR (deprecated, use img)
qca Qualcomm Atheros, Inc.
qcom Qualcomm, Inc. qcom Qualcomm, Inc.
ralink Mediatek/Ralink Technology Corp. ralink Mediatek/Ralink Technology Corp.
ramtron Ramtron International ramtron Ramtron International

View file

@ -11,14 +11,14 @@ for non English (read: Japanese) speakers and is not intended as a
fork. So if you have any comments or updates for this file, please try fork. So if you have any comments or updates for this file, please try
to update the original English file first. to update the original English file first.
Last Updated: 2011/03/31 Last Updated: 2013/07/19
================================== ==================================
これは、 これは、
linux-2.6.38/Documentation/HOWTO linux-3.10/Documentation/HOWTO
の和訳です。 の和訳です。
翻訳団体: JF プロジェクト < http://www.linux.or.jp/JF/ > 翻訳団体: JF プロジェクト < http://linuxjf.sourceforge.jp/ >
翻訳日: 2011/3/28 翻訳日: 2013/7/19
翻訳者: Tsugikazu Shibata <tshibata at ab dot jp dot nec dot com> 翻訳者: Tsugikazu Shibata <tshibata at ab dot jp dot nec dot com>
校正者: 松倉さん <nbh--mats at nifty dot com> 校正者: 松倉さん <nbh--mats at nifty dot com>
小林 雅典さん (Masanori Kobayasi) <zap03216 at nifty dot ne dot jp> 小林 雅典さん (Masanori Kobayasi) <zap03216 at nifty dot ne dot jp>
@ -245,7 +245,7 @@ Linux カーネルソースツリーの中に含まれる、きれいにし、
自己参照方式で、索引がついた web 形式で、ソースコードを参照することが 自己参照方式で、索引がついた web 形式で、ソースコードを参照することが
できます。この最新の素晴しいカーネルコードのリポジトリは以下で見つかり できます。この最新の素晴しいカーネルコードのリポジトリは以下で見つかり
ます- ます-
http://sosdg.org/~qiyong/lxr/ http://lxr.linux.no/+trees
開発プロセス 開発プロセス
----------------------- -----------------------
@ -253,24 +253,24 @@ Linux カーネルソースツリーの中に含まれる、きれいにし、
Linux カーネルの開発プロセスは現在幾つかの異なるメインカーネル「ブラン Linux カーネルの開発プロセスは現在幾つかの異なるメインカーネル「ブラン
チ」と多数のサブシステム毎のカーネルブランチから構成されます。 チ」と多数のサブシステム毎のカーネルブランチから構成されます。
これらのブランチとは- これらのブランチとは-
- メインの 2.6.x カーネルツリー - メインの 3.x カーネルツリー
- 2.6.x.y -stable カーネルツリー - 3.x.y -stable カーネルツリー
- 2.6.x -git カーネルパッチ - 3.x -git カーネルパッチ
- サブシステム毎のカーネルツリーとパッチ - サブシステム毎のカーネルツリーとパッチ
- 統合テストのための 2.6.x -next カーネルツリー - 統合テストのための 3.x -next カーネルツリー
2.6.x カーネルツリー 3.x カーネルツリー
----------------- -----------------
2.6.x カーネルは Linus Torvalds によってメンテナンスされ、kernel.org 3.x カーネルは Linus Torvalds によってメンテナンスされ、kernel.org
の pub/linux/kernel/v2.6/ ディレクトリに存在します。この開発プロセスは の pub/linux/kernel/v3.x/ ディレクトリに存在します。この開発プロセスは
以下のとおり- 以下のとおり-
- 新しいカーネルがリリースされた直後に、2週間の特別期間が設けられ、 - 新しいカーネルがリリースされた直後に、2週間の特別期間が設けられ、
この期間中に、メンテナ達は Linus に大きな差分を送ることができます。 この期間中に、メンテナ達は Linus に大きな差分を送ることができます。
このような差分は通常 -next カーネルに数週間含まれてきたパッチです。 このような差分は通常 -next カーネルに数週間含まれてきたパッチです。
大きな変更は git(カーネルのソース管理ツール、詳細は 大きな変更は git(カーネルのソース管理ツール、詳細は
http://git-scm.com/ 参照) を使って送るのが好ましいやり方ですが、パッ http://git-scm.com/ 参照) を使って送るのが好ましいやり方ですが、パッ
チファイルの形式のまま送るのでも十分です。 チファイルの形式のまま送るのでも十分です。
- 2週間後、-rc1 カーネルがリリースされ、この後にはカーネル全体の安定 - 2週間後、-rc1 カーネルがリリースされ、この後にはカーネル全体の安定
@ -302,20 +302,20 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
実に認識されたバグの状況によりリリースされるのであり、前もって決めら 実に認識されたバグの状況によりリリースされるのであり、前もって決めら
れた計画によってリリースされるものではないからです。」 れた計画によってリリースされるものではないからです。」
2.6.x.y -stable カーネルツリー 3.x.y -stable カーネルツリー
--------------------------- ---------------------------
バージョン番号が4つの数字に分かれているカーネルは -stable カーネルです。 バージョン番号が3つの数字に分かれているカーネルは -stable カーネルです。
これには、2.6.x カーネルで見つかったセキュリティ問題や重大な後戻りに対 これには、3.x カーネルで見つかったセキュリティ問題や重大な後戻りに対
する比較的小さい重要な修正が含まれます。 する比較的小さい重要な修正が含まれます。
これは、開発/実験的バージョンのテストに協力することに興味が無く、 これは、開発/実験的バージョンのテストに協力することに興味が無く、
最新の安定したカーネルを使いたいユーザに推奨するブランチです。 最新の安定したカーネルを使いたいユーザに推奨するブランチです。
もし、2.6.x.y カーネルが存在しない場合には、番号が一番大きい 2.6.x が もし、3.x.y カーネルが存在しない場合には、番号が一番大きい 3.x が
最新の安定版カーネルです。 最新の安定版カーネルです。
2.6.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必 3.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必
要に応じてリリースされます。通常のリリース期間は 2週間毎ですが、差し迫っ 要に応じてリリースされます。通常のリリース期間は 2週間毎ですが、差し迫っ
た問題がなければもう少し長くなることもあります。セキュリティ関連の問題 た問題がなければもう少し長くなることもあります。セキュリティ関連の問題
の場合はこれに対してだいたいの場合、すぐにリリースがされます。 の場合はこれに対してだいたいの場合、すぐにリリースがされます。
@ -324,7 +324,7 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
イルにはどのような種類の変更が -stable ツリーに受け入れ可能か、またリ イルにはどのような種類の変更が -stable ツリーに受け入れ可能か、またリ
リースプロセスがどう動くかが記述されています。 リースプロセスがどう動くかが記述されています。
2.6.x -git パッチ 3.x -git パッチ
------------------ ------------------
git リポジトリで管理されているLinus のカーネルツリーの毎日のスナップ git リポジトリで管理されているLinus のカーネルツリーの毎日のスナップ
@ -358,14 +358,14 @@ quilt シリーズとして公開されているパッチキューも使われ
をつけることができます。大部分のこれらの patchwork のサイトは をつけることができます。大部分のこれらの patchwork のサイトは
http://patchwork.kernel.org/ でリストされています。 http://patchwork.kernel.org/ でリストされています。
統合テストのための 2.6.x -next カーネルツリー 統合テストのための 3.x -next カーネルツリー
--------------------------------------------- ---------------------------------------------
サブシステムツリーの更新内容がメインラインの 2.6.x ツリーにマージされ サブシステムツリーの更新内容がメインラインの 3.x ツリーにマージされ
る前に、それらは統合テストされる必要があります。この目的のため、実質的 る前に、それらは統合テストされる必要があります。この目的のため、実質的
に全サブシステムツリーからほぼ毎日プルされてできる特別なテスト用のリ に全サブシステムツリーからほぼ毎日プルされてできる特別なテスト用のリ
ポジトリが存在します- ポジトリが存在します-
http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git
http://linux.f-seidel.de/linux-next/pmwiki/ http://linux.f-seidel.de/linux-next/pmwiki/
このやり方によって、-next カーネルは次のマージ機会でどんなものがメイン このやり方によって、-next カーネルは次のマージ機会でどんなものがメイン

View file

@ -52,7 +52,7 @@ Default: 64
busy_read busy_read
---------------- ----------------
Low latency busy poll timeout for socket reads. (needs CONFIG_NET_LL_RX_POLL) Low latency busy poll timeout for socket reads. (needs CONFIG_NET_RX_BUSY_POLL)
Approximate time in us to busy loop waiting for packets on the device queue. Approximate time in us to busy loop waiting for packets on the device queue.
This sets the default value of the SO_BUSY_POLL socket option. This sets the default value of the SO_BUSY_POLL socket option.
Can be set or overridden per socket by setting socket option SO_BUSY_POLL, Can be set or overridden per socket by setting socket option SO_BUSY_POLL,
@ -63,7 +63,7 @@ Default: 0 (off)
busy_poll busy_poll
---------------- ----------------
Low latency busy poll timeout for poll and select. (needs CONFIG_NET_LL_RX_POLL) Low latency busy poll timeout for poll and select. (needs CONFIG_NET_RX_BUSY_POLL)
Approximate time in us to busy loop waiting for events. Approximate time in us to busy loop waiting for events.
Recommended value depends on the number of sockets you poll on. Recommended value depends on the number of sockets you poll on.
For several sockets 50, for several hundreds 100. For several sockets 50, for several hundreds 100.

View file

@ -965,6 +965,12 @@ M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE
M: Santosh Shilimkar <santosh.shilimkar@ti.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-keystone/
ARM/LOGICPD PXA270 MACHINE SUPPORT ARM/LOGICPD PXA270 MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org> M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -1259,7 +1265,6 @@ F: drivers/rtc/rtc-coh901331.c
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
ARM/Ux500 ARM ARCHITECTURE ARM/Ux500 ARM ARCHITECTURE
M: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
M: Linus Walleij <linus.walleij@linaro.org> M: Linus Walleij <linus.walleij@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
@ -1406,7 +1411,7 @@ ATHEROS ATH6KL WIRELESS DRIVER
M: Kalle Valo <kvalo@qca.qualcomm.com> M: Kalle Valo <kvalo@qca.qualcomm.com>
L: linux-wireless@vger.kernel.org L: linux-wireless@vger.kernel.org
W: http://wireless.kernel.org/en/users/Drivers/ath6kl W: http://wireless.kernel.org/en/users/Drivers/ath6kl
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath6kl.git T: git git://github.com/kvalo/ath.git
S: Supported S: Supported
F: drivers/net/wireless/ath/ath6kl/ F: drivers/net/wireless/ath/ath6kl/
@ -1642,7 +1647,7 @@ S: Maintained
F: drivers/net/hamradio/baycom* F: drivers/net/hamradio/baycom*
BCACHE (BLOCK LAYER CACHE) BCACHE (BLOCK LAYER CACHE)
M: Kent Overstreet <koverstreet@google.com> M: Kent Overstreet <kmo@daterainc.com>
L: linux-bcache@vger.kernel.org L: linux-bcache@vger.kernel.org
W: http://bcache.evilpiepirate.org W: http://bcache.evilpiepirate.org
S: Maintained: S: Maintained:
@ -2871,7 +2876,7 @@ F: drivers/media/usb/dvb-usb-v2/dvb_usb*
F: drivers/media/usb/dvb-usb-v2/usb_urb.c F: drivers/media/usb/dvb-usb-v2/usb_urb.c
DYNAMIC DEBUG DYNAMIC DEBUG
M: Jason Baron <jbaron@redhat.com> M: Jason Baron <jbaron@akamai.com>
S: Maintained S: Maintained
F: lib/dynamic_debug.c F: lib/dynamic_debug.c
F: include/linux/dynamic_debug.h F: include/linux/dynamic_debug.h
@ -3346,7 +3351,7 @@ F: Documentation/firmware_class/
F: drivers/base/firmware*.c F: drivers/base/firmware*.c
F: include/linux/firmware.h F: include/linux/firmware.h
FLASHSYSTEM DRIVER (IBM FlashSystem 70/80 PCI SSD Flash Card) FLASH ADAPTER DRIVER (IBM Flash Adapter 900GB Full Height PCI Flash Card)
M: Joshua Morris <josh.h.morris@us.ibm.com> M: Joshua Morris <josh.h.morris@us.ibm.com>
M: Philip Kelleher <pjk1939@linux.vnet.ibm.com> M: Philip Kelleher <pjk1939@linux.vnet.ibm.com>
S: Maintained S: Maintained
@ -3622,11 +3627,9 @@ F: drivers/isdn/gigaset/
F: include/uapi/linux/gigaset_dev.h F: include/uapi/linux/gigaset_dev.h
GPIO SUBSYSTEM GPIO SUBSYSTEM
M: Grant Likely <grant.likely@linaro.org>
M: Linus Walleij <linus.walleij@linaro.org> M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained S: Maintained
L: linux-gpio@vger.kernel.org L: linux-gpio@vger.kernel.org
T: git git://git.secretlab.ca/git/linux-2.6.git
F: Documentation/gpio.txt F: Documentation/gpio.txt
F: drivers/gpio/ F: drivers/gpio/
F: include/linux/gpio* F: include/linux/gpio*
@ -4472,8 +4475,6 @@ F: drivers/irqchip/
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
M: Benjamin Herrenschmidt <benh@kernel.crashing.org> M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
M: Grant Likely <grant.likely@linaro.org>
T: git git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
S: Maintained S: Maintained
F: Documentation/IRQ-domain.txt F: Documentation/IRQ-domain.txt
F: include/linux/irqdomain.h F: include/linux/irqdomain.h
@ -4990,7 +4991,7 @@ F: arch/powerpc/platforms/44x/
LINUX FOR POWERPC EMBEDDED XILINX VIRTEX LINUX FOR POWERPC EMBEDDED XILINX VIRTEX
L: linuxppc-dev@lists.ozlabs.org L: linuxppc-dev@lists.ozlabs.org
S: Unmaintained S: Orphan
F: arch/powerpc/*/*virtex* F: arch/powerpc/*/*virtex*
F: arch/powerpc/*/*/*virtex* F: arch/powerpc/*/*/*virtex*
@ -5886,7 +5887,7 @@ OMAP DEVICE TREE SUPPORT
M: Benoît Cousson <b-cousson@ti.com> M: Benoît Cousson <b-cousson@ti.com>
M: Tony Lindgren <tony@atomide.com> M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org L: linux-omap@vger.kernel.org
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers) L: devicetree@vger.kernel.org
S: Maintained S: Maintained
F: arch/arm/boot/dts/*omap* F: arch/arm/boot/dts/*omap*
F: arch/arm/boot/dts/*am3* F: arch/arm/boot/dts/*am3*
@ -6050,17 +6051,28 @@ F: drivers/i2c/busses/i2c-ocores.c
OPEN FIRMWARE AND FLATTENED DEVICE TREE OPEN FIRMWARE AND FLATTENED DEVICE TREE
M: Grant Likely <grant.likely@linaro.org> M: Grant Likely <grant.likely@linaro.org>
M: Rob Herring <rob.herring@calxeda.com> M: Rob Herring <rob.herring@calxeda.com>
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers) L: devicetree@vger.kernel.org
W: http://fdt.secretlab.ca W: http://fdt.secretlab.ca
T: git git://git.secretlab.ca/git/linux-2.6.git T: git git://git.secretlab.ca/git/linux-2.6.git
S: Maintained S: Maintained
F: Documentation/devicetree F: drivers/of/
F: drivers/of
F: include/linux/of*.h F: include/linux/of*.h
F: scripts/dtc F: scripts/dtc/
K: of_get_property K: of_get_property
K: of_match_table K: of_match_table
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
M: Rob Herring <rob.herring@calxeda.com>
M: Pawel Moll <pawel.moll@arm.com>
M: Mark Rutland <mark.rutland@arm.com>
M: Stephen Warren <swarren@wwwdotorg.org>
M: Ian Campbell <ian.campbell@citrix.com>
L: devicetree@vger.kernel.org
S: Maintained
F: Documentation/devicetree/
F: arch/*/boot/dts/
F: include/dt-bindings/
OPENRISC ARCHITECTURE OPENRISC ARCHITECTURE
M: Jonas Bonn <jonas@southpole.se> M: Jonas Bonn <jonas@southpole.se>
W: http://openrisc.net W: http://openrisc.net
@ -6719,6 +6731,14 @@ T: git git://linuxtv.org/anttip/media_tree.git
S: Maintained S: Maintained
F: drivers/media/tuners/qt1010* F: drivers/media/tuners/qt1010*
QUALCOMM ATHEROS ATH10K WIRELESS DRIVER
M: Kalle Valo <kvalo@qca.qualcomm.com>
L: ath10k@lists.infradead.org
W: http://wireless.kernel.org/en/users/Drivers/ath10k
T: git git://github.com/kvalo/ath.git
S: Supported
F: drivers/net/wireless/ath/ath10k/
QUALCOMM HEXAGON ARCHITECTURE QUALCOMM HEXAGON ARCHITECTURE
M: Richard Kuo <rkuo@codeaurora.org> M: Richard Kuo <rkuo@codeaurora.org>
L: linux-hexagon@vger.kernel.org L: linux-hexagon@vger.kernel.org
@ -7746,7 +7766,6 @@ F: drivers/clk/spear/
SPI SUBSYSTEM SPI SUBSYSTEM
M: Mark Brown <broonie@kernel.org> M: Mark Brown <broonie@kernel.org>
M: Grant Likely <grant.likely@linaro.org>
L: linux-spi@vger.kernel.org L: linux-spi@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
Q: http://patchwork.kernel.org/project/spi-devel-general/list/ Q: http://patchwork.kernel.org/project/spi-devel-general/list/
@ -7812,7 +7831,7 @@ F: drivers/staging/asus_oled/
STAGING - COMEDI STAGING - COMEDI
M: Ian Abbott <abbotti@mev.co.uk> M: Ian Abbott <abbotti@mev.co.uk>
M: Mori Hess <fmhess@users.sourceforge.net> M: H Hartley Sweeten <hsweeten@visionengravers.com>
S: Odd Fixes S: Odd Fixes
F: drivers/staging/comedi/ F: drivers/staging/comedi/
@ -8264,7 +8283,7 @@ S: Maintained
F: sound/soc/codecs/twl4030* F: sound/soc/codecs/twl4030*
TI WILINK WIRELESS DRIVERS TI WILINK WIRELESS DRIVERS
M: Luciano Coelho <coelho@ti.com> M: Luciano Coelho <luca@coelho.fi>
L: linux-wireless@vger.kernel.org L: linux-wireless@vger.kernel.org
W: http://wireless.kernel.org/en/users/Drivers/wl12xx W: http://wireless.kernel.org/en/users/Drivers/wl12xx
W: http://wireless.kernel.org/en/users/Drivers/wl1251 W: http://wireless.kernel.org/en/users/Drivers/wl1251
@ -8650,6 +8669,11 @@ T: git git://git.alsa-project.org/alsa-kernel.git
S: Maintained S: Maintained
F: sound/usb/midi.* F: sound/usb/midi.*
USB NETWORKING DRIVERS
L: linux-usb@vger.kernel.org
S: Odd Fixes
F: drivers/net/usb/
USB OHCI DRIVER USB OHCI DRIVER
M: Alan Stern <stern@rowland.harvard.edu> M: Alan Stern <stern@rowland.harvard.edu>
L: linux-usb@vger.kernel.org L: linux-usb@vger.kernel.org
@ -9288,7 +9312,7 @@ S: Maintained
F: drivers/net/ethernet/xilinx/xilinx_axienet* F: drivers/net/ethernet/xilinx/xilinx_axienet*
XILINX SYSTEMACE DRIVER XILINX SYSTEMACE DRIVER
S: Unmaintained S: Orphan
F: drivers/block/xsysace.c F: drivers/block/xsysace.c
XILINX UARTLITE SERIAL DRIVER XILINX UARTLITE SERIAL DRIVER

View file

@ -1,7 +1,7 @@
VERSION = 3 VERSION = 3
PATCHLEVEL = 11 PATCHLEVEL = 11
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc1 EXTRAVERSION = -rc5
NAME = Linux for Workgroups NAME = Linux for Workgroups
# *DOCUMENTATION* # *DOCUMENTATION*

View file

@ -15,6 +15,7 @@ config ALPHA
select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_OPTIONAL_GPIOLIB
select ARCH_WANT_IPC_PARSE_VERSION select ARCH_WANT_IPC_PARSE_VERSION
select ARCH_HAVE_NMI_SAFE_CMPXCHG select ARCH_HAVE_NMI_SAFE_CMPXCHG
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select GENERIC_SMP_IDLE_THREAD select GENERIC_SMP_IDLE_THREAD
select GENERIC_CMOS_UPDATE select GENERIC_CMOS_UPDATE
select GENERIC_STRNCPY_FROM_USER select GENERIC_STRNCPY_FROM_USER

View file

@ -186,17 +186,24 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
*/ */
static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
{ {
int c, old; int c, new, old;
c = atomic_read(v); smp_mb();
for (;;) { __asm__ __volatile__(
if (unlikely(c == (u))) "1: ldl_l %[old],%[mem]\n"
break; " cmpeq %[old],%[u],%[c]\n"
old = atomic_cmpxchg((v), c, c + (a)); " addl %[old],%[a],%[new]\n"
if (likely(old == c)) " bne %[c],2f\n"
break; " stl_c %[new],%[mem]\n"
c = old; " beq %[new],3f\n"
} "2:\n"
return c; ".subsection 2\n"
"3: br 1b\n"
".previous"
: [old] "=&r"(old), [new] "=&r"(new), [c] "=&r"(c)
: [mem] "m"(*v), [a] "rI"(a), [u] "rI"((long)u)
: "memory");
smp_mb();
return old;
} }
@ -207,21 +214,56 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
* @u: ...unless v is equal to u. * @u: ...unless v is equal to u.
* *
* Atomically adds @a to @v, so long as it was not @u. * Atomically adds @a to @v, so long as it was not @u.
* Returns the old value of @v. * Returns true iff @v was not @u.
*/ */
static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
{ {
long c, old; long c, tmp;
c = atomic64_read(v); smp_mb();
for (;;) { __asm__ __volatile__(
if (unlikely(c == (u))) "1: ldq_l %[tmp],%[mem]\n"
break; " cmpeq %[tmp],%[u],%[c]\n"
old = atomic64_cmpxchg((v), c, c + (a)); " addq %[tmp],%[a],%[tmp]\n"
if (likely(old == c)) " bne %[c],2f\n"
break; " stq_c %[tmp],%[mem]\n"
c = old; " beq %[tmp],3f\n"
} "2:\n"
return c != (u); ".subsection 2\n"
"3: br 1b\n"
".previous"
: [tmp] "=&r"(tmp), [c] "=&r"(c)
: [mem] "m"(*v), [a] "rI"(a), [u] "rI"(u)
: "memory");
smp_mb();
return !c;
}
/*
* atomic64_dec_if_positive - decrement by 1 if old value positive
* @v: pointer of type atomic_t
*
* The function returns the old value of *v minus 1, even if
* the atomic variable, v, was not decremented.
*/
static inline long atomic64_dec_if_positive(atomic64_t *v)
{
long old, tmp;
smp_mb();
__asm__ __volatile__(
"1: ldq_l %[old],%[mem]\n"
" subq %[old],1,%[tmp]\n"
" ble %[old],2f\n"
" stq_c %[tmp],%[mem]\n"
" beq %[tmp],3f\n"
"2:\n"
".subsection 2\n"
"3: br 1b\n"
".previous"
: [old] "=&r"(old), [tmp] "=&r"(tmp)
: [mem] "m"(*v)
: "memory");
smp_mb();
return old - 1;
} }
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)

View file

@ -3,7 +3,9 @@
#include <uapi/asm/param.h> #include <uapi/asm/param.h>
#define HZ CONFIG_HZ # undef HZ
#define USER_HZ HZ # define HZ CONFIG_HZ
# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */ # define USER_HZ 1024
# define CLOCKS_PER_SEC USER_HZ /* frequency at which times() counts */
#endif /* _ASM_ALPHA_PARAM_H */ #endif /* _ASM_ALPHA_PARAM_H */

View file

@ -168,8 +168,4 @@ static inline void arch_write_unlock(arch_rwlock_t * lock)
#define arch_read_lock_flags(lock, flags) arch_read_lock(lock) #define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
#define arch_write_lock_flags(lock, flags) arch_write_lock(lock) #define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
#define arch_spin_relax(lock) cpu_relax()
#define arch_read_relax(lock) cpu_relax()
#define arch_write_relax(lock) cpu_relax()
#endif /* _ALPHA_SPINLOCK_H */ #endif /* _ALPHA_SPINLOCK_H */

View file

@ -3,8 +3,7 @@
#include <uapi/asm/unistd.h> #include <uapi/asm/unistd.h>
#define NR_SYSCALLS 508
#define NR_SYSCALLS 506
#define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_READDIR
#define __ARCH_WANT_STAT64 #define __ARCH_WANT_STAT64

View file

@ -1,13 +1,7 @@
#ifndef _UAPI_ASM_ALPHA_PARAM_H #ifndef _UAPI_ASM_ALPHA_PARAM_H
#define _UAPI_ASM_ALPHA_PARAM_H #define _UAPI_ASM_ALPHA_PARAM_H
/* ??? Gross. I don't want to parameterize this, and supposedly the
hardware ignores reprogramming. We also need userland buy-in to the
change in HZ, since this is visible in the wait4 resources etc. */
#ifndef __KERNEL__
#define HZ 1024 #define HZ 1024
#endif
#define EXEC_PAGESIZE 8192 #define EXEC_PAGESIZE 8192
@ -17,5 +11,4 @@
#define MAXHOSTNAMELEN 64 /* max length of hostname */ #define MAXHOSTNAMELEN 64 /* max length of hostname */
#endif /* _UAPI_ASM_ALPHA_PARAM_H */ #endif /* _UAPI_ASM_ALPHA_PARAM_H */

View file

@ -467,5 +467,7 @@
#define __NR_sendmmsg 503 #define __NR_sendmmsg 503
#define __NR_process_vm_readv 504 #define __NR_process_vm_readv 504
#define __NR_process_vm_writev 505 #define __NR_process_vm_writev 505
#define __NR_kcmp 506
#define __NR_finit_module 507
#endif /* _UAPI_ALPHA_UNISTD_H */ #endif /* _UAPI_ALPHA_UNISTD_H */

View file

@ -12,11 +12,32 @@
.text .text
.set noat .set noat
.cfi_sections .debug_frame
/* Stack offsets. */ /* Stack offsets. */
#define SP_OFF 184 #define SP_OFF 184
#define SWITCH_STACK_SIZE 320 #define SWITCH_STACK_SIZE 320
.macro CFI_START_OSF_FRAME func
.align 4
.globl \func
.type \func,@function
\func:
.cfi_startproc simple
.cfi_return_column 64
.cfi_def_cfa $sp, 48
.cfi_rel_offset 64, 8
.cfi_rel_offset $gp, 16
.cfi_rel_offset $16, 24
.cfi_rel_offset $17, 32
.cfi_rel_offset $18, 40
.endm
.macro CFI_END_OSF_FRAME func
.cfi_endproc
.size \func, . - \func
.endm
/* /*
* This defines the normal kernel pt-regs layout. * This defines the normal kernel pt-regs layout.
* *
@ -27,100 +48,158 @@
* the palcode-provided values are available to the signal handler. * the palcode-provided values are available to the signal handler.
*/ */
#define SAVE_ALL \ .macro SAVE_ALL
subq $sp, SP_OFF, $sp; \ subq $sp, SP_OFF, $sp
stq $0, 0($sp); \ .cfi_adjust_cfa_offset SP_OFF
stq $1, 8($sp); \ stq $0, 0($sp)
stq $2, 16($sp); \ stq $1, 8($sp)
stq $3, 24($sp); \ stq $2, 16($sp)
stq $4, 32($sp); \ stq $3, 24($sp)
stq $28, 144($sp); \ stq $4, 32($sp)
lda $2, alpha_mv; \ stq $28, 144($sp)
stq $5, 40($sp); \ .cfi_rel_offset $0, 0
stq $6, 48($sp); \ .cfi_rel_offset $1, 8
stq $7, 56($sp); \ .cfi_rel_offset $2, 16
stq $8, 64($sp); \ .cfi_rel_offset $3, 24
stq $19, 72($sp); \ .cfi_rel_offset $4, 32
stq $20, 80($sp); \ .cfi_rel_offset $28, 144
stq $21, 88($sp); \ lda $2, alpha_mv
ldq $2, HAE_CACHE($2); \ stq $5, 40($sp)
stq $22, 96($sp); \ stq $6, 48($sp)
stq $23, 104($sp); \ stq $7, 56($sp)
stq $24, 112($sp); \ stq $8, 64($sp)
stq $25, 120($sp); \ stq $19, 72($sp)
stq $26, 128($sp); \ stq $20, 80($sp)
stq $27, 136($sp); \ stq $21, 88($sp)
stq $2, 152($sp); \ ldq $2, HAE_CACHE($2)
stq $16, 160($sp); \ stq $22, 96($sp)
stq $17, 168($sp); \ stq $23, 104($sp)
stq $24, 112($sp)
stq $25, 120($sp)
stq $26, 128($sp)
stq $27, 136($sp)
stq $2, 152($sp)
stq $16, 160($sp)
stq $17, 168($sp)
stq $18, 176($sp) stq $18, 176($sp)
.cfi_rel_offset $5, 40
.cfi_rel_offset $6, 48
.cfi_rel_offset $7, 56
.cfi_rel_offset $8, 64
.cfi_rel_offset $19, 72
.cfi_rel_offset $20, 80
.cfi_rel_offset $21, 88
.cfi_rel_offset $22, 96
.cfi_rel_offset $23, 104
.cfi_rel_offset $24, 112
.cfi_rel_offset $25, 120
.cfi_rel_offset $26, 128
.cfi_rel_offset $27, 136
.endm
#define RESTORE_ALL \ .macro RESTORE_ALL
lda $19, alpha_mv; \ lda $19, alpha_mv
ldq $0, 0($sp); \ ldq $0, 0($sp)
ldq $1, 8($sp); \ ldq $1, 8($sp)
ldq $2, 16($sp); \ ldq $2, 16($sp)
ldq $3, 24($sp); \ ldq $3, 24($sp)
ldq $21, 152($sp); \ ldq $21, 152($sp)
ldq $20, HAE_CACHE($19); \ ldq $20, HAE_CACHE($19)
ldq $4, 32($sp); \ ldq $4, 32($sp)
ldq $5, 40($sp); \ ldq $5, 40($sp)
ldq $6, 48($sp); \ ldq $6, 48($sp)
ldq $7, 56($sp); \ ldq $7, 56($sp)
subq $20, $21, $20; \ subq $20, $21, $20
ldq $8, 64($sp); \ ldq $8, 64($sp)
beq $20, 99f; \ beq $20, 99f
ldq $20, HAE_REG($19); \ ldq $20, HAE_REG($19)
stq $21, HAE_CACHE($19); \ stq $21, HAE_CACHE($19)
stq $21, 0($20); \ stq $21, 0($20)
99:; \ 99: ldq $19, 72($sp)
ldq $19, 72($sp); \ ldq $20, 80($sp)
ldq $20, 80($sp); \ ldq $21, 88($sp)
ldq $21, 88($sp); \ ldq $22, 96($sp)
ldq $22, 96($sp); \ ldq $23, 104($sp)
ldq $23, 104($sp); \ ldq $24, 112($sp)
ldq $24, 112($sp); \ ldq $25, 120($sp)
ldq $25, 120($sp); \ ldq $26, 128($sp)
ldq $26, 128($sp); \ ldq $27, 136($sp)
ldq $27, 136($sp); \ ldq $28, 144($sp)
ldq $28, 144($sp); \
addq $sp, SP_OFF, $sp addq $sp, SP_OFF, $sp
.cfi_restore $0
.cfi_restore $1
.cfi_restore $2
.cfi_restore $3
.cfi_restore $4
.cfi_restore $5
.cfi_restore $6
.cfi_restore $7
.cfi_restore $8
.cfi_restore $19
.cfi_restore $20
.cfi_restore $21
.cfi_restore $22
.cfi_restore $23
.cfi_restore $24
.cfi_restore $25
.cfi_restore $26
.cfi_restore $27
.cfi_restore $28
.cfi_adjust_cfa_offset -SP_OFF
.endm
.macro DO_SWITCH_STACK
bsr $1, do_switch_stack
.cfi_adjust_cfa_offset SWITCH_STACK_SIZE
.cfi_rel_offset $9, 0
.cfi_rel_offset $10, 8
.cfi_rel_offset $11, 16
.cfi_rel_offset $12, 24
.cfi_rel_offset $13, 32
.cfi_rel_offset $14, 40
.cfi_rel_offset $15, 48
/* We don't really care about the FP registers for debugging. */
.endm
.macro UNDO_SWITCH_STACK
bsr $1, undo_switch_stack
.cfi_restore $9
.cfi_restore $10
.cfi_restore $11
.cfi_restore $12
.cfi_restore $13
.cfi_restore $14
.cfi_restore $15
.cfi_adjust_cfa_offset -SWITCH_STACK_SIZE
.endm
/* /*
* Non-syscall kernel entry points. * Non-syscall kernel entry points.
*/ */
.align 4 CFI_START_OSF_FRAME entInt
.globl entInt
.ent entInt
entInt:
SAVE_ALL SAVE_ALL
lda $8, 0x3fff lda $8, 0x3fff
lda $26, ret_from_sys_call lda $26, ret_from_sys_call
bic $sp, $8, $8 bic $sp, $8, $8
mov $sp, $19 mov $sp, $19
jsr $31, do_entInt jsr $31, do_entInt
.end entInt CFI_END_OSF_FRAME entInt
.align 4 CFI_START_OSF_FRAME entArith
.globl entArith
.ent entArith
entArith:
SAVE_ALL SAVE_ALL
lda $8, 0x3fff lda $8, 0x3fff
lda $26, ret_from_sys_call lda $26, ret_from_sys_call
bic $sp, $8, $8 bic $sp, $8, $8
mov $sp, $18 mov $sp, $18
jsr $31, do_entArith jsr $31, do_entArith
.end entArith CFI_END_OSF_FRAME entArith
.align 4 CFI_START_OSF_FRAME entMM
.globl entMM
.ent entMM
entMM:
SAVE_ALL SAVE_ALL
/* save $9 - $15 so the inline exception code can manipulate them. */ /* save $9 - $15 so the inline exception code can manipulate them. */
subq $sp, 56, $sp subq $sp, 56, $sp
.cfi_adjust_cfa_offset 56
stq $9, 0($sp) stq $9, 0($sp)
stq $10, 8($sp) stq $10, 8($sp)
stq $11, 16($sp) stq $11, 16($sp)
@ -128,6 +207,13 @@ entMM:
stq $13, 32($sp) stq $13, 32($sp)
stq $14, 40($sp) stq $14, 40($sp)
stq $15, 48($sp) stq $15, 48($sp)
.cfi_rel_offset $9, 0
.cfi_rel_offset $10, 8
.cfi_rel_offset $11, 16
.cfi_rel_offset $12, 24
.cfi_rel_offset $13, 32
.cfi_rel_offset $14, 40
.cfi_rel_offset $15, 48
addq $sp, 56, $19 addq $sp, 56, $19
/* handle the fault */ /* handle the fault */
lda $8, 0x3fff lda $8, 0x3fff
@ -142,28 +228,33 @@ entMM:
ldq $14, 40($sp) ldq $14, 40($sp)
ldq $15, 48($sp) ldq $15, 48($sp)
addq $sp, 56, $sp addq $sp, 56, $sp
.cfi_restore $9
.cfi_restore $10
.cfi_restore $11
.cfi_restore $12
.cfi_restore $13
.cfi_restore $14
.cfi_restore $15
.cfi_adjust_cfa_offset -56
/* finish up the syscall as normal. */ /* finish up the syscall as normal. */
br ret_from_sys_call br ret_from_sys_call
.end entMM CFI_END_OSF_FRAME entMM
.align 4 CFI_START_OSF_FRAME entIF
.globl entIF
.ent entIF
entIF:
SAVE_ALL SAVE_ALL
lda $8, 0x3fff lda $8, 0x3fff
lda $26, ret_from_sys_call lda $26, ret_from_sys_call
bic $sp, $8, $8 bic $sp, $8, $8
mov $sp, $17 mov $sp, $17
jsr $31, do_entIF jsr $31, do_entIF
.end entIF CFI_END_OSF_FRAME entIF
.align 4 CFI_START_OSF_FRAME entUna
.globl entUna
.ent entUna
entUna:
lda $sp, -256($sp) lda $sp, -256($sp)
.cfi_adjust_cfa_offset 256
stq $0, 0($sp) stq $0, 0($sp)
.cfi_rel_offset $0, 0
.cfi_remember_state
ldq $0, 256($sp) /* get PS */ ldq $0, 256($sp) /* get PS */
stq $1, 8($sp) stq $1, 8($sp)
stq $2, 16($sp) stq $2, 16($sp)
@ -195,6 +286,32 @@ entUna:
stq $28, 224($sp) stq $28, 224($sp)
mov $sp, $19 mov $sp, $19
stq $gp, 232($sp) stq $gp, 232($sp)
.cfi_rel_offset $1, 1*8
.cfi_rel_offset $2, 2*8
.cfi_rel_offset $3, 3*8
.cfi_rel_offset $4, 4*8
.cfi_rel_offset $5, 5*8
.cfi_rel_offset $6, 6*8
.cfi_rel_offset $7, 7*8
.cfi_rel_offset $8, 8*8
.cfi_rel_offset $9, 9*8
.cfi_rel_offset $10, 10*8
.cfi_rel_offset $11, 11*8
.cfi_rel_offset $12, 12*8
.cfi_rel_offset $13, 13*8
.cfi_rel_offset $14, 14*8
.cfi_rel_offset $15, 15*8
.cfi_rel_offset $19, 19*8
.cfi_rel_offset $20, 20*8
.cfi_rel_offset $21, 21*8
.cfi_rel_offset $22, 22*8
.cfi_rel_offset $23, 23*8
.cfi_rel_offset $24, 24*8
.cfi_rel_offset $25, 25*8
.cfi_rel_offset $26, 26*8
.cfi_rel_offset $27, 27*8
.cfi_rel_offset $28, 28*8
.cfi_rel_offset $29, 29*8
lda $8, 0x3fff lda $8, 0x3fff
stq $31, 248($sp) stq $31, 248($sp)
bic $sp, $8, $8 bic $sp, $8, $8
@ -228,16 +345,45 @@ entUna:
ldq $28, 224($sp) ldq $28, 224($sp)
ldq $gp, 232($sp) ldq $gp, 232($sp)
lda $sp, 256($sp) lda $sp, 256($sp)
.cfi_restore $1
.cfi_restore $2
.cfi_restore $3
.cfi_restore $4
.cfi_restore $5
.cfi_restore $6
.cfi_restore $7
.cfi_restore $8
.cfi_restore $9
.cfi_restore $10
.cfi_restore $11
.cfi_restore $12
.cfi_restore $13
.cfi_restore $14
.cfi_restore $15
.cfi_restore $19
.cfi_restore $20
.cfi_restore $21
.cfi_restore $22
.cfi_restore $23
.cfi_restore $24
.cfi_restore $25
.cfi_restore $26
.cfi_restore $27
.cfi_restore $28
.cfi_restore $29
.cfi_adjust_cfa_offset -256
call_pal PAL_rti call_pal PAL_rti
.end entUna
.align 4 .align 4
.ent entUnaUser
entUnaUser: entUnaUser:
.cfi_restore_state
ldq $0, 0($sp) /* restore original $0 */ ldq $0, 0($sp) /* restore original $0 */
lda $sp, 256($sp) /* pop entUna's stack frame */ lda $sp, 256($sp) /* pop entUna's stack frame */
.cfi_restore $0
.cfi_adjust_cfa_offset -256
SAVE_ALL /* setup normal kernel stack */ SAVE_ALL /* setup normal kernel stack */
lda $sp, -56($sp) lda $sp, -56($sp)
.cfi_adjust_cfa_offset 56
stq $9, 0($sp) stq $9, 0($sp)
stq $10, 8($sp) stq $10, 8($sp)
stq $11, 16($sp) stq $11, 16($sp)
@ -245,6 +391,13 @@ entUnaUser:
stq $13, 32($sp) stq $13, 32($sp)
stq $14, 40($sp) stq $14, 40($sp)
stq $15, 48($sp) stq $15, 48($sp)
.cfi_rel_offset $9, 0
.cfi_rel_offset $10, 8
.cfi_rel_offset $11, 16
.cfi_rel_offset $12, 24
.cfi_rel_offset $13, 32
.cfi_rel_offset $14, 40
.cfi_rel_offset $15, 48
lda $8, 0x3fff lda $8, 0x3fff
addq $sp, 56, $19 addq $sp, 56, $19
bic $sp, $8, $8 bic $sp, $8, $8
@ -257,20 +410,25 @@ entUnaUser:
ldq $14, 40($sp) ldq $14, 40($sp)
ldq $15, 48($sp) ldq $15, 48($sp)
lda $sp, 56($sp) lda $sp, 56($sp)
.cfi_restore $9
.cfi_restore $10
.cfi_restore $11
.cfi_restore $12
.cfi_restore $13
.cfi_restore $14
.cfi_restore $15
.cfi_adjust_cfa_offset -56
br ret_from_sys_call br ret_from_sys_call
.end entUnaUser CFI_END_OSF_FRAME entUna
.align 4 CFI_START_OSF_FRAME entDbg
.globl entDbg
.ent entDbg
entDbg:
SAVE_ALL SAVE_ALL
lda $8, 0x3fff lda $8, 0x3fff
lda $26, ret_from_sys_call lda $26, ret_from_sys_call
bic $sp, $8, $8 bic $sp, $8, $8
mov $sp, $16 mov $sp, $16
jsr $31, do_entDbg jsr $31, do_entDbg
.end entDbg CFI_END_OSF_FRAME entDbg
/* /*
* The system call entry point is special. Most importantly, it looks * The system call entry point is special. Most importantly, it looks
@ -285,8 +443,12 @@ entDbg:
.align 4 .align 4
.globl entSys .globl entSys
.globl ret_from_sys_call .type entSys, @function
.ent entSys .cfi_startproc simple
.cfi_return_column 64
.cfi_def_cfa $sp, 48
.cfi_rel_offset 64, 8
.cfi_rel_offset $gp, 16
entSys: entSys:
SAVE_ALL SAVE_ALL
lda $8, 0x3fff lda $8, 0x3fff
@ -300,6 +462,9 @@ entSys:
stq $17, SP_OFF+32($sp) stq $17, SP_OFF+32($sp)
s8addq $0, $5, $5 s8addq $0, $5, $5
stq $18, SP_OFF+40($sp) stq $18, SP_OFF+40($sp)
.cfi_rel_offset $16, SP_OFF+24
.cfi_rel_offset $17, SP_OFF+32
.cfi_rel_offset $18, SP_OFF+40
blbs $3, strace blbs $3, strace
beq $4, 1f beq $4, 1f
ldq $27, 0($5) ldq $27, 0($5)
@ -310,6 +475,7 @@ entSys:
stq $31, 72($sp) /* a3=0 => no error */ stq $31, 72($sp) /* a3=0 => no error */
.align 4 .align 4
.globl ret_from_sys_call
ret_from_sys_call: ret_from_sys_call:
cmovne $26, 0, $18 /* $18 = 0 => non-restartable */ cmovne $26, 0, $18 /* $18 = 0 => non-restartable */
ldq $0, SP_OFF($sp) ldq $0, SP_OFF($sp)
@ -324,10 +490,12 @@ ret_to_user:
and $17, _TIF_WORK_MASK, $2 and $17, _TIF_WORK_MASK, $2
bne $2, work_pending bne $2, work_pending
restore_all: restore_all:
.cfi_remember_state
RESTORE_ALL RESTORE_ALL
call_pal PAL_rti call_pal PAL_rti
ret_to_kernel: ret_to_kernel:
.cfi_restore_state
lda $16, 7 lda $16, 7
call_pal PAL_swpipl call_pal PAL_swpipl
br restore_all br restore_all
@ -356,7 +524,6 @@ $ret_success:
stq $0, 0($sp) stq $0, 0($sp)
stq $31, 72($sp) /* a3=0 => no error */ stq $31, 72($sp) /* a3=0 => no error */
br ret_from_sys_call br ret_from_sys_call
.end entSys
/* /*
* Do all cleanup when returning from all interrupts and system calls. * Do all cleanup when returning from all interrupts and system calls.
@ -370,7 +537,7 @@ $ret_success:
*/ */
.align 4 .align 4
.ent work_pending .type work_pending, @function
work_pending: work_pending:
and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2 and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2
bne $2, $work_notifysig bne $2, $work_notifysig
@ -387,23 +554,22 @@ $work_resched:
$work_notifysig: $work_notifysig:
mov $sp, $16 mov $sp, $16
bsr $1, do_switch_stack DO_SWITCH_STACK
jsr $26, do_work_pending jsr $26, do_work_pending
bsr $1, undo_switch_stack UNDO_SWITCH_STACK
br restore_all br restore_all
.end work_pending
/* /*
* PTRACE syscall handler * PTRACE syscall handler
*/ */
.align 4 .align 4
.ent strace .type strace, @function
strace: strace:
/* set up signal stack, call syscall_trace */ /* set up signal stack, call syscall_trace */
bsr $1, do_switch_stack DO_SWITCH_STACK
jsr $26, syscall_trace_enter /* returns the syscall number */ jsr $26, syscall_trace_enter /* returns the syscall number */
bsr $1, undo_switch_stack UNDO_SWITCH_STACK
/* get the arguments back.. */ /* get the arguments back.. */
ldq $16, SP_OFF+24($sp) ldq $16, SP_OFF+24($sp)
@ -431,9 +597,9 @@ ret_from_straced:
$strace_success: $strace_success:
stq $0, 0($sp) /* save return value */ stq $0, 0($sp) /* save return value */
bsr $1, do_switch_stack DO_SWITCH_STACK
jsr $26, syscall_trace_leave jsr $26, syscall_trace_leave
bsr $1, undo_switch_stack UNDO_SWITCH_STACK
br $31, ret_from_sys_call br $31, ret_from_sys_call
.align 3 .align 3
@ -447,26 +613,31 @@ $strace_error:
stq $0, 0($sp) stq $0, 0($sp)
stq $1, 72($sp) /* a3 for return */ stq $1, 72($sp) /* a3 for return */
bsr $1, do_switch_stack DO_SWITCH_STACK
mov $18, $9 /* save old syscall number */ mov $18, $9 /* save old syscall number */
mov $19, $10 /* save old a3 */ mov $19, $10 /* save old a3 */
jsr $26, syscall_trace_leave jsr $26, syscall_trace_leave
mov $9, $18 mov $9, $18
mov $10, $19 mov $10, $19
bsr $1, undo_switch_stack UNDO_SWITCH_STACK
mov $31, $26 /* tell "ret_from_sys_call" we can restart */ mov $31, $26 /* tell "ret_from_sys_call" we can restart */
br ret_from_sys_call br ret_from_sys_call
.end strace CFI_END_OSF_FRAME entSys
/* /*
* Save and restore the switch stack -- aka the balance of the user context. * Save and restore the switch stack -- aka the balance of the user context.
*/ */
.align 4 .align 4
.ent do_switch_stack .type do_switch_stack, @function
.cfi_startproc simple
.cfi_return_column 64
.cfi_def_cfa $sp, 0
.cfi_register 64, $1
do_switch_stack: do_switch_stack:
lda $sp, -SWITCH_STACK_SIZE($sp) lda $sp, -SWITCH_STACK_SIZE($sp)
.cfi_adjust_cfa_offset SWITCH_STACK_SIZE
stq $9, 0($sp) stq $9, 0($sp)
stq $10, 8($sp) stq $10, 8($sp)
stq $11, 16($sp) stq $11, 16($sp)
@ -510,10 +681,14 @@ do_switch_stack:
stt $f0, 312($sp) # save fpcr in slot of $f31 stt $f0, 312($sp) # save fpcr in slot of $f31
ldt $f0, 64($sp) # dont let "do_switch_stack" change fp state. ldt $f0, 64($sp) # dont let "do_switch_stack" change fp state.
ret $31, ($1), 1 ret $31, ($1), 1
.end do_switch_stack .cfi_endproc
.size do_switch_stack, .-do_switch_stack
.align 4 .align 4
.ent undo_switch_stack .type undo_switch_stack, @function
.cfi_startproc simple
.cfi_def_cfa $sp, 0
.cfi_register 64, $1
undo_switch_stack: undo_switch_stack:
ldq $9, 0($sp) ldq $9, 0($sp)
ldq $10, 8($sp) ldq $10, 8($sp)
@ -558,7 +733,8 @@ undo_switch_stack:
ldt $f30, 304($sp) ldt $f30, 304($sp)
lda $sp, SWITCH_STACK_SIZE($sp) lda $sp, SWITCH_STACK_SIZE($sp)
ret $31, ($1), 1 ret $31, ($1), 1
.end undo_switch_stack .cfi_endproc
.size undo_switch_stack, .-undo_switch_stack
/* /*
* The meat of the context switch code. * The meat of the context switch code.
@ -566,17 +742,18 @@ undo_switch_stack:
.align 4 .align 4
.globl alpha_switch_to .globl alpha_switch_to
.ent alpha_switch_to .type alpha_switch_to, @function
.cfi_startproc
alpha_switch_to: alpha_switch_to:
.prologue 0 DO_SWITCH_STACK
bsr $1, do_switch_stack
call_pal PAL_swpctx call_pal PAL_swpctx
lda $8, 0x3fff lda $8, 0x3fff
bsr $1, undo_switch_stack UNDO_SWITCH_STACK
bic $sp, $8, $8 bic $sp, $8, $8
mov $17, $0 mov $17, $0
ret ret
.end alpha_switch_to .cfi_endproc
.size alpha_switch_to, .-alpha_switch_to
/* /*
* New processes begin life here. * New processes begin life here.

View file

@ -236,7 +236,7 @@ void __init
init_rtc_irq(void) init_rtc_irq(void)
{ {
irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip, irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
handle_simple_irq, "RTC"); handle_percpu_irq, "RTC");
setup_irq(RTC_IRQ, &timer_irqaction); setup_irq(RTC_IRQ, &timer_irqaction);
} }

View file

@ -116,7 +116,7 @@ wait_boot_cpu_to_stop(int cpuid)
/* /*
* Where secondaries begin a life of C. * Where secondaries begin a life of C.
*/ */
void __cpuinit void
smp_callin(void) smp_callin(void)
{ {
int cpuid = hard_smp_processor_id(); int cpuid = hard_smp_processor_id();
@ -194,7 +194,7 @@ wait_for_txrdy (unsigned long cpumask)
* Send a message to a secondary's console. "START" is one such * Send a message to a secondary's console. "START" is one such
* interesting message. ;-) * interesting message. ;-)
*/ */
static void __cpuinit static void
send_secondary_console_msg(char *str, int cpuid) send_secondary_console_msg(char *str, int cpuid)
{ {
struct percpu_struct *cpu; struct percpu_struct *cpu;
@ -264,9 +264,10 @@ recv_secondary_console_msg(void)
if (cnt <= 0 || cnt >= 80) if (cnt <= 0 || cnt >= 80)
strcpy(buf, "<<< BOGUS MSG >>>"); strcpy(buf, "<<< BOGUS MSG >>>");
else { else {
cp1 = (char *) &cpu->ipc_buffer[11]; cp1 = (char *) &cpu->ipc_buffer[1];
cp2 = buf; cp2 = buf;
strcpy(cp2, cp1); memcpy(cp2, cp1, cnt);
cp2[cnt] = '\0';
while ((cp2 = strchr(cp2, '\r')) != 0) { while ((cp2 = strchr(cp2, '\r')) != 0) {
*cp2 = ' '; *cp2 = ' ';
@ -285,7 +286,7 @@ recv_secondary_console_msg(void)
/* /*
* Convince the console to have a secondary cpu begin execution. * Convince the console to have a secondary cpu begin execution.
*/ */
static int __cpuinit static int
secondary_cpu_start(int cpuid, struct task_struct *idle) secondary_cpu_start(int cpuid, struct task_struct *idle)
{ {
struct percpu_struct *cpu; struct percpu_struct *cpu;
@ -356,7 +357,7 @@ secondary_cpu_start(int cpuid, struct task_struct *idle)
/* /*
* Bring one cpu online. * Bring one cpu online.
*/ */
static int __cpuinit static int
smp_boot_one_cpu(int cpuid, struct task_struct *idle) smp_boot_one_cpu(int cpuid, struct task_struct *idle)
{ {
unsigned long timeout; unsigned long timeout;
@ -472,7 +473,7 @@ smp_prepare_boot_cpu(void)
{ {
} }
int __cpuinit int
__cpu_up(unsigned int cpu, struct task_struct *tidle) __cpu_up(unsigned int cpu, struct task_struct *tidle)
{ {
smp_boot_one_cpu(cpu, tidle); smp_boot_one_cpu(cpu, tidle);

View file

@ -190,9 +190,6 @@ static struct irq_chip clipper_irq_type = {
static void static void
dp264_device_interrupt(unsigned long vector) dp264_device_interrupt(unsigned long vector)
{ {
#if 1
printk("dp264_device_interrupt: NOT IMPLEMENTED YET!!\n");
#else
unsigned long pld; unsigned long pld;
unsigned int i; unsigned int i;
@ -210,12 +207,7 @@ dp264_device_interrupt(unsigned long vector)
isa_device_interrupt(vector); isa_device_interrupt(vector);
else else
handle_irq(16 + i); handle_irq(16 + i);
#if 0
TSUNAMI_cchip->dir0.csr = 1UL << i; mb();
tmp = TSUNAMI_cchip->dir0.csr;
#endif
} }
#endif
} }
static void static void

View file

@ -317,8 +317,9 @@ marvel_init_irq(void)
} }
static int static int
marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin) marvel_map_irq(const struct pci_dev *cdev, u8 slot, u8 pin)
{ {
struct pci_dev *dev = (struct pci_dev *)cdev;
struct pci_controller *hose = dev->sysdata; struct pci_controller *hose = dev->sysdata;
struct io7_port *io7_port = hose->sysdata; struct io7_port *io7_port = hose->sysdata;
struct io7 *io7 = io7_port->io7; struct io7 *io7 = io7_port->io7;

View file

@ -524,6 +524,8 @@ sys_call_table:
.quad sys_sendmmsg .quad sys_sendmmsg
.quad sys_process_vm_readv .quad sys_process_vm_readv
.quad sys_process_vm_writev /* 505 */ .quad sys_process_vm_writev /* 505 */
.quad sys_kcmp
.quad sys_finit_module
.size sys_call_table, . - sys_call_table .size sys_call_table, . - sys_call_table
.type sys_call_table, @object .type sys_call_table, @object

View file

@ -105,9 +105,7 @@ void arch_irq_work_raise(void)
static inline __u32 rpcc(void) static inline __u32 rpcc(void)
{ {
__u32 result; return __builtin_alpha_rpcc();
asm volatile ("rpcc %0" : "=r"(result));
return result;
} }
int update_persistent_clock(struct timespec now) int update_persistent_clock(struct timespec now)

View file

@ -32,7 +32,7 @@
static int opDEC_fix; static int opDEC_fix;
static void __cpuinit static void
opDEC_check(void) opDEC_check(void)
{ {
__asm__ __volatile__ ( __asm__ __volatile__ (
@ -66,8 +66,8 @@ dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
{ {
printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n", printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n",
regs->pc, regs->r26, regs->ps, print_tainted()); regs->pc, regs->r26, regs->ps, print_tainted());
print_symbol("pc is at %s\n", regs->pc); printk("pc is at %pSR\n", (void *)regs->pc);
print_symbol("ra is at %s\n", regs->r26 ); printk("ra is at %pSR\n", (void *)regs->r26);
printk("v0 = %016lx t0 = %016lx t1 = %016lx\n", printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
regs->r0, regs->r1, regs->r2); regs->r0, regs->r1, regs->r2);
printk("t2 = %016lx t3 = %016lx t4 = %016lx\n", printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
@ -132,9 +132,7 @@ dik_show_trace(unsigned long *sp)
continue; continue;
if (tmp >= (unsigned long) &_etext) if (tmp >= (unsigned long) &_etext)
continue; continue;
printk("[<%lx>]", tmp); printk("[<%lx>] %pSR\n", tmp, (void *)tmp);
print_symbol(" %s", tmp);
printk("\n");
if (i > 40) { if (i > 40) {
printk(" ..."); printk(" ...");
break; break;
@ -1059,7 +1057,7 @@ do_entUnaUser(void __user * va, unsigned long opcode,
return; return;
} }
void __cpuinit void
trap_init(void) trap_init(void)
{ {
/* Tell PAL-code what global pointer we want in the kernel. */ /* Tell PAL-code what global pointer we want in the kernel. */

View file

@ -38,6 +38,7 @@
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/processor.h> /* For VMALLOC_START */ #include <asm/processor.h> /* For VMALLOC_START */
#include <asm/thread_info.h> /* For THREAD_SIZE */ #include <asm/thread_info.h> /* For THREAD_SIZE */
#include <asm/mmu.h>
/* Note on the LD/ST addr modes with addr reg wback /* Note on the LD/ST addr modes with addr reg wback
* *

View file

@ -20,7 +20,6 @@ config ARM
select GENERIC_STRNCPY_FROM_USER select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER select GENERIC_STRNLEN_USER
select HARDIRQS_SW_RESEND select HARDIRQS_SW_RESEND
select HAVE_AOUT
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
select HAVE_ARCH_KGDB select HAVE_ARCH_KGDB
select HAVE_ARCH_SECCOMP_FILTER select HAVE_ARCH_SECCOMP_FILTER
@ -218,7 +217,8 @@ config VECTORS_BASE
default DRAM_BASE if REMAP_VECTORS_TO_RAM default DRAM_BASE if REMAP_VECTORS_TO_RAM
default 0x00000000 default 0x00000000
help help
The base address of exception vectors. The base address of exception vectors. This must be two pages
in size.
config ARM_PATCH_PHYS_VIRT config ARM_PATCH_PHYS_VIRT
bool "Patch physical to virtual translations at runtime" if EMBEDDED bool "Patch physical to virtual translations at runtime" if EMBEDDED
@ -1600,8 +1600,7 @@ config LOCAL_TIMERS
config ARCH_NR_GPIO config ARCH_NR_GPIO
int int
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
default 512 if SOC_OMAP5 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
default 512 if ARCH_KEYSTONE
default 392 if ARCH_U8500 default 392 if ARCH_U8500
default 352 if ARCH_VT8500 default 352 if ARCH_VT8500
default 288 if ARCH_SUNXI default 288 if ARCH_SUNXI

View file

@ -804,9 +804,19 @@ config DEBUG_LL_INCLUDE
config DEBUG_UNCOMPRESS config DEBUG_UNCOMPRESS
bool bool
default y if ARCH_MULTIPLATFORM && DEBUG_LL && \ depends on ARCH_MULTIPLATFORM
!DEBUG_OMAP2PLUS_UART && \ default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
!DEBUG_TEGRA_UART !DEBUG_TEGRA_UART
help
This option influences the normal decompressor output for
multiplatform kernels. Normally, multiplatform kernels disable
decompressor output because it is not possible to know where to
send the decompressor output.
When this option is set, the selected DEBUG_LL output method
will be re-used for normal decompressor output on multiplatform
kernels.
config UNCOMPRESS_INCLUDE config UNCOMPRESS_INCLUDE
string string

View file

@ -153,6 +153,7 @@ machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_DOVE) += dove machine-$(CONFIG_ARCH_DOVE) += dove
machine-$(CONFIG_ARCH_EBSA110) += ebsa110 machine-$(CONFIG_ARCH_EBSA110) += ebsa110
machine-$(CONFIG_ARCH_EP93XX) += ep93xx machine-$(CONFIG_ARCH_EP93XX) += ep93xx
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_GEMINI) += gemini machine-$(CONFIG_ARCH_GEMINI) += gemini
machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_INTEGRATOR) += integrator machine-$(CONFIG_ARCH_INTEGRATOR) += integrator
@ -160,15 +161,16 @@ machine-$(CONFIG_ARCH_IOP13XX) += iop13xx
machine-$(CONFIG_ARCH_IOP32X) += iop32x machine-$(CONFIG_ARCH_IOP32X) += iop32x
machine-$(CONFIG_ARCH_IOP33X) += iop33x machine-$(CONFIG_ARCH_IOP33X) += iop33x
machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx
machine-$(CONFIG_ARCH_KEYSTONE) += keystone
machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood
machine-$(CONFIG_ARCH_KS8695) += ks8695 machine-$(CONFIG_ARCH_KS8695) += ks8695
machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx
machine-$(CONFIG_ARCH_MMP) += mmp machine-$(CONFIG_ARCH_MMP) += mmp
machine-$(CONFIG_ARCH_MSM) += msm machine-$(CONFIG_ARCH_MSM) += msm
machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0 machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_MXC) += imx machine-$(CONFIG_ARCH_MXC) += imx
machine-$(CONFIG_ARCH_MXS) += mxs machine-$(CONFIG_ARCH_MXS) += mxs
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NETX) += netx machine-$(CONFIG_ARCH_NETX) += netx
machine-$(CONFIG_ARCH_NOMADIK) += nomadik machine-$(CONFIG_ARCH_NOMADIK) += nomadik
machine-$(CONFIG_ARCH_NSPIRE) += nspire machine-$(CONFIG_ARCH_NSPIRE) += nspire
@ -176,7 +178,6 @@ machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_PXA) += pxa machine-$(CONFIG_ARCH_PXA) += pxa
machine-$(CONFIG_ARCH_REALVIEW) += realview machine-$(CONFIG_ARCH_REALVIEW) += realview
machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
@ -186,26 +187,25 @@ machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx
machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0 machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0
machine-$(CONFIG_ARCH_S5PC100) += s5pc100 machine-$(CONFIG_ARCH_S5PC100) += s5pc100
machine-$(CONFIG_ARCH_S5PV210) += s5pv210 machine-$(CONFIG_ARCH_S5PV210) += s5pv210
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_SA1100) += sa1100 machine-$(CONFIG_ARCH_SA1100) += sa1100
machine-$(CONFIG_ARCH_SHARK) += shark machine-$(CONFIG_ARCH_SHARK) += shark
machine-$(CONFIG_ARCH_SHMOBILE) += shmobile machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
machine-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile machine-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile
machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_STI) += sti
machine-$(CONFIG_ARCH_SUNXI) += sunxi
machine-$(CONFIG_ARCH_TEGRA) += tegra machine-$(CONFIG_ARCH_TEGRA) += tegra
machine-$(CONFIG_ARCH_U300) += u300 machine-$(CONFIG_ARCH_U300) += u300
machine-$(CONFIG_ARCH_U8500) += ux500 machine-$(CONFIG_ARCH_U8500) += ux500
machine-$(CONFIG_ARCH_VERSATILE) += versatile machine-$(CONFIG_ARCH_VERSATILE) += versatile
machine-$(CONFIG_ARCH_VEXPRESS) += vexpress machine-$(CONFIG_ARCH_VEXPRESS) += vexpress
machine-$(CONFIG_ARCH_VIRT) += virt
machine-$(CONFIG_ARCH_VT8500) += vt8500 machine-$(CONFIG_ARCH_VT8500) += vt8500
machine-$(CONFIG_ARCH_W90X900) += w90x900 machine-$(CONFIG_ARCH_W90X900) += w90x900
machine-$(CONFIG_FOOTBRIDGE) += footbridge
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_PLAT_SPEAR) += spear
machine-$(CONFIG_ARCH_STI) += sti
machine-$(CONFIG_ARCH_VIRT) += virt
machine-$(CONFIG_ARCH_ZYNQ) += zynq machine-$(CONFIG_ARCH_ZYNQ) += zynq
machine-$(CONFIG_ARCH_SUNXI) += sunxi machine-$(CONFIG_FOOTBRIDGE) += footbridge
machine-$(CONFIG_ARCH_KEYSTONE) += keystone machine-$(CONFIG_PLAT_SPEAR) += spear
# Platform directory name. This list is sorted alphanumerically # Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name. # by CONFIG_* macro name.

View file

@ -485,6 +485,12 @@
sirf,function = "usp0"; sirf,function = "usp0";
}; };
}; };
usp0_uart_nostreamctrl_pins_a: usp0@1 {
usp0 {
sirf,pins = "usp0_uart_nostreamctrl_grp";
sirf,function = "usp0_uart_nostreamctrl";
};
};
usp1_pins_a: usp1@0 { usp1_pins_a: usp1@0 {
usp1 { usp1 {
sirf,pins = "usp1grp"; sirf,pins = "usp1grp";
@ -515,16 +521,16 @@
sirf,function = "pulse_count"; sirf,function = "pulse_count";
}; };
}; };
cko0_rst_pins_a: cko0_rst@0 { cko0_pins_a: cko0@0 {
cko0_rst { cko0 {
sirf,pins = "cko0_rstgrp"; sirf,pins = "cko0grp";
sirf,function = "cko0_rst"; sirf,function = "cko0";
}; };
}; };
cko1_rst_pins_a: cko1_rst@0 { cko1_pins_a: cko1@0 {
cko1_rst { cko1 {
sirf,pins = "cko1_rstgrp"; sirf,pins = "cko1grp";
sirf,function = "cko1_rst"; sirf,function = "cko1";
}; };
}; };
}; };

View file

@ -147,7 +147,7 @@
reg = <0x0a>; reg = <0x0a>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
clocks = <&saif0>;
}; };
pcf8563: rtc@51 { pcf8563: rtc@51 {

View file

@ -195,7 +195,7 @@
reg = <0x0a>; reg = <0x0a>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
clocks = <&saif0>;
}; };
at24@51 { at24@51 {

View file

@ -184,7 +184,7 @@
reg = <0x0a>; reg = <0x0a>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
clocks = <&saif0>;
}; };
eeprom: eeprom@51 { eeprom: eeprom@51 {

View file

@ -837,6 +837,7 @@
compatible = "fsl,imx28-saif"; compatible = "fsl,imx28-saif";
reg = <0x80042000 0x2000>; reg = <0x80042000 0x2000>;
interrupts = <59 80>; interrupts = <59 80>;
#clock-cells = <0>;
clocks = <&clks 53>; clocks = <&clks 53>;
dmas = <&dma_apbx 4>; dmas = <&dma_apbx 4>;
dma-names = "rx-tx"; dma-names = "rx-tx";

View file

@ -61,6 +61,16 @@
mux-int-port = <2>; mux-int-port = <2>;
mux-ext-port = <3>; mux-ext-port = <3>;
}; };
clocks {
clk_26M: codec_clock {
compatible = "fixed-clock";
reg=<0>;
#clock-cells = <0>;
clock-frequency = <26000000>;
gpios = <&gpio4 26 1>;
};
};
}; };
&esdhc1 { &esdhc1 {
@ -229,6 +239,7 @@
MX51_PAD_EIM_A27__GPIO2_21 0x5 MX51_PAD_EIM_A27__GPIO2_21 0x5
MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
>; >;
}; };
}; };
@ -255,7 +266,7 @@
sgtl5000: codec@0a { sgtl5000: codec@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clock-frequency = <26000000>; clocks = <&clk_26M>;
VDDA-supply = <&vdig_reg>; VDDA-supply = <&vdig_reg>;
VDDIO-supply = <&vvideo_reg>; VDDIO-supply = <&vvideo_reg>;
}; };

View file

@ -27,7 +27,7 @@
backlight { backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm2 0 50000 0 0>; pwms = <&pwm2 0 50000>;
brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>; brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
default-brightness-level = <10>; default-brightness-level = <10>;
enable-gpios = <&gpio7 7 0>; enable-gpios = <&gpio7 7 0>;

View file

@ -725,15 +725,15 @@
uart1 { uart1 {
pinctrl_uart1_1: uart1grp-1 { pinctrl_uart1_1: uart1grp-1 {
fsl,pins = < fsl,pins = <
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1c5 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1c5 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
>; >;
}; };
pinctrl_uart1_2: uart1grp-2 { pinctrl_uart1_2: uart1grp-2 {
fsl,pins = < fsl,pins = <
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1c5 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1c5 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
>; >;
}; };
@ -748,8 +748,8 @@
uart2 { uart2 {
pinctrl_uart2_1: uart2grp-1 { pinctrl_uart2_1: uart2grp-1 {
fsl,pins = < fsl,pins = <
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
>; >;
}; };
@ -766,17 +766,17 @@
uart3 { uart3 {
pinctrl_uart3_1: uart3grp-1 { pinctrl_uart3_1: uart3grp-1 {
fsl,pins = < fsl,pins = <
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
MX53_PAD_PATA_DA_1__UART3_CTS 0x1c5 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
MX53_PAD_PATA_DA_2__UART3_RTS 0x1c5 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
>; >;
}; };
pinctrl_uart3_2: uart3grp-2 { pinctrl_uart3_2: uart3grp-2 {
fsl,pins = < fsl,pins = <
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
>; >;
}; };
@ -785,8 +785,8 @@
uart4 { uart4 {
pinctrl_uart4_1: uart4grp-1 { pinctrl_uart4_1: uart4grp-1 {
fsl,pins = < fsl,pins = <
MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1c5 MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4
MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1c5 MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4
>; >;
}; };
}; };
@ -794,8 +794,8 @@
uart5 { uart5 {
pinctrl_uart5_1: uart5grp-1 { pinctrl_uart5_1: uart5grp-1 {
fsl,pins = < fsl,pins = <
MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1c5 MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4
MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5 MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4
>; >;
}; };
}; };

View file

@ -26,7 +26,7 @@
cpu-offset = <0x80000>; cpu-offset = <0x80000>;
}; };
msmgpio: gpio@fd510000 { msmgpio: gpio@800000 {
compatible = "qcom,msm-gpio"; compatible = "qcom,msm-gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
@ -34,7 +34,7 @@
interrupts = <0 32 0x4>; interrupts = <0 32 0x4>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
reg = <0xfd510000 0x4000>; reg = <0x800000 0x4000>;
}; };
serial@16440000 { serial@16440000 {

View file

@ -235,7 +235,7 @@
}; };
&mmc1 { &mmc1 {
vmmc-supply = <&vmmcsd_fixed>; vmmc-supply = <&ldo9_reg>;
bus-width = <4>; bus-width = <4>;
}; };
@ -282,6 +282,7 @@
regulators { regulators {
smps123_reg: smps123 { smps123_reg: smps123 {
/* VDD_OPP_MPU */
regulator-name = "smps123"; regulator-name = "smps123";
regulator-min-microvolt = < 600000>; regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1500000>; regulator-max-microvolt = <1500000>;
@ -290,6 +291,7 @@
}; };
smps45_reg: smps45 { smps45_reg: smps45 {
/* VDD_OPP_MM */
regulator-name = "smps45"; regulator-name = "smps45";
regulator-min-microvolt = < 600000>; regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1310000>; regulator-max-microvolt = <1310000>;
@ -298,6 +300,7 @@
}; };
smps6_reg: smps6 { smps6_reg: smps6 {
/* VDD_DDR3 - over VDD_SMPS6 */
regulator-name = "smps6"; regulator-name = "smps6";
regulator-min-microvolt = <1200000>; regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>; regulator-max-microvolt = <1200000>;
@ -306,6 +309,7 @@
}; };
smps7_reg: smps7 { smps7_reg: smps7 {
/* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
regulator-name = "smps7"; regulator-name = "smps7";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@ -314,6 +318,7 @@
}; };
smps8_reg: smps8 { smps8_reg: smps8 {
/* VDD_OPP_CORE */
regulator-name = "smps8"; regulator-name = "smps8";
regulator-min-microvolt = < 600000>; regulator-min-microvolt = < 600000>;
regulator-max-microvolt = <1310000>; regulator-max-microvolt = <1310000>;
@ -322,15 +327,15 @@
}; };
smps9_reg: smps9 { smps9_reg: smps9 {
/* VDDA_2v1_AUD over VDD_2v1 */
regulator-name = "smps9"; regulator-name = "smps9";
regulator-min-microvolt = <2100000>; regulator-min-microvolt = <2100000>;
regulator-max-microvolt = <2100000>; regulator-max-microvolt = <2100000>;
regulator-always-on;
regulator-boot-on;
ti,smps-range = <0x80>; ti,smps-range = <0x80>;
}; };
smps10_reg: smps10 { smps10_reg: smps10 {
/* VBUS_5V_OTG */
regulator-name = "smps10"; regulator-name = "smps10";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
@ -339,38 +344,40 @@
}; };
ldo1_reg: ldo1 { ldo1_reg: ldo1 {
/* VDDAPHY_CAM: vdda_csiport */
regulator-name = "ldo1"; regulator-name = "ldo1";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
}; };
ldo2_reg: ldo2 { ldo2_reg: ldo2 {
/* VCC_2V8_DISP: Does not go anywhere */
regulator-name = "ldo2"; regulator-name = "ldo2";
regulator-min-microvolt = <2900000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2900000>; regulator-max-microvolt = <2800000>;
regulator-always-on; /* Unused */
regulator-boot-on; status = "disabled";
}; };
ldo3_reg: ldo3 { ldo3_reg: ldo3 {
/* VDDAPHY_MDM: vdda_lli */
regulator-name = "ldo3"; regulator-name = "ldo3";
regulator-min-microvolt = <3000000>; regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
/* Only if Modem is used */
status = "disabled";
}; };
ldo4_reg: ldo4 { ldo4_reg: ldo4 {
/* VDDAPHY_DISP: vdda_dsiport/hdmi */
regulator-name = "ldo4"; regulator-name = "ldo4";
regulator-min-microvolt = <2200000>; regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <2200000>; regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
}; };
ldo5_reg: ldo5 { ldo5_reg: ldo5 {
/* VDDA_1V8_PHY: usb/sata/hdmi.. */
regulator-name = "ldo5"; regulator-name = "ldo5";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@ -379,38 +386,43 @@
}; };
ldo6_reg: ldo6 { ldo6_reg: ldo6 {
/* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
regulator-name = "ldo6"; regulator-name = "ldo6";
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1500000>; regulator-max-microvolt = <1200000>;
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
}; };
ldo7_reg: ldo7 { ldo7_reg: ldo7 {
/* VDD_VPP: vpp1 */
regulator-name = "ldo7"; regulator-name = "ldo7";
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <1500000>; regulator-max-microvolt = <2000000>;
regulator-always-on; /* Only for efuse reprograming! */
regulator-boot-on; status = "disabled";
}; };
ldo8_reg: ldo8 { ldo8_reg: ldo8 {
/* VDD_3v0: Does not go anywhere */
regulator-name = "ldo8"; regulator-name = "ldo8";
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <1500000>; regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
/* Unused */
status = "disabled";
}; };
ldo9_reg: ldo9 { ldo9_reg: ldo9 {
/* VCC_DV_SDIO: vdds_sdcard */
regulator-name = "ldo9"; regulator-name = "ldo9";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on; regulator-boot-on;
}; };
ldoln_reg: ldoln { ldoln_reg: ldoln {
/* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
regulator-name = "ldoln"; regulator-name = "ldoln";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@ -419,12 +431,20 @@
}; };
ldousb_reg: ldousb { ldousb_reg: ldousb {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldousb"; regulator-name = "ldousb";
regulator-min-microvolt = <3250000>; regulator-min-microvolt = <3250000>;
regulator-max-microvolt = <3250000>; regulator-max-microvolt = <3250000>;
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
}; };
regen3_reg: regen3 {
/* REGEN3 controls LDO9 supply to card */
regulator-name = "regen3";
regulator-always-on;
regulator-boot-on;
};
}; };
}; };
}; };

View file

@ -515,16 +515,16 @@
sirf,function = "pulse_count"; sirf,function = "pulse_count";
}; };
}; };
cko0_rst_pins_a: cko0_rst@0 { cko0_pins_a: cko0@0 {
cko0_rst { cko0 {
sirf,pins = "cko0_rstgrp"; sirf,pins = "cko0grp";
sirf,function = "cko0_rst"; sirf,function = "cko0";
}; };
}; };
cko1_rst_pins_a: cko1_rst@0 { cko1_pins_a: cko1@0 {
cko1_rst { cko1 {
sirf,pins = "cko1_rstgrp"; sirf,pins = "cko1grp";
sirf,function = "cko1_rst"; sirf,function = "cko1";
}; };
}; };
}; };

View file

@ -166,6 +166,15 @@
reg = <0x9000 0x100>; reg = <0x9000 0x100>;
st,bank-name = "PIO31"; st,bank-name = "PIO31";
}; };
serial2-oe {
pinctrl_serial2_oe: serial2-1 {
st,pins {
output-enable = <&PIO11 3 ALT2 OUT>;
};
};
};
}; };
pin-controller-rear { pin-controller-rear {
@ -218,7 +227,6 @@
st,pins { st,pins {
tx = <&PIO17 4 ALT2 OUT>; tx = <&PIO17 4 ALT2 OUT>;
rx = <&PIO17 5 ALT2 IN>; rx = <&PIO17 5 ALT2 IN>;
output-enable = <&PIO11 3 ALT2 OUT>;
}; };
}; };
}; };

View file

@ -79,7 +79,7 @@
interrupts = <0 197 0>; interrupts = <0 197 0>;
clocks = <&CLK_S_ICN_REG_0>; clocks = <&CLK_S_ICN_REG_0>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_serial2>; pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
}; };
/* SBC_UART1 */ /* SBC_UART1 */

View file

@ -6,10 +6,12 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cpu@0 { cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <0>; reg = <0>;
}; };
cpu@1 { cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <1>; reg = <1>;
}; };

View file

@ -457,6 +457,7 @@
}; };
usb-phy@c5004000 { usb-phy@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
GPIO_ACTIVE_LOW>; GPIO_ACTIVE_LOW>;
}; };

View file

@ -47,6 +47,12 @@
regulator-max-microvolt = <3150000>; regulator-max-microvolt = <3150000>;
}; };
vmmc2: regulator-vmmc2 {
compatible = "ti,twl4030-vmmc2";
regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <3150000>;
};
vusb1v5: regulator-vusb1v5 { vusb1v5: regulator-vusb1v5 {
compatible = "ti,twl4030-vusb1v5"; compatible = "ti,twl4030-vusb1v5";
}; };

View file

@ -442,8 +442,8 @@
compatible = "fsl,mvf600-fec"; compatible = "fsl,mvf600-fec";
reg = <0x400d0000 0x1000>; reg = <0x400d0000 0x1000>;
interrupts = <0 78 0x04>; interrupts = <0 78 0x04>;
clocks = <&clks VF610_CLK_ENET>, clocks = <&clks VF610_CLK_ENET0>,
<&clks VF610_CLK_ENET>, <&clks VF610_CLK_ENET0>,
<&clks VF610_CLK_ENET>; <&clks VF610_CLK_ENET>;
clock-names = "ipg", "ahb", "ptp"; clock-names = "ipg", "ahb", "ptp";
status = "disabled"; status = "disabled";
@ -453,8 +453,8 @@
compatible = "fsl,mvf600-fec"; compatible = "fsl,mvf600-fec";
reg = <0x400d1000 0x1000>; reg = <0x400d1000 0x1000>;
interrupts = <0 79 0x04>; interrupts = <0 79 0x04>;
clocks = <&clks VF610_CLK_ENET>, clocks = <&clks VF610_CLK_ENET1>,
<&clks VF610_CLK_ENET>, <&clks VF610_CLK_ENET1>,
<&clks VF610_CLK_ENET>; <&clks VF610_CLK_ENET>;
clock-names = "ipg", "ahb", "ptp"; clock-names = "ipg", "ahb", "ptp";
status = "disabled"; status = "disabled";

View file

@ -41,8 +41,8 @@
L2: cache-controller { L2: cache-controller {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0xF8F02000 0x1000>; reg = <0xF8F02000 0x1000>;
arm,data-latency = <2 3 2>; arm,data-latency = <3 2 2>;
arm,tag-latency = <2 3 2>; arm,tag-latency = <2 2 2>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
}; };

View file

@ -26,7 +26,6 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/edma.h> #include <linux/edma.h>
#include <linux/err.h>
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/of_dma.h> #include <linux/of_dma.h>

View file

@ -19,7 +19,7 @@
#include <asm/smp.h> #include <asm/smp.h>
#include <asm/smp_plat.h> #include <asm/smp_plat.h>
static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle) static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
{ {
unsigned int mpidr, pcpu, pcluster, ret; unsigned int mpidr, pcpu, pcluster, ret;
extern void secondary_startup(void); extern void secondary_startup(void);
@ -40,7 +40,7 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
return 0; return 0;
} }
static void __cpuinit mcpm_secondary_init(unsigned int cpu) static void mcpm_secondary_init(unsigned int cpu)
{ {
mcpm_cpu_powered_up(); mcpm_cpu_powered_up();
} }

View file

@ -102,6 +102,8 @@ CONFIG_SND_SOC=m
CONFIG_SND_DAVINCI_SOC=m CONFIG_SND_DAVINCI_SOC=m
# CONFIG_HID_SUPPORT is not set # CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
CONFIG_DMADEVICES=y
CONFIG_TI_EDMA=y
CONFIG_EXT2_FS=y CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
CONFIG_XFS_FS=m CONFIG_XFS_FS=m

View file

@ -162,6 +162,8 @@ CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_HEARTBEAT=m CONFIG_LEDS_TRIGGER_HEARTBEAT=m
CONFIG_RTC_CLASS=y CONFIG_RTC_CLASS=y
CONFIG_DMADEVICES=y
CONFIG_TI_EDMA=y
CONFIG_EXT2_FS=y CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
CONFIG_XFS_FS=m CONFIG_XFS_FS=m

View file

@ -53,6 +53,7 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_DHCP=y
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y CONFIG_DEVTMPFS_MOUNT=y
CONFIG_OMAP_OCP2SCP=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y CONFIG_ATA=y
CONFIG_SATA_AHCI_PLATFORM=y CONFIG_SATA_AHCI_PLATFORM=y
@ -61,6 +62,7 @@ CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_SUN4I_EMAC=y CONFIG_SUN4I_EMAC=y
CONFIG_NET_CALXEDA_XGMAC=y CONFIG_NET_CALXEDA_XGMAC=y
CONFIG_KS8851=y
CONFIG_SMSC911X=y CONFIG_SMSC911X=y
CONFIG_STMMAC_ETH=y CONFIG_STMMAC_ETH=y
CONFIG_MDIO_SUN4I=y CONFIG_MDIO_SUN4I=y
@ -89,6 +91,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_SIRF=y CONFIG_I2C_SIRF=y
CONFIG_I2C_TEGRA=y CONFIG_I2C_TEGRA=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_SPI_OMAP24XX=y
CONFIG_SPI_PL022=y CONFIG_SPI_PL022=y
CONFIG_SPI_SIRF=y CONFIG_SPI_SIRF=y
CONFIG_SPI_TEGRA114=y CONFIG_SPI_TEGRA114=y
@ -111,11 +114,12 @@ CONFIG_FB_SIMPLE=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1760_HCD=y
CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_AB8500_USB=y CONFIG_AB8500_USB=y
CONFIG_NOP_USB_XCEIV=y CONFIG_NOP_USB_XCEIV=y
CONFIG_OMAP_USB2=y CONFIG_OMAP_USB2=y

View file

@ -1,6 +1,8 @@
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set # CONFIG_SWAP is not set
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
@ -48,7 +50,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_TESTS=m CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND_ECC_SMC=y CONFIG_MTD_NAND_ECC_SMC=y
CONFIG_MTD_NAND=y CONFIG_MTD_NAND=y
@ -94,8 +95,10 @@ CONFIG_I2C_GPIO=y
CONFIG_I2C_NOMADIK=y CONFIG_I2C_NOMADIK=y
CONFIG_DEBUG_GPIO=y CONFIG_DEBUG_GPIO=y
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_REGULATOR=y
CONFIG_MMC=y CONFIG_MMC=y
CONFIG_MMC_CLKGATE=y CONFIG_MMC_UNSAFE_RESUME=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_ARMMMCI=y CONFIG_MMC_ARMMMCI=y
CONFIG_NEW_LEDS=y CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS=y

View file

@ -1,45 +0,0 @@
/* a.out coredump register dumper
*
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public Licence
* as published by the Free Software Foundation; either version
* 2 of the Licence, or (at your option) any later version.
*/
#ifndef _ASM_A_OUT_CORE_H
#define _ASM_A_OUT_CORE_H
#ifdef __KERNEL__
#include <linux/user.h>
#include <linux/elfcore.h>
/*
* fill in the user structure for an a.out core dump
*/
static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
{
struct task_struct *tsk = current;
dump->magic = CMAGIC;
dump->start_code = tsk->mm->start_code;
dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
dump->u_ssize = 0;
memset(dump->u_debugreg, 0, sizeof(dump->u_debugreg));
if (dump->start_stack < 0x04000000)
dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
dump->regs = *regs;
dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
}
#endif /* __KERNEL__ */
#endif /* _ASM_A_OUT_CORE_H */

View file

@ -89,7 +89,7 @@ static inline u64 arch_counter_get_cntvct(void)
return cval; return cval;
} }
static inline void __cpuinit arch_counter_set_user_access(void) static inline void arch_counter_set_user_access(void)
{ {
u32 cntkctl; u32 cntkctl;

View file

@ -89,13 +89,18 @@ extern unsigned int processor_id;
__val; \ __val; \
}) })
/*
* The memory clobber prevents gcc 4.5 from reordering the mrc before
* any is_smp() tests, which can cause undefined instruction aborts on
* ARM1136 r0 due to the missing extended CP15 registers.
*/
#define read_cpuid_ext(ext_reg) \ #define read_cpuid_ext(ext_reg) \
({ \ ({ \
unsigned int __val; \ unsigned int __val; \
asm("mrc p15, 0, %0, c0, " ext_reg \ asm("mrc p15, 0, %0, c0, " ext_reg \
: "=r" (__val) \ : "=r" (__val) \
: \ : \
: "cc"); \ : "memory"); \
__val; \ __val; \
}) })

View file

@ -130,4 +130,10 @@ struct mm_struct;
extern unsigned long arch_randomize_brk(struct mm_struct *mm); extern unsigned long arch_randomize_brk(struct mm_struct *mm);
#define arch_randomize_brk arch_randomize_brk #define arch_randomize_brk arch_randomize_brk
#ifdef CONFIG_MMU
#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
struct linux_binprm;
int arch_setup_additional_pages(struct linux_binprm *, int);
#endif
#endif #endif

View file

@ -6,8 +6,11 @@
typedef struct { typedef struct {
#ifdef CONFIG_CPU_HAS_ASID #ifdef CONFIG_CPU_HAS_ASID
atomic64_t id; atomic64_t id;
#else
int switch_pending;
#endif #endif
unsigned int vmalloc_seq; unsigned int vmalloc_seq;
unsigned long sigpage;
} mm_context_t; } mm_context_t;
#ifdef CONFIG_CPU_HAS_ASID #ifdef CONFIG_CPU_HAS_ASID

View file

@ -56,7 +56,7 @@ static inline void check_and_switch_context(struct mm_struct *mm,
* on non-ASID CPUs, the old mm will remain valid until the * on non-ASID CPUs, the old mm will remain valid until the
* finish_arch_post_lock_switch() call. * finish_arch_post_lock_switch() call.
*/ */
set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM); mm->context.switch_pending = 1;
else else
cpu_switch_mm(mm->pgd, mm); cpu_switch_mm(mm->pgd, mm);
} }
@ -65,9 +65,21 @@ static inline void check_and_switch_context(struct mm_struct *mm,
finish_arch_post_lock_switch finish_arch_post_lock_switch
static inline void finish_arch_post_lock_switch(void) static inline void finish_arch_post_lock_switch(void)
{ {
if (test_and_clear_thread_flag(TIF_SWITCH_MM)) { struct mm_struct *mm = current->mm;
struct mm_struct *mm = current->mm;
cpu_switch_mm(mm->pgd, mm); if (mm && mm->context.switch_pending) {
/*
* Preemption must be disabled during cpu_switch_mm() as we
* have some stateful cache flush implementations. Check
* switch_pending again in case we were preempted and the
* switch to this mm was already done.
*/
preempt_disable();
if (mm->context.switch_pending) {
mm->context.switch_pending = 0;
cpu_switch_mm(mm->pgd, mm);
}
preempt_enable_no_resched();
} }
} }

View file

@ -142,7 +142,9 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
extern void copy_page(void *to, const void *from); extern void copy_page(void *to, const void *from);
#ifdef CONFIG_KUSER_HELPERS
#define __HAVE_ARCH_GATE_AREA 1 #define __HAVE_ARCH_GATE_AREA 1
#endif
#ifdef CONFIG_ARM_LPAE #ifdef CONFIG_ARM_LPAE
#include <asm/pgtable-3level-types.h> #include <asm/pgtable-3level-types.h>

View file

@ -54,7 +54,6 @@ struct thread_struct {
#define start_thread(regs,pc,sp) \ #define start_thread(regs,pc,sp) \
({ \ ({ \
unsigned long *stack = (unsigned long *)sp; \
memset(regs->uregs, 0, sizeof(regs->uregs)); \ memset(regs->uregs, 0, sizeof(regs->uregs)); \
if (current->personality & ADDR_LIMIT_32BIT) \ if (current->personality & ADDR_LIMIT_32BIT) \
regs->ARM_cpsr = USR_MODE; \ regs->ARM_cpsr = USR_MODE; \
@ -65,9 +64,6 @@ struct thread_struct {
regs->ARM_cpsr |= PSR_ENDSTATE; \ regs->ARM_cpsr |= PSR_ENDSTATE; \
regs->ARM_pc = pc & ~1; /* pc */ \ regs->ARM_pc = pc & ~1; /* pc */ \
regs->ARM_sp = sp; /* sp */ \ regs->ARM_sp = sp; /* sp */ \
regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
nommu_start_thread(regs); \ nommu_start_thread(regs); \
}) })

View file

@ -156,7 +156,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
#define TIF_USING_IWMMXT 17 #define TIF_USING_IWMMXT 17
#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ #define TIF_MEMDIE 18 /* is terminating due to OOM killer */
#define TIF_RESTORE_SIGMASK 20 #define TIF_RESTORE_SIGMASK 20
#define TIF_SWITCH_MM 22 /* deferred switch_mm */
#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)

View file

@ -443,7 +443,18 @@ static inline void local_flush_bp_all(void)
isb(); isb();
} }
#include <asm/cputype.h>
#ifdef CONFIG_ARM_ERRATA_798181 #ifdef CONFIG_ARM_ERRATA_798181
static inline int erratum_a15_798181(void)
{
unsigned int midr = read_cpuid_id();
/* Cortex-A15 r0p0..r3p2 affected */
if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
return 0;
return 1;
}
static inline void dummy_flush_tlb_a15_erratum(void) static inline void dummy_flush_tlb_a15_erratum(void)
{ {
/* /*
@ -453,6 +464,11 @@ static inline void dummy_flush_tlb_a15_erratum(void)
dsb(); dsb();
} }
#else #else
static inline int erratum_a15_798181(void)
{
return 0;
}
static inline void dummy_flush_tlb_a15_erratum(void) static inline void dummy_flush_tlb_a15_erratum(void)
{ {
} }

View file

@ -29,6 +29,7 @@
#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT #define BOOT_CPU_MODE_MISMATCH PSR_N_BIT
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <asm/cacheflush.h>
#ifdef CONFIG_ARM_VIRT_EXT #ifdef CONFIG_ARM_VIRT_EXT
/* /*
@ -41,10 +42,21 @@
*/ */
extern int __boot_cpu_mode; extern int __boot_cpu_mode;
static inline void sync_boot_mode(void)
{
/*
* As secondaries write to __boot_cpu_mode with caches disabled, we
* must flush the corresponding cache entries to ensure the visibility
* of their writes.
*/
sync_cache_r(&__boot_cpu_mode);
}
void __hyp_set_vectors(unsigned long phys_vector_base); void __hyp_set_vectors(unsigned long phys_vector_base);
unsigned long __hyp_get_vectors(void); unsigned long __hyp_get_vectors(void);
#else #else
#define __boot_cpu_mode (SVC_MODE) #define __boot_cpu_mode (SVC_MODE)
#define sync_boot_mode()
#endif #endif
#ifndef ZIMAGE #ifndef ZIMAGE

View file

@ -1,7 +1,6 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
header-y += a.out.h
header-y += byteorder.h header-y += byteorder.h
header-y += fcntl.h header-y += fcntl.h
header-y += hwcap.h header-y += hwcap.h

View file

@ -1,34 +0,0 @@
#ifndef __ARM_A_OUT_H__
#define __ARM_A_OUT_H__
#include <linux/personality.h>
#include <linux/types.h>
struct exec
{
__u32 a_info; /* Use macros N_MAGIC, etc for access */
__u32 a_text; /* length of text, in bytes */
__u32 a_data; /* length of data, in bytes */
__u32 a_bss; /* length of uninitialized data area for file, in bytes */
__u32 a_syms; /* length of symbol table data in file, in bytes */
__u32 a_entry; /* start address */
__u32 a_trsize; /* length of relocation info for text, in bytes */
__u32 a_drsize; /* length of relocation info for data, in bytes */
};
/*
* This is always the same
*/
#define N_TXTADDR(a) (0x00008000)
#define N_TRSIZE(a) ((a).a_trsize)
#define N_DRSIZE(a) ((a).a_drsize)
#define N_SYMSIZE(a) ((a).a_syms)
#define M_ARM 103
#ifndef LIBRARY_START_TEXT
#define LIBRARY_START_TEXT (0x00c00000)
#endif
#endif /* __A_OUT_GNU_H__ */

View file

@ -742,6 +742,18 @@ ENDPROC(__switch_to)
#endif #endif
.endm .endm
.macro kuser_pad, sym, size
.if (. - \sym) & 3
.rept 4 - (. - \sym) & 3
.byte 0
.endr
.endif
.rept (\size - (. - \sym)) / 4
.word 0xe7fddef1
.endr
.endm
#ifdef CONFIG_KUSER_HELPERS
.align 5 .align 5
.globl __kuser_helper_start .globl __kuser_helper_start
__kuser_helper_start: __kuser_helper_start:
@ -832,18 +844,13 @@ kuser_cmpxchg64_fixup:
#error "incoherent kernel configuration" #error "incoherent kernel configuration"
#endif #endif
/* pad to next slot */ kuser_pad __kuser_cmpxchg64, 64
.rept (16 - (. - __kuser_cmpxchg64)/4)
.word 0
.endr
.align 5
__kuser_memory_barrier: @ 0xffff0fa0 __kuser_memory_barrier: @ 0xffff0fa0
smp_dmb arm smp_dmb arm
usr_ret lr usr_ret lr
.align 5 kuser_pad __kuser_memory_barrier, 32
__kuser_cmpxchg: @ 0xffff0fc0 __kuser_cmpxchg: @ 0xffff0fc0
@ -916,13 +923,14 @@ kuser_cmpxchg32_fixup:
#endif #endif
.align 5 kuser_pad __kuser_cmpxchg, 32
__kuser_get_tls: @ 0xffff0fe0 __kuser_get_tls: @ 0xffff0fe0
ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init
usr_ret lr usr_ret lr
mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code
.rep 4 kuser_pad __kuser_get_tls, 16
.rep 3
.word 0 @ 0xffff0ff0 software TLS value, then .word 0 @ 0xffff0ff0 software TLS value, then
.endr @ pad up to __kuser_helper_version .endr @ pad up to __kuser_helper_version
@ -932,14 +940,16 @@ __kuser_helper_version: @ 0xffff0ffc
.globl __kuser_helper_end .globl __kuser_helper_end
__kuser_helper_end: __kuser_helper_end:
#endif
THUMB( .thumb ) THUMB( .thumb )
/* /*
* Vector stubs. * Vector stubs.
* *
* This code is copied to 0xffff0200 so we can use branches in the * This code is copied to 0xffff1000 so we can use branches in the
* vectors, rather than ldr's. Note that this code must not * vectors, rather than ldr's. Note that this code must not exceed
* exceed 0x300 bytes. * a page size.
* *
* Common stub entry macro: * Common stub entry macro:
* Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
@ -986,8 +996,17 @@ ENDPROC(vector_\name)
1: 1:
.endm .endm
.globl __stubs_start .section .stubs, "ax", %progbits
__stubs_start: __stubs_start:
@ This must be the first word
.word vector_swi
vector_rst:
ARM( swi SYS_ERROR0 )
THUMB( svc #0 )
THUMB( nop )
b vector_und
/* /*
* Interrupt dispatcher * Interrupt dispatcher
*/ */
@ -1081,6 +1100,16 @@ __stubs_start:
.align 5 .align 5
/*=============================================================================
* Address exception handler
*-----------------------------------------------------------------------------
* These aren't too critical.
* (they're not supposed to happen, and won't happen in 32-bit data mode).
*/
vector_addrexcptn:
b vector_addrexcptn
/*============================================================================= /*=============================================================================
* Undefined FIQs * Undefined FIQs
*----------------------------------------------------------------------------- *-----------------------------------------------------------------------------
@ -1094,45 +1123,19 @@ __stubs_start:
vector_fiq: vector_fiq:
subs pc, lr, #4 subs pc, lr, #4
/*============================================================================= .globl vector_fiq_offset
* Address exception handler .equ vector_fiq_offset, vector_fiq
*-----------------------------------------------------------------------------
* These aren't too critical.
* (they're not supposed to happen, and won't happen in 32-bit data mode).
*/
vector_addrexcptn: .section .vectors, "ax", %progbits
b vector_addrexcptn
/*
* We group all the following data together to optimise
* for CPUs with separate I & D caches.
*/
.align 5
.LCvswi:
.word vector_swi
.globl __stubs_end
__stubs_end:
.equ stubs_offset, __vectors_start + 0x200 - __stubs_start
.globl __vectors_start
__vectors_start: __vectors_start:
ARM( swi SYS_ERROR0 ) W(b) vector_rst
THUMB( svc #0 ) W(b) vector_und
THUMB( nop ) W(ldr) pc, __vectors_start + 0x1000
W(b) vector_und + stubs_offset W(b) vector_pabt
W(ldr) pc, .LCvswi + stubs_offset W(b) vector_dabt
W(b) vector_pabt + stubs_offset W(b) vector_addrexcptn
W(b) vector_dabt + stubs_offset W(b) vector_irq
W(b) vector_addrexcptn + stubs_offset W(b) vector_fiq
W(b) vector_irq + stubs_offset
W(b) vector_fiq + stubs_offset
.globl __vectors_end
__vectors_end:
.data .data

View file

@ -49,7 +49,7 @@ __irq_entry:
mov r1, sp mov r1, sp
stmdb sp!, {lr} stmdb sp!, {lr}
@ routine called with r0 = irq number, r1 = struct pt_regs * @ routine called with r0 = irq number, r1 = struct pt_regs *
bl nvic_do_IRQ bl nvic_handle_irq
pop {lr} pop {lr}
@ @

View file

@ -47,6 +47,11 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/traps.h> #include <asm/traps.h>
#define FIQ_OFFSET ({ \
extern void *vector_fiq_offset; \
(unsigned)&vector_fiq_offset; \
})
static unsigned long no_fiq_insn; static unsigned long no_fiq_insn;
/* Default reacquire function /* Default reacquire function
@ -80,13 +85,16 @@ int show_fiq_list(struct seq_file *p, int prec)
void set_fiq_handler(void *start, unsigned int length) void set_fiq_handler(void *start, unsigned int length)
{ {
#if defined(CONFIG_CPU_USE_DOMAINS) #if defined(CONFIG_CPU_USE_DOMAINS)
memcpy((void *)0xffff001c, start, length); void *base = (void *)0xffff0000;
#else #else
memcpy(vectors_page + 0x1c, start, length); void *base = vectors_page;
#endif #endif
flush_icache_range(0xffff001c, 0xffff001c + length); unsigned offset = FIQ_OFFSET;
memcpy(base + offset, start, length);
flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length);
if (!vectors_high()) if (!vectors_high())
flush_icache_range(0x1c, 0x1c + length); flush_icache_range(offset, offset + length);
} }
int claim_fiq(struct fiq_handler *f) int claim_fiq(struct fiq_handler *f)
@ -144,6 +152,7 @@ EXPORT_SYMBOL(disable_fiq);
void __init init_FIQ(int start) void __init init_FIQ(int start)
{ {
no_fiq_insn = *(unsigned long *)0xffff001c; unsigned offset = FIQ_OFFSET;
no_fiq_insn = *(unsigned long *)(0xffff0000 + offset);
fiq_start = start; fiq_start = start;
} }

View file

@ -149,7 +149,6 @@ ENDPROC(lookup_processor_type)
* r5 = proc_info pointer in physical address space * r5 = proc_info pointer in physical address space
* r9 = cpuid (preserved) * r9 = cpuid (preserved)
*/ */
__CPUINIT
__lookup_processor_type: __lookup_processor_type:
adr r3, __lookup_processor_type_data adr r3, __lookup_processor_type_data
ldmia r3, {r4 - r6} ldmia r3, {r4 - r6}

View file

@ -87,7 +87,7 @@ ENTRY(stext)
ENDPROC(stext) ENDPROC(stext)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
__CPUINIT .text
ENTRY(secondary_startup) ENTRY(secondary_startup)
/* /*
* Common entry point for secondary CPUs. * Common entry point for secondary CPUs.

View file

@ -343,7 +343,7 @@ __turn_mmu_on_loc:
.long __turn_mmu_on_end .long __turn_mmu_on_end
#if defined(CONFIG_SMP) #if defined(CONFIG_SMP)
__CPUINIT .text
ENTRY(secondary_startup) ENTRY(secondary_startup)
/* /*
* Common entry point for secondary CPUs. * Common entry point for secondary CPUs.

View file

@ -1020,7 +1020,7 @@ static void reset_ctrl_regs(void *unused)
cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu)); cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
} }
static int __cpuinit dbg_reset_notify(struct notifier_block *self, static int dbg_reset_notify(struct notifier_block *self,
unsigned long action, void *cpu) unsigned long action, void *cpu)
{ {
if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE) if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
@ -1029,7 +1029,7 @@ static int __cpuinit dbg_reset_notify(struct notifier_block *self,
return NOTIFY_OK; return NOTIFY_OK;
} }
static struct notifier_block __cpuinitdata dbg_reset_nb = { static struct notifier_block dbg_reset_nb = {
.notifier_call = dbg_reset_notify, .notifier_call = dbg_reset_notify,
}; };

View file

@ -56,8 +56,8 @@ ENTRY(__boot_cpu_mode)
ldr \reg3, [\reg2] ldr \reg3, [\reg2]
ldr \reg1, [\reg2, \reg3] ldr \reg1, [\reg2, \reg3]
cmp \mode, \reg1 @ matches primary CPU boot mode? cmp \mode, \reg1 @ matches primary CPU boot mode?
orrne r7, r7, #BOOT_CPU_MODE_MISMATCH orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
strne r7, [r5, r6] @ record what happened and give up strne \reg1, [\reg2, \reg3] @ record what happened and give up
.endm .endm
#else /* ZIMAGE */ #else /* ZIMAGE */

View file

@ -157,8 +157,8 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
* junk values out of them. * junk values out of them.
*/ */
static int __cpuinit cpu_pmu_notify(struct notifier_block *b, static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
unsigned long action, void *hcpu) void *hcpu)
{ {
if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING) if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
return NOTIFY_DONE; return NOTIFY_DONE;
@ -171,7 +171,7 @@ static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
return NOTIFY_OK; return NOTIFY_OK;
} }
static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = { static struct notifier_block cpu_pmu_hotplug_notifier = {
.notifier_call = cpu_pmu_notify, .notifier_call = cpu_pmu_notify,
}; };

View file

@ -197,6 +197,7 @@ void machine_shutdown(void)
*/ */
void machine_halt(void) void machine_halt(void)
{ {
local_irq_disable();
smp_send_stop(); smp_send_stop();
local_irq_disable(); local_irq_disable();
@ -211,6 +212,7 @@ void machine_halt(void)
*/ */
void machine_power_off(void) void machine_power_off(void)
{ {
local_irq_disable();
smp_send_stop(); smp_send_stop();
if (pm_power_off) if (pm_power_off)
@ -230,6 +232,7 @@ void machine_power_off(void)
*/ */
void machine_restart(char *cmd) void machine_restart(char *cmd)
{ {
local_irq_disable();
smp_send_stop(); smp_send_stop();
arm_pm_restart(reboot_mode, cmd); arm_pm_restart(reboot_mode, cmd);
@ -426,10 +429,11 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
} }
#ifdef CONFIG_MMU #ifdef CONFIG_MMU
#ifdef CONFIG_KUSER_HELPERS
/* /*
* The vectors page is always readable from user space for the * The vectors page is always readable from user space for the
* atomic helpers and the signal restart code. Insert it into the * atomic helpers. Insert it into the gate_vma so that it is visible
* gate_vma so that it is visible through ptrace and /proc/<pid>/mem. * through ptrace and /proc/<pid>/mem.
*/ */
static struct vm_area_struct gate_vma = { static struct vm_area_struct gate_vma = {
.vm_start = 0xffff0000, .vm_start = 0xffff0000,
@ -458,9 +462,48 @@ int in_gate_area_no_mm(unsigned long addr)
{ {
return in_gate_area(NULL, addr); return in_gate_area(NULL, addr);
} }
#define is_gate_vma(vma) ((vma) = &gate_vma)
#else
#define is_gate_vma(vma) 0
#endif
const char *arch_vma_name(struct vm_area_struct *vma) const char *arch_vma_name(struct vm_area_struct *vma)
{ {
return (vma == &gate_vma) ? "[vectors]" : NULL; return is_gate_vma(vma) ? "[vectors]" :
(vma->vm_mm && vma->vm_start == vma->vm_mm->context.sigpage) ?
"[sigpage]" : NULL;
}
static struct page *signal_page;
extern struct page *get_signal_page(void);
int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
{
struct mm_struct *mm = current->mm;
unsigned long addr;
int ret;
if (!signal_page)
signal_page = get_signal_page();
if (!signal_page)
return -ENOMEM;
down_write(&mm->mmap_sem);
addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
if (IS_ERR_VALUE(addr)) {
ret = addr;
goto up_fail;
}
ret = install_special_mapping(mm, addr, PAGE_SIZE,
VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
&signal_page);
if (ret == 0)
mm->context.sigpage = addr;
up_fail:
up_write(&mm->mmap_sem);
return ret;
} }
#endif #endif

View file

@ -46,8 +46,7 @@
extern void secondary_startup(void); extern void secondary_startup(void);
static int __cpuinit psci_boot_secondary(unsigned int cpu, static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)
struct task_struct *idle)
{ {
if (psci_ops.cpu_on) if (psci_ops.cpu_on)
return psci_ops.cpu_on(cpu_logical_map(cpu), return psci_ops.cpu_on(cpu_logical_map(cpu),

View file

@ -836,6 +836,8 @@ static int __init meminfo_cmp(const void *_a, const void *_b)
void __init hyp_mode_check(void) void __init hyp_mode_check(void)
{ {
#ifdef CONFIG_ARM_VIRT_EXT #ifdef CONFIG_ARM_VIRT_EXT
sync_boot_mode();
if (is_hyp_mode_available()) { if (is_hyp_mode_available()) {
pr_info("CPU: All CPU(s) started in HYP mode.\n"); pr_info("CPU: All CPU(s) started in HYP mode.\n");
pr_info("CPU: Virtualization extensions available.\n"); pr_info("CPU: Virtualization extensions available.\n");
@ -971,6 +973,7 @@ static const char *hwcap_str[] = {
"vfpv4", "vfpv4",
"idiva", "idiva",
"idivt", "idivt",
"vfpd32",
"lpae", "lpae",
NULL NULL
}; };

View file

@ -8,6 +8,7 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/random.h>
#include <linux/signal.h> #include <linux/signal.h>
#include <linux/personality.h> #include <linux/personality.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
@ -15,12 +16,11 @@
#include <asm/elf.h> #include <asm/elf.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/traps.h>
#include <asm/ucontext.h> #include <asm/ucontext.h>
#include <asm/unistd.h> #include <asm/unistd.h>
#include <asm/vfp.h> #include <asm/vfp.h>
#include "signal.h"
/* /*
* For ARM syscalls, we encode the syscall number into the instruction. * For ARM syscalls, we encode the syscall number into the instruction.
*/ */
@ -40,11 +40,13 @@
#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) #define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))
#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) #define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
const unsigned long sigreturn_codes[7] = { static const unsigned long sigreturn_codes[7] = {
MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN,
MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN, MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN,
}; };
static unsigned long signal_return_offset;
#ifdef CONFIG_CRUNCH #ifdef CONFIG_CRUNCH
static int preserve_crunch_context(struct crunch_sigframe __user *frame) static int preserve_crunch_context(struct crunch_sigframe __user *frame)
{ {
@ -400,14 +402,20 @@ setup_return(struct pt_regs *regs, struct ksignal *ksig,
__put_user(sigreturn_codes[idx+1], rc+1)) __put_user(sigreturn_codes[idx+1], rc+1))
return 1; return 1;
if ((cpsr & MODE32_BIT) && !IS_ENABLED(CONFIG_ARM_MPU)) { #ifdef CONFIG_MMU
if (cpsr & MODE32_BIT) {
struct mm_struct *mm = current->mm;
/* /*
* 32-bit code can use the new high-page * 32-bit code can use the signal return page
* signal return code support except when the MPU has * except when the MPU has protected the vectors
* protected the vectors page from PL0 * page from PL0
*/ */
retcode = KERN_SIGRETURN_CODE + (idx << 2) + thumb; retcode = mm->context.sigpage + signal_return_offset +
} else { (idx << 2) + thumb;
} else
#endif
{
/* /*
* Ensure that the instruction cache sees * Ensure that the instruction cache sees
* the return code written onto the stack. * the return code written onto the stack.
@ -608,3 +616,33 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall)
} while (thread_flags & _TIF_WORK_MASK); } while (thread_flags & _TIF_WORK_MASK);
return 0; return 0;
} }
struct page *get_signal_page(void)
{
unsigned long ptr;
unsigned offset;
struct page *page;
void *addr;
page = alloc_pages(GFP_KERNEL, 0);
if (!page)
return NULL;
addr = page_address(page);
/* Give the signal return code some randomness */
offset = 0x200 + (get_random_int() & 0x7fc);
signal_return_offset = offset;
/*
* Copy signal return handlers into the vector page, and
* set sigreturn to be a pointer to these.
*/
memcpy(addr + offset, sigreturn_codes, sizeof(sigreturn_codes));
ptr = (unsigned long)addr + offset;
flush_icache_range(ptr, ptr + sizeof(sigreturn_codes));
return page;
}

View file

@ -1,12 +0,0 @@
/*
* linux/arch/arm/kernel/signal.h
*
* Copyright (C) 2005-2009 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
extern const unsigned long sigreturn_codes[7];

View file

@ -58,7 +58,7 @@ struct secondary_data secondary_data;
* control for which core is the next to come out of the secondary * control for which core is the next to come out of the secondary
* boot "holding pen" * boot "holding pen"
*/ */
volatile int __cpuinitdata pen_release = -1; volatile int pen_release = -1;
enum ipi_msg_type { enum ipi_msg_type {
IPI_WAKEUP, IPI_WAKEUP,
@ -86,7 +86,7 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
return pgdir >> ARCH_PGD_SHIFT; return pgdir >> ARCH_PGD_SHIFT;
} }
int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle) int __cpu_up(unsigned int cpu, struct task_struct *idle)
{ {
int ret; int ret;
@ -138,7 +138,7 @@ void __init smp_init_cpus(void)
smp_ops.smp_init_cpus(); smp_ops.smp_init_cpus();
} }
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) int boot_secondary(unsigned int cpu, struct task_struct *idle)
{ {
if (smp_ops.smp_boot_secondary) if (smp_ops.smp_boot_secondary)
return smp_ops.smp_boot_secondary(cpu, idle); return smp_ops.smp_boot_secondary(cpu, idle);
@ -170,7 +170,7 @@ static int platform_cpu_disable(unsigned int cpu)
/* /*
* __cpu_disable runs on the processor to be shutdown. * __cpu_disable runs on the processor to be shutdown.
*/ */
int __cpuinit __cpu_disable(void) int __cpu_disable(void)
{ {
unsigned int cpu = smp_processor_id(); unsigned int cpu = smp_processor_id();
int ret; int ret;
@ -216,7 +216,7 @@ static DECLARE_COMPLETION(cpu_died);
* called on the thread which is asking for a CPU to be shutdown - * called on the thread which is asking for a CPU to be shutdown -
* waits until shutdown has completed, or it is timed out. * waits until shutdown has completed, or it is timed out.
*/ */
void __cpuinit __cpu_die(unsigned int cpu) void __cpu_die(unsigned int cpu)
{ {
if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) { if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
pr_err("CPU%u: cpu didn't die\n", cpu); pr_err("CPU%u: cpu didn't die\n", cpu);
@ -306,7 +306,7 @@ void __ref cpu_die(void)
* Called by both boot and secondaries to move global data into * Called by both boot and secondaries to move global data into
* per-processor storage. * per-processor storage.
*/ */
static void __cpuinit smp_store_cpu_info(unsigned int cpuid) static void smp_store_cpu_info(unsigned int cpuid)
{ {
struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
@ -322,7 +322,7 @@ static void percpu_timer_setup(void);
* This is the secondary CPU boot entry. We're using this CPUs * This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables. * idle thread stack, but a set of temporary page tables.
*/ */
asmlinkage void __cpuinit secondary_start_kernel(void) asmlinkage void secondary_start_kernel(void)
{ {
struct mm_struct *mm = &init_mm; struct mm_struct *mm = &init_mm;
unsigned int cpu; unsigned int cpu;
@ -521,7 +521,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode,
{ {
} }
static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt) static void broadcast_timer_setup(struct clock_event_device *evt)
{ {
evt->name = "dummy_timer"; evt->name = "dummy_timer";
evt->features = CLOCK_EVT_FEAT_ONESHOT | evt->features = CLOCK_EVT_FEAT_ONESHOT |
@ -550,7 +550,7 @@ int local_timer_register(struct local_timer_ops *ops)
} }
#endif #endif
static void __cpuinit percpu_timer_setup(void) static void percpu_timer_setup(void)
{ {
unsigned int cpu = smp_processor_id(); unsigned int cpu = smp_processor_id();
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);

View file

@ -70,23 +70,6 @@ static inline void ipi_flush_bp_all(void *ignored)
local_flush_bp_all(); local_flush_bp_all();
} }
#ifdef CONFIG_ARM_ERRATA_798181
static int erratum_a15_798181(void)
{
unsigned int midr = read_cpuid_id();
/* Cortex-A15 r0p0..r3p2 affected */
if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
return 0;
return 1;
}
#else
static int erratum_a15_798181(void)
{
return 0;
}
#endif
static void ipi_flush_tlb_a15_erratum(void *arg) static void ipi_flush_tlb_a15_erratum(void *arg)
{ {
dmb(); dmb();

View file

@ -187,7 +187,7 @@ core_initcall(twd_cpufreq_init);
#endif #endif
static void __cpuinit twd_calibrate_rate(void) static void twd_calibrate_rate(void)
{ {
unsigned long count; unsigned long count;
u64 waitjiffies; u64 waitjiffies;
@ -265,7 +265,7 @@ static void twd_get_clock(struct device_node *np)
/* /*
* Setup the local clock events for a CPU. * Setup the local clock events for a CPU.
*/ */
static int __cpuinit twd_timer_setup(struct clock_event_device *clk) static int twd_timer_setup(struct clock_event_device *clk)
{ {
struct clock_event_device **this_cpu_clk; struct clock_event_device **this_cpu_clk;
int cpu = smp_processor_id(); int cpu = smp_processor_id();
@ -308,7 +308,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
return 0; return 0;
} }
static struct local_timer_ops twd_lt_ops __cpuinitdata = { static struct local_timer_ops twd_lt_ops = {
.setup = twd_timer_setup, .setup = twd_timer_setup,
.stop = twd_timer_stop, .stop = twd_timer_stop,
}; };

View file

@ -35,8 +35,6 @@
#include <asm/tls.h> #include <asm/tls.h>
#include <asm/system_misc.h> #include <asm/system_misc.h>
#include "signal.h"
static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" }; static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
void *vectors_page; void *vectors_page;
@ -800,15 +798,26 @@ void __init trap_init(void)
return; return;
} }
static void __init kuser_get_tls_init(unsigned long vectors) #ifdef CONFIG_KUSER_HELPERS
static void __init kuser_init(void *vectors)
{ {
extern char __kuser_helper_start[], __kuser_helper_end[];
int kuser_sz = __kuser_helper_end - __kuser_helper_start;
memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
/* /*
* vectors + 0xfe0 = __kuser_get_tls * vectors + 0xfe0 = __kuser_get_tls
* vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8 * vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8
*/ */
if (tls_emu || has_tls_reg) if (tls_emu || has_tls_reg)
memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4); memcpy(vectors + 0xfe0, vectors + 0xfe8, 4);
} }
#else
static void __init kuser_init(void *vectors)
{
}
#endif
void __init early_trap_init(void *vectors_base) void __init early_trap_init(void *vectors_base)
{ {
@ -816,33 +825,30 @@ void __init early_trap_init(void *vectors_base)
unsigned long vectors = (unsigned long)vectors_base; unsigned long vectors = (unsigned long)vectors_base;
extern char __stubs_start[], __stubs_end[]; extern char __stubs_start[], __stubs_end[];
extern char __vectors_start[], __vectors_end[]; extern char __vectors_start[], __vectors_end[];
extern char __kuser_helper_start[], __kuser_helper_end[]; unsigned i;
int kuser_sz = __kuser_helper_end - __kuser_helper_start;
vectors_page = vectors_base; vectors_page = vectors_base;
/*
* Poison the vectors page with an undefined instruction. This
* instruction is chosen to be undefined for both ARM and Thumb
* ISAs. The Thumb version is an undefined instruction with a
* branch back to the undefined instruction.
*/
for (i = 0; i < PAGE_SIZE / sizeof(u32); i++)
((u32 *)vectors_base)[i] = 0xe7fddef1;
/* /*
* Copy the vectors, stubs and kuser helpers (in entry-armv.S) * Copy the vectors, stubs and kuser helpers (in entry-armv.S)
* into the vector page, mapped at 0xffff0000, and ensure these * into the vector page, mapped at 0xffff0000, and ensure these
* are visible to the instruction stream. * are visible to the instruction stream.
*/ */
memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start); memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start);
memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start); memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start);
memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
/* kuser_init(vectors_base);
* Do processor specific fixups for the kuser helpers
*/
kuser_get_tls_init(vectors);
/* flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
* Copy signal return handlers into the vector page, and
* set sigreturn to be a pointer to these.
*/
memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
sigreturn_codes, sizeof(sigreturn_codes));
flush_icache_range(vectors, vectors + PAGE_SIZE);
modify_domain(DOMAIN_USER, DOMAIN_CLIENT); modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
#else /* ifndef CONFIG_CPU_V7M */ #else /* ifndef CONFIG_CPU_V7M */
/* /*

View file

@ -148,6 +148,23 @@ SECTIONS
. = ALIGN(PAGE_SIZE); . = ALIGN(PAGE_SIZE);
__init_begin = .; __init_begin = .;
#endif #endif
/*
* The vectors and stubs are relocatable code, and the
* only thing that matters is their relative offsets
*/
__vectors_start = .;
.vectors 0 : AT(__vectors_start) {
*(.vectors)
}
. = __vectors_start + SIZEOF(.vectors);
__vectors_end = .;
__stubs_start = .;
.stubs 0x1000 : AT(__stubs_start) {
*(.stubs)
}
. = __stubs_start + SIZEOF(.stubs);
__stubs_end = .;
INIT_TEXT_SECTION(8) INIT_TEXT_SECTION(8)
.exit.text : { .exit.text : {

View file

@ -86,7 +86,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer)
} }
} }
unsigned long __cpuinit calibrate_delay_is_known(void) unsigned long calibrate_delay_is_known(void)
{ {
delay_calibrated = true; delay_calibrated = true;
return lpj_fine; return lpj_fine;

View file

@ -505,7 +505,7 @@ static struct vpbe_output dm365evm_vpbe_outputs[] = {
/* /*
* Amplifiers on the board * Amplifiers on the board
*/ */
struct ths7303_platform_data ths7303_pdata = { static struct ths7303_platform_data ths7303_pdata = {
.ch_1 = 3, .ch_1 = 3,
.ch_2 = 3, .ch_2 = 3,
.ch_3 = 3, .ch_3 = 3,

View file

@ -860,7 +860,7 @@ static struct platform_device dm355_vpbe_display = {
}, },
}; };
struct venc_platform_data dm355_venc_pdata = { static struct venc_platform_data dm355_venc_pdata = {
.setup_pinmux = dm355_vpbe_setup_pinmux, .setup_pinmux = dm355_vpbe_setup_pinmux,
.setup_clock = dm355_venc_setup_clock, .setup_clock = dm355_venc_setup_clock,
}; };

View file

@ -1349,7 +1349,7 @@ static struct platform_device dm365_vpbe_display = {
}, },
}; };
struct venc_platform_data dm365_venc_pdata = { static struct venc_platform_data dm365_venc_pdata = {
.setup_pinmux = dm365_vpbe_setup_pinmux, .setup_pinmux = dm365_vpbe_setup_pinmux,
.setup_clock = dm365_venc_setup_clock, .setup_clock = dm365_venc_setup_clock,
}; };

View file

@ -92,6 +92,7 @@ config SOC_EXYNOS5440
bool "SAMSUNG EXYNOS5440" bool "SAMSUNG EXYNOS5440"
default y default y
depends on ARCH_EXYNOS5 depends on ARCH_EXYNOS5
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ARCH_HAS_OPP select ARCH_HAS_OPP
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
select AUTO_ZRELADDR select AUTO_ZRELADDR

View file

@ -14,7 +14,7 @@ obj- :=
obj-$(CONFIG_ARCH_EXYNOS) += common.o obj-$(CONFIG_ARCH_EXYNOS) += common.o
obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_S5P_PM) += pm.o
obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o

View file

@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
static void exynos4_map_io(void); static void exynos4_map_io(void);
static void exynos5_map_io(void); static void exynos5_map_io(void);
static void exynos5440_map_io(void);
static int exynos_init(void); static int exynos_init(void);
static struct cpu_table cpu_ids[] __initdata = { static struct cpu_table cpu_ids[] __initdata = {
@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = {
}, { }, {
.idcode = EXYNOS5440_SOC_ID, .idcode = EXYNOS5440_SOC_ID,
.idmask = EXYNOS5_SOC_MASK, .idmask = EXYNOS5_SOC_MASK,
.map_io = exynos5440_map_io,
.init = exynos_init, .init = exynos_init,
.name = name_exynos5440, .name = name_exynos5440,
}, },
@ -149,11 +147,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
.length = SZ_64K, .length = SZ_64K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, {
.virtual = (unsigned long)S3C_VA_UART,
.pfn = __phys_to_pfn(EXYNOS4_PA_UART),
.length = SZ_512K,
.type = MT_DEVICE,
}, { }, {
.virtual = (unsigned long)S5P_VA_CMU, .virtual = (unsigned long)S5P_VA_CMU,
.pfn = __phys_to_pfn(EXYNOS4_PA_CMU), .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS5_PA_PMU), .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
.length = SZ_64K, .length = SZ_64K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, {
.virtual = (unsigned long)S3C_VA_UART,
.pfn = __phys_to_pfn(EXYNOS5_PA_UART),
.length = SZ_512K,
.type = MT_DEVICE,
},
};
static struct map_desc exynos5440_iodesc0[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_UART,
.pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
.length = SZ_512K,
.type = MT_DEVICE,
}, },
}; };
@ -388,11 +367,6 @@ static void __init exynos5_map_io(void)
iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
} }
static void __init exynos5440_map_io(void)
{
iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
}
void __init exynos_init_time(void) void __init exynos_init_time(void)
{ {
of_clk_init(NULL); of_clk_init(NULL);

View file

@ -97,6 +97,5 @@ struct exynos_pmu_conf {
}; };
extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
extern void s3c_cpu_resume(void);
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */

View file

@ -25,6 +25,7 @@
#include <mach/regs-pmu.h> #include <mach/regs-pmu.h>
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/pm.h>
#include "common.h" #include "common.h"

View file

@ -13,8 +13,6 @@
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
__CPUINIT
/* /*
* exynos4 specific entry point for secondary CPUs. This provides * exynos4 specific entry point for secondary CPUs. This provides
* a "holding pen" into which all secondary cores are held until we're * a "holding pen" into which all secondary cores are held until we're

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