blackfin/time-ts: Migrate to new 'set-state' interface
Migrate blackfin driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. We weren't doing anything in ->set_mode(RESUME) and so tick_resume() isn't implemented. Cc: Steven Miao <realmz6@gmail.com> Cc: adi-buildroot-devel@lists.sourceforge.net Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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6ec8193298
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1 changed files with 70 additions and 66 deletions
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@ -136,44 +136,44 @@ static int bfin_gptmr0_set_next_event(unsigned long cycles,
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return 0;
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}
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static void bfin_gptmr0_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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static int bfin_gptmr0_set_periodic(struct clock_event_device *evt)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC: {
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#ifndef CONFIG_BF60x
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set_gptimer_config(TIMER0_id, \
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TIMER_OUT_DIS | TIMER_IRQ_ENA | \
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TIMER_PERIOD_CNT | TIMER_MODE_PWM);
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set_gptimer_config(TIMER0_id,
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TIMER_OUT_DIS | TIMER_IRQ_ENA |
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TIMER_PERIOD_CNT | TIMER_MODE_PWM);
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#else
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set_gptimer_config(TIMER0_id, TIMER_OUT_DIS
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| TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER);
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set_gptimer_config(TIMER0_id,
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TIMER_OUT_DIS | TIMER_MODE_PWM_CONT |
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TIMER_PULSE_HI | TIMER_IRQ_PER);
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#endif
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set_gptimer_period(TIMER0_id, get_sclk() / HZ);
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set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1);
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enable_gptimers(TIMER0bit);
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break;
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}
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case CLOCK_EVT_MODE_ONESHOT:
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disable_gptimers(TIMER0bit);
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set_gptimer_period(TIMER0_id, get_sclk() / HZ);
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set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1);
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enable_gptimers(TIMER0bit);
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return 0;
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}
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static int bfin_gptmr0_set_oneshot(struct clock_event_device *evt)
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{
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disable_gptimers(TIMER0bit);
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#ifndef CONFIG_BF60x
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set_gptimer_config(TIMER0_id, \
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TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM);
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set_gptimer_config(TIMER0_id,
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TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM);
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#else
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set_gptimer_config(TIMER0_id, TIMER_OUT_DIS | TIMER_MODE_PWM
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| TIMER_PULSE_HI | TIMER_IRQ_WID_DLY);
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set_gptimer_config(TIMER0_id,
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TIMER_OUT_DIS | TIMER_MODE_PWM | TIMER_PULSE_HI |
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TIMER_IRQ_WID_DLY);
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#endif
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set_gptimer_period(TIMER0_id, 0);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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disable_gptimers(TIMER0bit);
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break;
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case CLOCK_EVT_MODE_RESUME:
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break;
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}
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set_gptimer_period(TIMER0_id, 0);
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return 0;
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}
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static int bfin_gptmr0_shutdown(struct clock_event_device *evt)
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{
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disable_gptimers(TIMER0bit);
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return 0;
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}
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static void bfin_gptmr0_ack(void)
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@ -211,13 +211,16 @@ static struct irqaction gptmr0_irq = {
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};
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static struct clock_event_device clockevent_gptmr0 = {
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.name = "bfin_gptimer0",
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.rating = 300,
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.irq = IRQ_TIMER0,
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.shift = 32,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = bfin_gptmr0_set_next_event,
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.set_mode = bfin_gptmr0_set_mode,
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.name = "bfin_gptimer0",
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.rating = 300,
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.irq = IRQ_TIMER0,
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.shift = 32,
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.features = CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = bfin_gptmr0_set_next_event,
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.set_state_shutdown = bfin_gptmr0_shutdown,
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.set_state_periodic = bfin_gptmr0_set_periodic,
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.set_state_oneshot = bfin_gptmr0_set_oneshot,
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};
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static void __init bfin_gptmr0_clockevent_init(struct clock_event_device *evt)
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@ -250,36 +253,35 @@ static int bfin_coretmr_set_next_event(unsigned long cycles,
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return 0;
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}
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static void bfin_coretmr_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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static int bfin_coretmr_set_periodic(struct clock_event_device *evt)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC: {
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unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
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bfin_write_TCNTL(TMPWR);
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CSYNC();
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bfin_write_TSCALE(TIME_SCALE - 1);
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bfin_write_TPERIOD(tcount);
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bfin_write_TCOUNT(tcount);
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CSYNC();
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bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
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break;
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}
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case CLOCK_EVT_MODE_ONESHOT:
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bfin_write_TCNTL(TMPWR);
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CSYNC();
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bfin_write_TSCALE(TIME_SCALE - 1);
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bfin_write_TPERIOD(0);
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bfin_write_TCOUNT(0);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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bfin_write_TCNTL(0);
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CSYNC();
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break;
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case CLOCK_EVT_MODE_RESUME:
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break;
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}
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unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
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bfin_write_TCNTL(TMPWR);
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CSYNC();
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bfin_write_TSCALE(TIME_SCALE - 1);
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bfin_write_TPERIOD(tcount);
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bfin_write_TCOUNT(tcount);
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CSYNC();
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bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
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return 0;
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}
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static int bfin_coretmr_set_oneshot(struct clock_event_device *evt)
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{
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bfin_write_TCNTL(TMPWR);
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CSYNC();
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bfin_write_TSCALE(TIME_SCALE - 1);
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bfin_write_TPERIOD(0);
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bfin_write_TCOUNT(0);
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return 0;
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}
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static int bfin_coretmr_shutdown(struct clock_event_device *evt)
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{
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bfin_write_TCNTL(0);
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CSYNC();
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return 0;
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}
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void bfin_coretmr_init(void)
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@ -335,7 +337,9 @@ void bfin_coretmr_clockevent_init(void)
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evt->shift = 32;
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evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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evt->set_next_event = bfin_coretmr_set_next_event;
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evt->set_mode = bfin_coretmr_set_mode;
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evt->set_state_shutdown = bfin_coretmr_shutdown;
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evt->set_state_periodic = bfin_coretmr_set_periodic;
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evt->set_state_oneshot = bfin_coretmr_set_oneshot;
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clock_tick = get_cclk() / TIME_SCALE;
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evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift);
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