pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
This patch adds pinmux groups and functions for the two MMCIF and four SDHI interfaces on r8a73a4 (APE6). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Guennadi Liakhovetski
Simon Horman
parent
3ef2a776d1
commit
066f0d6eb7
1 changed files with 294 additions and 0 deletions
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@ -2372,6 +2372,220 @@ static const unsigned int tpu0_to3_mux[] = {
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TPU0TO3_MARK,
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};
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/* - MMCIF ------------------------------------------------------------------ */
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static const unsigned int mmc0_data1_pins[] = {
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/* D[0] */
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RCAR_GP_PIN(3, 18),
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};
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static const unsigned int mmc0_data1_mux[] = {
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MMC0_D0_MARK,
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};
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static const unsigned int mmc0_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
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};
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static const unsigned int mmc0_data4_mux[] = {
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MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
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};
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static const unsigned int mmc0_data8_pins[] = {
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/* D[0:7] */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
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RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
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RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
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};
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static const unsigned int mmc0_data8_mux[] = {
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MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
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MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK,
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};
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static const unsigned int mmc0_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
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};
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static const unsigned int mmc0_ctrl_mux[] = {
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MMC0_CLK_MARK, MMC0_CMD_MARK,
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};
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static const unsigned int mmc1_data1_pins[] = {
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/* D[0] */
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RCAR_GP_PIN(3, 26),
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};
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static const unsigned int mmc1_data1_mux[] = {
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MMC1_D0_MARK,
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};
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static const unsigned int mmc1_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
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RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
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};
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static const unsigned int mmc1_data4_mux[] = {
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MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
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};
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static const unsigned int mmc1_data8_pins[] = {
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/* D[0:7] */
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RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
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RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
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RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
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RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
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};
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static const unsigned int mmc1_data8_mux[] = {
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MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
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MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK,
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};
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static const unsigned int mmc1_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
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};
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static const unsigned int mmc1_ctrl_mux[] = {
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MMC1_CLK_MARK, MMC1_CMD_MARK,
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};
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/* - SDHI ------------------------------------------------------------------- */
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static const unsigned int sdhi0_data1_pins[] = {
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/* D0 */
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RCAR_GP_PIN(3, 2),
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};
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static const unsigned int sdhi0_data1_mux[] = {
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SD0_DAT0_MARK,
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};
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static const unsigned int sdhi0_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
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};
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static const unsigned int sdhi0_data4_mux[] = {
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SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
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};
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static const unsigned int sdhi0_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
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};
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static const unsigned int sdhi0_ctrl_mux[] = {
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SD0_CLK_MARK, SD0_CMD_MARK,
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};
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static const unsigned int sdhi0_cd_pins[] = {
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/* CD */
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RCAR_GP_PIN(3, 6),
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};
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static const unsigned int sdhi0_cd_mux[] = {
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SD0_CD_MARK,
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};
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static const unsigned int sdhi0_wp_pins[] = {
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/* WP */
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RCAR_GP_PIN(3, 7),
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};
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static const unsigned int sdhi0_wp_mux[] = {
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SD0_WP_MARK,
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};
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static const unsigned int sdhi1_data1_pins[] = {
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/* D0 */
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RCAR_GP_PIN(3, 10),
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};
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static const unsigned int sdhi1_data1_mux[] = {
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SD1_DAT0_MARK,
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};
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static const unsigned int sdhi1_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
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};
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static const unsigned int sdhi1_data4_mux[] = {
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SD1_DAT0_MARK, SD1_DAT1_MARK, SD1_DAT2_MARK, SD1_DAT3_MARK,
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};
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static const unsigned int sdhi1_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
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};
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static const unsigned int sdhi1_ctrl_mux[] = {
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SD1_CLK_MARK, SD1_CMD_MARK,
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};
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static const unsigned int sdhi1_cd_pins[] = {
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/* CD */
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RCAR_GP_PIN(3, 14),
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};
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static const unsigned int sdhi1_cd_mux[] = {
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SD1_CD_MARK,
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};
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static const unsigned int sdhi1_wp_pins[] = {
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/* WP */
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RCAR_GP_PIN(3, 15),
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};
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static const unsigned int sdhi1_wp_mux[] = {
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SD1_WP_MARK,
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};
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static const unsigned int sdhi2_data1_pins[] = {
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/* D0 */
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RCAR_GP_PIN(3, 18),
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};
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static const unsigned int sdhi2_data1_mux[] = {
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SD2_DAT0_MARK,
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};
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static const unsigned int sdhi2_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
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};
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static const unsigned int sdhi2_data4_mux[] = {
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SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK,
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};
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static const unsigned int sdhi2_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
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};
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static const unsigned int sdhi2_ctrl_mux[] = {
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SD2_CLK_MARK, SD2_CMD_MARK,
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};
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static const unsigned int sdhi2_cd_pins[] = {
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/* CD */
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RCAR_GP_PIN(3, 22),
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};
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static const unsigned int sdhi2_cd_mux[] = {
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SD2_CD_MARK,
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};
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static const unsigned int sdhi2_wp_pins[] = {
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/* WP */
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RCAR_GP_PIN(3, 23),
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};
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static const unsigned int sdhi2_wp_mux[] = {
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SD2_WP_MARK,
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};
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static const unsigned int sdhi3_data1_pins[] = {
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/* D0 */
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RCAR_GP_PIN(3, 26),
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};
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static const unsigned int sdhi3_data1_mux[] = {
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SD3_DAT0_MARK,
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};
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static const unsigned int sdhi3_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
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};
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static const unsigned int sdhi3_data4_mux[] = {
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SD3_DAT0_MARK, SD3_DAT1_MARK, SD3_DAT2_MARK, SD3_DAT3_MARK,
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};
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static const unsigned int sdhi3_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
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};
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static const unsigned int sdhi3_ctrl_mux[] = {
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SD3_CLK_MARK, SD3_CMD_MARK,
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};
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static const unsigned int sdhi3_cd_pins[] = {
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/* CD */
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RCAR_GP_PIN(3, 30),
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};
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static const unsigned int sdhi3_cd_mux[] = {
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SD3_CD_MARK,
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};
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static const unsigned int sdhi3_wp_pins[] = {
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/* WP */
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RCAR_GP_PIN(3, 31),
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};
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static const unsigned int sdhi3_wp_mux[] = {
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SD3_WP_MARK,
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(eth_link),
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SH_PFC_PIN_GROUP(eth_magic),
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@ -2449,6 +2663,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(tpu0_to1),
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SH_PFC_PIN_GROUP(tpu0_to2),
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SH_PFC_PIN_GROUP(tpu0_to3),
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SH_PFC_PIN_GROUP(mmc0_data1),
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SH_PFC_PIN_GROUP(mmc0_data4),
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SH_PFC_PIN_GROUP(mmc0_data8),
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SH_PFC_PIN_GROUP(mmc0_ctrl),
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SH_PFC_PIN_GROUP(mmc1_data1),
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SH_PFC_PIN_GROUP(mmc1_data4),
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SH_PFC_PIN_GROUP(mmc1_data8),
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SH_PFC_PIN_GROUP(mmc1_ctrl),
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SH_PFC_PIN_GROUP(sdhi0_data1),
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SH_PFC_PIN_GROUP(sdhi0_data4),
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SH_PFC_PIN_GROUP(sdhi0_ctrl),
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SH_PFC_PIN_GROUP(sdhi0_cd),
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SH_PFC_PIN_GROUP(sdhi0_wp),
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SH_PFC_PIN_GROUP(sdhi1_data1),
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SH_PFC_PIN_GROUP(sdhi1_data4),
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SH_PFC_PIN_GROUP(sdhi1_ctrl),
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SH_PFC_PIN_GROUP(sdhi1_cd),
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SH_PFC_PIN_GROUP(sdhi1_wp),
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SH_PFC_PIN_GROUP(sdhi2_data1),
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SH_PFC_PIN_GROUP(sdhi2_data4),
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SH_PFC_PIN_GROUP(sdhi2_ctrl),
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SH_PFC_PIN_GROUP(sdhi2_cd),
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SH_PFC_PIN_GROUP(sdhi2_wp),
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SH_PFC_PIN_GROUP(sdhi3_data1),
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SH_PFC_PIN_GROUP(sdhi3_data4),
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SH_PFC_PIN_GROUP(sdhi3_ctrl),
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SH_PFC_PIN_GROUP(sdhi3_cd),
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SH_PFC_PIN_GROUP(sdhi3_wp),
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};
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static const char * const eth_groups[] = {
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@ -2560,6 +2802,52 @@ static const char * const tpu0_groups[] = {
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"tpu0_to3",
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};
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static const char * const mmc0_groups[] = {
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"mmc0_data1",
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"mmc0_data4",
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"mmc0_data8",
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"mmc0_ctrl",
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};
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static const char * const mmc1_groups[] = {
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"mmc1_data1",
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"mmc1_data4",
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"mmc1_data8",
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"mmc1_ctrl",
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};
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static const char * const sdhi0_groups[] = {
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"sdhi0_data1",
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"sdhi0_data4",
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"sdhi0_ctrl",
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"sdhi0_cd",
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"sdhi0_wp",
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};
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static const char * const sdhi1_groups[] = {
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"sdhi1_data1",
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"sdhi1_data4",
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"sdhi1_ctrl",
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"sdhi1_cd",
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"sdhi1_wp",
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};
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static const char * const sdhi2_groups[] = {
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"sdhi2_data1",
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"sdhi2_data4",
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"sdhi2_ctrl",
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"sdhi2_cd",
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"sdhi2_wp",
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};
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static const char * const sdhi3_groups[] = {
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"sdhi3_data1",
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"sdhi3_data4",
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"sdhi3_ctrl",
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"sdhi3_cd",
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"sdhi3_wp",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(eth),
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SH_PFC_FUNCTION(intc),
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@ -2572,6 +2860,12 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(scifb1),
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SH_PFC_FUNCTION(scifb2),
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SH_PFC_FUNCTION(tpu0),
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SH_PFC_FUNCTION(mmc0),
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SH_PFC_FUNCTION(mmc1),
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SH_PFC_FUNCTION(sdhi0),
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SH_PFC_FUNCTION(sdhi1),
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SH_PFC_FUNCTION(sdhi2),
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SH_PFC_FUNCTION(sdhi3),
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};
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static struct pinmux_cfg_reg pinmux_config_regs[] = {
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