ath9k: Use common ath key management functions
Use key management functions which have been moved to ath/key.c and remove ath9k copies of these functions and other now unused definitions. Signed-off-by: Bruno Randolf <br1@einfach.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
781f3136ff
commit
040e539e8e
10 changed files with 6 additions and 583 deletions
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@ -148,276 +148,6 @@ struct ath9k_channel *ath9k_cmn_get_curchannel(struct ieee80211_hw *hw,
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}
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EXPORT_SYMBOL(ath9k_cmn_get_curchannel);
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static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
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struct ath9k_keyval *hk, const u8 *addr,
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bool authenticator)
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{
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struct ath_hw *ah = common->ah;
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const u8 *key_rxmic;
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const u8 *key_txmic;
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key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
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key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
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if (addr == NULL) {
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/*
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* Group key installation - only two key cache entries are used
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* regardless of splitmic capability since group key is only
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* used either for TX or RX.
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*/
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if (authenticator) {
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memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
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memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
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} else {
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memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
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memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
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}
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return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
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}
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if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) {
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/* TX and RX keys share the same key cache entry. */
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memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
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memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
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return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
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}
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/* Separate key cache entries for TX and RX */
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/* TX key goes at first index, RX key at +32. */
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memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
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if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
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/* TX MIC entry failed. No need to proceed further */
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ath_print(common, ATH_DBG_FATAL,
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"Setting TX MIC Key Failed\n");
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return 0;
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}
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memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
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/* XXX delete tx key on failure? */
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return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
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}
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static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
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{
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int i;
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for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
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if (test_bit(i, common->keymap) ||
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test_bit(i + 64, common->keymap))
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continue; /* At least one part of TKIP key allocated */
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if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) &&
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(test_bit(i + 32, common->keymap) ||
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test_bit(i + 64 + 32, common->keymap)))
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continue; /* At least one part of TKIP key allocated */
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/* Found a free slot for a TKIP key */
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return i;
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}
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return -1;
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}
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static int ath_reserve_key_cache_slot(struct ath_common *common,
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u32 cipher)
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{
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int i;
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if (cipher == WLAN_CIPHER_SUITE_TKIP)
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return ath_reserve_key_cache_slot_tkip(common);
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/* First, try to find slots that would not be available for TKIP. */
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if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
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for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
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if (!test_bit(i, common->keymap) &&
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(test_bit(i + 32, common->keymap) ||
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test_bit(i + 64, common->keymap) ||
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test_bit(i + 64 + 32, common->keymap)))
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return i;
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if (!test_bit(i + 32, common->keymap) &&
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(test_bit(i, common->keymap) ||
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test_bit(i + 64, common->keymap) ||
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test_bit(i + 64 + 32, common->keymap)))
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return i + 32;
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if (!test_bit(i + 64, common->keymap) &&
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(test_bit(i , common->keymap) ||
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test_bit(i + 32, common->keymap) ||
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test_bit(i + 64 + 32, common->keymap)))
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return i + 64;
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if (!test_bit(i + 64 + 32, common->keymap) &&
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(test_bit(i, common->keymap) ||
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test_bit(i + 32, common->keymap) ||
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test_bit(i + 64, common->keymap)))
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return i + 64 + 32;
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}
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} else {
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for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
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if (!test_bit(i, common->keymap) &&
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test_bit(i + 64, common->keymap))
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return i;
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if (test_bit(i, common->keymap) &&
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!test_bit(i + 64, common->keymap))
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return i + 64;
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}
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}
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/* No partially used TKIP slots, pick any available slot */
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for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
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/* Do not allow slots that could be needed for TKIP group keys
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* to be used. This limitation could be removed if we know that
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* TKIP will not be used. */
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if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
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continue;
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if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
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if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
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continue;
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if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
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continue;
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}
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if (!test_bit(i, common->keymap))
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return i; /* Found a free slot for a key */
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}
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/* No free slot found */
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return -1;
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}
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/*
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* Configure encryption in the HW.
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*/
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int ath9k_cmn_key_config(struct ath_common *common,
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struct ieee80211_vif *vif,
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struct ieee80211_sta *sta,
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struct ieee80211_key_conf *key)
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{
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struct ath_hw *ah = common->ah;
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struct ath9k_keyval hk;
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const u8 *mac = NULL;
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u8 gmac[ETH_ALEN];
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int ret = 0;
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int idx;
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memset(&hk, 0, sizeof(hk));
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switch (key->cipher) {
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case WLAN_CIPHER_SUITE_WEP40:
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case WLAN_CIPHER_SUITE_WEP104:
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hk.kv_type = ATH9K_CIPHER_WEP;
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break;
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case WLAN_CIPHER_SUITE_TKIP:
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hk.kv_type = ATH9K_CIPHER_TKIP;
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break;
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case WLAN_CIPHER_SUITE_CCMP:
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hk.kv_type = ATH9K_CIPHER_AES_CCM;
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break;
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default:
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return -EOPNOTSUPP;
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}
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hk.kv_len = key->keylen;
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memcpy(hk.kv_val, key->key, key->keylen);
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if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
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switch (vif->type) {
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case NL80211_IFTYPE_AP:
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memcpy(gmac, vif->addr, ETH_ALEN);
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gmac[0] |= 0x01;
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mac = gmac;
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idx = ath_reserve_key_cache_slot(common, key->cipher);
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break;
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case NL80211_IFTYPE_ADHOC:
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if (!sta) {
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idx = key->keyidx;
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break;
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}
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memcpy(gmac, sta->addr, ETH_ALEN);
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gmac[0] |= 0x01;
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mac = gmac;
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idx = ath_reserve_key_cache_slot(common, key->cipher);
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break;
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default:
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idx = key->keyidx;
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break;
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}
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} else if (key->keyidx) {
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if (WARN_ON(!sta))
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return -EOPNOTSUPP;
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mac = sta->addr;
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if (vif->type != NL80211_IFTYPE_AP) {
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/* Only keyidx 0 should be used with unicast key, but
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* allow this for client mode for now. */
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idx = key->keyidx;
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} else
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return -EIO;
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} else {
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if (WARN_ON(!sta))
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return -EOPNOTSUPP;
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mac = sta->addr;
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idx = ath_reserve_key_cache_slot(common, key->cipher);
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}
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if (idx < 0)
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return -ENOSPC; /* no free key cache entries */
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if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
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ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
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vif->type == NL80211_IFTYPE_AP);
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else
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ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
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if (!ret)
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return -EIO;
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set_bit(idx, common->keymap);
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if (key->cipher == WLAN_CIPHER_SUITE_TKIP) {
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set_bit(idx + 64, common->keymap);
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set_bit(idx, common->tkip_keymap);
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set_bit(idx + 64, common->tkip_keymap);
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if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
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set_bit(idx + 32, common->keymap);
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set_bit(idx + 64 + 32, common->keymap);
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set_bit(idx + 32, common->tkip_keymap);
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set_bit(idx + 64 + 32, common->tkip_keymap);
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}
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}
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return idx;
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}
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EXPORT_SYMBOL(ath9k_cmn_key_config);
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/*
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* Delete Key.
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*/
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void ath9k_cmn_key_delete(struct ath_common *common,
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struct ieee80211_key_conf *key)
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{
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struct ath_hw *ah = common->ah;
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ath9k_hw_keyreset(ah, key->hw_key_idx);
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if (key->hw_key_idx < IEEE80211_WEP_NKID)
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return;
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clear_bit(key->hw_key_idx, common->keymap);
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if (key->cipher != WLAN_CIPHER_SUITE_TKIP)
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return;
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clear_bit(key->hw_key_idx + 64, common->keymap);
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clear_bit(key->hw_key_idx, common->tkip_keymap);
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clear_bit(key->hw_key_idx + 64, common->tkip_keymap);
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if (!(common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED)) {
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ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
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clear_bit(key->hw_key_idx + 32, common->keymap);
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clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
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clear_bit(key->hw_key_idx + 32, common->tkip_keymap);
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clear_bit(key->hw_key_idx + 64 + 32, common->tkip_keymap);
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}
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}
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EXPORT_SYMBOL(ath9k_cmn_key_delete);
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int ath9k_cmn_count_streams(unsigned int chainmask, int max)
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{
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int streams = 0;
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@ -66,12 +66,6 @@ void ath9k_cmn_update_ichannel(struct ieee80211_hw *hw,
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struct ath9k_channel *ichan);
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struct ath9k_channel *ath9k_cmn_get_curchannel(struct ieee80211_hw *hw,
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struct ath_hw *ah);
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int ath9k_cmn_key_config(struct ath_common *common,
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struct ieee80211_vif *vif,
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struct ieee80211_sta *sta,
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struct ieee80211_key_conf *key);
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void ath9k_cmn_key_delete(struct ath_common *common,
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struct ieee80211_key_conf *key);
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int ath9k_cmn_count_streams(unsigned int chainmask, int max);
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void ath9k_cmn_btcoex_bt_stomp(struct ath_common *common,
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enum ath_stomp_type stomp_type);
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@ -566,7 +566,7 @@ static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
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* reset the contents on initial power up.
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*/
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for (i = 0; i < common->keymax; i++)
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ath9k_hw_keyreset(priv->ah, (u16) i);
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ath_hw_keyreset(common, (u16) i);
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}
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static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
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@ -1590,7 +1590,7 @@ static int ath9k_htc_set_key(struct ieee80211_hw *hw,
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switch (cmd) {
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case SET_KEY:
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ret = ath9k_cmn_key_config(common, vif, sta, key);
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ret = ath_key_config(common, vif, sta, key);
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if (ret >= 0) {
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key->hw_key_idx = ret;
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/* push IV and Michael MIC generation to stack */
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@ -1604,7 +1604,7 @@ static int ath9k_htc_set_key(struct ieee80211_hw *hw,
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}
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break;
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case DISABLE_KEY:
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ath9k_cmn_key_delete(common, key);
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ath_key_delete(common, key);
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break;
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default:
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ret = -EINVAL;
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@ -1476,277 +1476,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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}
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EXPORT_SYMBOL(ath9k_hw_reset);
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/************************/
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/* Key Cache Management */
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/************************/
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bool ath9k_hw_keyreset(struct ath_hw *ah, u16 entry)
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{
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u32 keyType;
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if (entry >= ah->caps.keycache_size) {
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ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
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"keychache entry %u out of range\n", entry);
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return false;
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}
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keyType = REG_READ(ah, AR_KEYTABLE_TYPE(entry));
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REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0);
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REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0);
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REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0);
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REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0);
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REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0);
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REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR);
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REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0);
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REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0);
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if (keyType == AR_KEYTABLE_TYPE_TKIP && ATH9K_IS_MIC_ENABLED(ah)) {
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u16 micentry = entry + 64;
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REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0);
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REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
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REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0);
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REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
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}
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return true;
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}
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EXPORT_SYMBOL(ath9k_hw_keyreset);
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static bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac)
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{
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u32 macHi, macLo;
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u32 unicast_flag = AR_KEYTABLE_VALID;
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if (entry >= ah->caps.keycache_size) {
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ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
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"keychache entry %u out of range\n", entry);
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return false;
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}
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if (mac != NULL) {
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/*
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* AR_KEYTABLE_VALID indicates that the address is a unicast
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* address, which must match the transmitter address for
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* decrypting frames.
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* Not setting this bit allows the hardware to use the key
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* for multicast frame decryption.
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*/
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if (mac[0] & 0x01)
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unicast_flag = 0;
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macHi = (mac[5] << 8) | mac[4];
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macLo = (mac[3] << 24) |
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(mac[2] << 16) |
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(mac[1] << 8) |
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mac[0];
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macLo >>= 1;
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macLo |= (macHi & 1) << 31;
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macHi >>= 1;
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} else {
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macLo = macHi = 0;
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}
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REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo);
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REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | unicast_flag);
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return true;
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}
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bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
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const struct ath9k_keyval *k,
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const u8 *mac)
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{
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const struct ath9k_hw_capabilities *pCap = &ah->caps;
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struct ath_common *common = ath9k_hw_common(ah);
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u32 key0, key1, key2, key3, key4;
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u32 keyType;
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if (entry >= pCap->keycache_size) {
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ath_print(common, ATH_DBG_FATAL,
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"keycache entry %u out of range\n", entry);
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return false;
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}
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switch (k->kv_type) {
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case ATH9K_CIPHER_AES_OCB:
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keyType = AR_KEYTABLE_TYPE_AES;
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break;
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case ATH9K_CIPHER_AES_CCM:
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keyType = AR_KEYTABLE_TYPE_CCM;
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break;
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case ATH9K_CIPHER_TKIP:
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keyType = AR_KEYTABLE_TYPE_TKIP;
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if (ATH9K_IS_MIC_ENABLED(ah)
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&& entry + 64 >= pCap->keycache_size) {
|
||||
ath_print(common, ATH_DBG_ANY,
|
||||
"entry %u inappropriate for TKIP\n", entry);
|
||||
return false;
|
||||
}
|
||||
break;
|
||||
case ATH9K_CIPHER_WEP:
|
||||
if (k->kv_len < WLAN_KEY_LEN_WEP40) {
|
||||
ath_print(common, ATH_DBG_ANY,
|
||||
"WEP key length %u too small\n", k->kv_len);
|
||||
return false;
|
||||
}
|
||||
if (k->kv_len <= WLAN_KEY_LEN_WEP40)
|
||||
keyType = AR_KEYTABLE_TYPE_40;
|
||||
else if (k->kv_len <= WLAN_KEY_LEN_WEP104)
|
||||
keyType = AR_KEYTABLE_TYPE_104;
|
||||
else
|
||||
keyType = AR_KEYTABLE_TYPE_128;
|
||||
break;
|
||||
case ATH9K_CIPHER_CLR:
|
||||
keyType = AR_KEYTABLE_TYPE_CLR;
|
||||
break;
|
||||
default:
|
||||
ath_print(common, ATH_DBG_FATAL,
|
||||
"cipher %u not supported\n", k->kv_type);
|
||||
return false;
|
||||
}
|
||||
|
||||
key0 = get_unaligned_le32(k->kv_val + 0);
|
||||
key1 = get_unaligned_le16(k->kv_val + 4);
|
||||
key2 = get_unaligned_le32(k->kv_val + 6);
|
||||
key3 = get_unaligned_le16(k->kv_val + 10);
|
||||
key4 = get_unaligned_le32(k->kv_val + 12);
|
||||
if (k->kv_len <= WLAN_KEY_LEN_WEP104)
|
||||
key4 &= 0xff;
|
||||
|
||||
/*
|
||||
* Note: Key cache registers access special memory area that requires
|
||||
* two 32-bit writes to actually update the values in the internal
|
||||
* memory. Consequently, the exact order and pairs used here must be
|
||||
* maintained.
|
||||
*/
|
||||
|
||||
if (keyType == AR_KEYTABLE_TYPE_TKIP && ATH9K_IS_MIC_ENABLED(ah)) {
|
||||
u16 micentry = entry + 64;
|
||||
|
||||
/*
|
||||
* Write inverted key[47:0] first to avoid Michael MIC errors
|
||||
* on frames that could be sent or received at the same time.
|
||||
* The correct key will be written in the end once everything
|
||||
* else is ready.
|
||||
*/
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), ~key0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), ~key1);
|
||||
|
||||
/* Write key[95:48] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
|
||||
|
||||
/* Write key[127:96] and key type */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
|
||||
|
||||
/* Write MAC address for the entry */
|
||||
(void) ath9k_hw_keysetmac(ah, entry, mac);
|
||||
|
||||
if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) {
|
||||
/*
|
||||
* TKIP uses two key cache entries:
|
||||
* Michael MIC TX/RX keys in the same key cache entry
|
||||
* (idx = main index + 64):
|
||||
* key0 [31:0] = RX key [31:0]
|
||||
* key1 [15:0] = TX key [31:16]
|
||||
* key1 [31:16] = reserved
|
||||
* key2 [31:0] = RX key [63:32]
|
||||
* key3 [15:0] = TX key [15:0]
|
||||
* key3 [31:16] = reserved
|
||||
* key4 [31:0] = TX key [63:32]
|
||||
*/
|
||||
u32 mic0, mic1, mic2, mic3, mic4;
|
||||
|
||||
mic0 = get_unaligned_le32(k->kv_mic + 0);
|
||||
mic2 = get_unaligned_le32(k->kv_mic + 4);
|
||||
mic1 = get_unaligned_le16(k->kv_txmic + 2) & 0xffff;
|
||||
mic3 = get_unaligned_le16(k->kv_txmic + 0) & 0xffff;
|
||||
mic4 = get_unaligned_le32(k->kv_txmic + 4);
|
||||
|
||||
/* Write RX[31:0] and TX[31:16] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), mic1);
|
||||
|
||||
/* Write RX[63:32] and TX[15:0] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), mic3);
|
||||
|
||||
/* Write TX[63:32] and keyType(reserved) */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), mic4);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
|
||||
AR_KEYTABLE_TYPE_CLR);
|
||||
|
||||
} else {
|
||||
/*
|
||||
* TKIP uses four key cache entries (two for group
|
||||
* keys):
|
||||
* Michael MIC TX/RX keys are in different key cache
|
||||
* entries (idx = main index + 64 for TX and
|
||||
* main index + 32 + 96 for RX):
|
||||
* key0 [31:0] = TX/RX MIC key [31:0]
|
||||
* key1 [31:0] = reserved
|
||||
* key2 [31:0] = TX/RX MIC key [63:32]
|
||||
* key3 [31:0] = reserved
|
||||
* key4 [31:0] = reserved
|
||||
*
|
||||
* Upper layer code will call this function separately
|
||||
* for TX and RX keys when these registers offsets are
|
||||
* used.
|
||||
*/
|
||||
u32 mic0, mic2;
|
||||
|
||||
mic0 = get_unaligned_le32(k->kv_mic + 0);
|
||||
mic2 = get_unaligned_le32(k->kv_mic + 4);
|
||||
|
||||
/* Write MIC key[31:0] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
|
||||
|
||||
/* Write MIC key[63:32] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
|
||||
|
||||
/* Write TX[63:32] and keyType(reserved) */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
|
||||
AR_KEYTABLE_TYPE_CLR);
|
||||
}
|
||||
|
||||
/* MAC address registers are reserved for the MIC entry */
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC0(micentry), 0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_MAC1(micentry), 0);
|
||||
|
||||
/*
|
||||
* Write the correct (un-inverted) key[47:0] last to enable
|
||||
* TKIP now that all other registers are set with correct
|
||||
* values.
|
||||
*/
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
|
||||
} else {
|
||||
/* Write key[47:0] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
|
||||
|
||||
/* Write key[95:48] */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
|
||||
|
||||
/* Write key[127:96] and key type */
|
||||
REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
|
||||
REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
|
||||
|
||||
/* Write MAC address for the entry */
|
||||
(void) ath9k_hw_keysetmac(ah, entry, mac);
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
EXPORT_SYMBOL(ath9k_hw_set_keycache_entry);
|
||||
|
||||
/******************************/
|
||||
/* Power Management (Chipset) */
|
||||
/******************************/
|
||||
|
|
|
@ -870,12 +870,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
int ath9k_hw_fill_cap_info(struct ath_hw *ah);
|
||||
u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan);
|
||||
|
||||
/* Key Cache Management */
|
||||
bool ath9k_hw_keyreset(struct ath_hw *ah, u16 entry);
|
||||
bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
|
||||
const struct ath9k_keyval *k,
|
||||
const u8 *mac);
|
||||
|
||||
/* GPIO / RFKILL / Antennae */
|
||||
void ath9k_hw_cfg_gpio_input(struct ath_hw *ah, u32 gpio);
|
||||
u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio);
|
||||
|
|
|
@ -381,7 +381,7 @@ static void ath9k_init_crypto(struct ath_softc *sc)
|
|||
* reset the contents on initial power up.
|
||||
*/
|
||||
for (i = 0; i < common->keymax; i++)
|
||||
ath9k_hw_keyreset(sc->sc_ah, (u16) i);
|
||||
ath_hw_keyreset(common, (u16) i);
|
||||
|
||||
/*
|
||||
* Check whether the separate key cache entries
|
||||
|
|
|
@ -660,17 +660,6 @@ struct ath9k_11n_rate_series {
|
|||
u32 RateFlags;
|
||||
};
|
||||
|
||||
struct ath9k_keyval {
|
||||
u8 kv_type;
|
||||
u8 kv_pad;
|
||||
u16 kv_len;
|
||||
u8 kv_val[16]; /* TK */
|
||||
u8 kv_mic[8]; /* Michael MIC key */
|
||||
u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
|
||||
* supports both MIC keys in the same key cache entry;
|
||||
* in that case, kv_mic is the RX key) */
|
||||
};
|
||||
|
||||
enum ath9k_key_type {
|
||||
ATH9K_KEY_TYPE_CLEAR,
|
||||
ATH9K_KEY_TYPE_WEP,
|
||||
|
@ -678,16 +667,6 @@ enum ath9k_key_type {
|
|||
ATH9K_KEY_TYPE_TKIP,
|
||||
};
|
||||
|
||||
enum ath9k_cipher {
|
||||
ATH9K_CIPHER_WEP = 0,
|
||||
ATH9K_CIPHER_AES_OCB = 1,
|
||||
ATH9K_CIPHER_AES_CCM = 2,
|
||||
ATH9K_CIPHER_CKIP = 3,
|
||||
ATH9K_CIPHER_TKIP = 4,
|
||||
ATH9K_CIPHER_CLR = 5,
|
||||
ATH9K_CIPHER_MIC = 127
|
||||
};
|
||||
|
||||
struct ath_hw;
|
||||
struct ath9k_channel;
|
||||
|
||||
|
|
|
@ -1769,7 +1769,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
|
|||
|
||||
switch (cmd) {
|
||||
case SET_KEY:
|
||||
ret = ath9k_cmn_key_config(common, vif, sta, key);
|
||||
ret = ath_key_config(common, vif, sta, key);
|
||||
if (ret >= 0) {
|
||||
key->hw_key_idx = ret;
|
||||
/* push IV and Michael MIC generation to stack */
|
||||
|
@ -1783,7 +1783,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
|
|||
}
|
||||
break;
|
||||
case DISABLE_KEY:
|
||||
ath9k_cmn_key_delete(common, key);
|
||||
ath_key_delete(common, key);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
|
|
|
@ -45,9 +45,6 @@
|
|||
} \
|
||||
} while (0)
|
||||
|
||||
#define ATH9K_IS_MIC_ENABLED(ah) \
|
||||
((ah)->sta_id1_defaults & AR_STA_ID1_CRPT_MIC_ENABLE)
|
||||
|
||||
#define ANTSWAP_AB 0x0001
|
||||
#define REDUCE_CHAIN_0 0x00000050
|
||||
#define REDUCE_CHAIN_1 0x00000051
|
||||
|
|
Loading…
Reference in a new issue