Pin control fixes for v3.16:
- An IRQ handling fix for the STi driver, also for stable - Another IRQ fix for the RCAR GPIO driver - A MAINTAINERS entry -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTz6+qAAoJEEEQszewGV1z+o0QAJSXONx5WyVHNXGII24loIyQ 035O3ENmTLP2RNiibREcOk4tAD3IuIW/GYL+rx1yCCU5fAzKdoG7bG53DfariTWO zSe+mUxdspKEiWGs3vXP5G2+UOD0dM+GytqduAIw6Uuwd9WcZkd46D4BLmFq0V0A ZcY4oGaB1JetEu2LVLAuMaUkWeRMVH3SQX+YwM7dNigljgMJSHo2FduRN0+A8nJD TpvdsZbAzsdNyH6oOnzzOAnpIRyL/TthPwnwUcEKVtcv8zj9A4gjB9fBObuR2v5L rncVdVV/2anWIsSjSnaXOSLni18wIxB1YDRanTI1tH3xAfCNQNCBjPrDzdoQcMvP B7MkYqRnl/ZGUq74kAixAozQJBLfzyLhV5G+1zAty81x1+gLITUD3ZkqwBqGvinY UMg2s3eHvW20ypc2i9cTj3VZeepjyzbQ0JaF7o1GiU3By9Igy+WJPu0OlDyxGoi0 fZZRQHfyERcGqG71RwP7aBqWJLoerOG6hJ50vbcqlKw8/EBOJNN7eROvfNk06IYp 2RqjXGu2MKcFZWGh6Os7tO1WUp14fXX6W3szwB47EGZAPrcgTb/3NMXoj61t6dba uGM/PXu5xensdc98r2Hd4iOp2Z6LN9/f/9Iqm9gR1dq8B6qn2389gNXIU6j3onFh UUzA3NVT3W5WiNdLU1es =pzyJ -----END PGP SIGNATURE----- Merge tag 'pinctrl-v3.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Here are three pin control fixes for the v3.16 series. Sorry that some of these arrive late, the summer heat in Sweden makes me slow. - an IRQ handling fix for the STi driver, also for stable - another IRQ fix for the RCAR GPIO driver - a MAINTAINERS entry" * tag 'pinctrl-v3.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: gpio: rcar: Add support for DT IRQ flags MAINTAINERS: Add entry for the Renesas pin controller driver pinctrl: st: Fix irqmux handler
This commit is contained in:
commit
02ec474746
3 changed files with 8 additions and 1 deletions
|
@ -6956,6 +6956,12 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
S: Maintained
|
||||
F: drivers/pinctrl/pinctrl-at91.c
|
||||
|
||||
PIN CONTROLLER - RENESAS
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-sh@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/sh-pfc/
|
||||
|
||||
PIN CONTROLLER - SAMSUNG
|
||||
M: Tomasz Figa <t.figa@samsung.com>
|
||||
M: Thomas Abraham <thomas.abraham@linaro.org>
|
||||
|
|
|
@ -284,6 +284,7 @@ static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int irq,
|
|||
|
||||
static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
|
||||
.map = gpio_rcar_irq_domain_map,
|
||||
.xlate = irq_domain_xlate_twocell,
|
||||
};
|
||||
|
||||
struct gpio_rcar_info {
|
||||
|
|
|
@ -1431,7 +1431,7 @@ static void st_gpio_irqmux_handler(unsigned irq, struct irq_desc *desc)
|
|||
|
||||
status = readl(info->irqmux_base);
|
||||
|
||||
for_each_set_bit(n, &status, ST_GPIO_PINS_PER_BANK)
|
||||
for_each_set_bit(n, &status, info->nbanks)
|
||||
__gpio_irq_handler(&info->banks[n]);
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
|
|
Loading…
Reference in a new issue