MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations
Several BMIPS-specific CP0 registers are used for SMP boot and other operations. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2956/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 8 additions and 1 deletions
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@ -1106,7 +1106,7 @@ do { \
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#define read_c0_brcm_reset() __read_32bit_c0_register($22, 5)
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#define write_c0_brcm_reset(val) __write_32bit_c0_register($22, 5, val)
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/* BMIPS4380 */
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/* BMIPS43xx */
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#define read_c0_brcm_cmt_intr() __read_32bit_c0_register($22, 1)
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#define write_c0_brcm_cmt_intr(val) __write_32bit_c0_register($22, 1, val)
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@ -1667,6 +1667,13 @@ __BUILD_SET_C0(config)
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__BUILD_SET_C0(intcontrol)
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__BUILD_SET_C0(intctl)
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__BUILD_SET_C0(srsmap)
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__BUILD_SET_C0(brcm_config_0)
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__BUILD_SET_C0(brcm_bus_pll)
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__BUILD_SET_C0(brcm_reset)
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__BUILD_SET_C0(brcm_cmt_intr)
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__BUILD_SET_C0(brcm_cmt_ctrl)
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__BUILD_SET_C0(brcm_config)
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__BUILD_SET_C0(brcm_mode)
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#endif /* !__ASSEMBLY__ */
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